From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 10/36] target-arm: Combine user-only and softmmu get/set_r13_banked()
Date: Thu, 18 Feb 2016 14:34:42 +0000 [thread overview]
Message-ID: <1455806108-6961-11-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1455806108-6961-1-git-send-email-peter.maydell@linaro.org>
The user-mode versions of get/set_r13_banked() exist just to assert
if they're ever called -- the translate time code should never
emit calls to them because SRS from user mode always UNDEF.
There's no code in the softmmu versions that can't compile in
CONFIG_USER_ONLY, and the assertion is not particularly useful,
so combine the two functions rather than having completely split
versions under ifdefs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
---
target-arm/op_helper.c | 19 -------------------
1 file changed, 19 deletions(-)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 053e9b6..cfdbc8d 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -457,24 +457,6 @@ void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val)
}
}
-#if defined(CONFIG_USER_ONLY)
-void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val)
-{
- ARMCPU *cpu = arm_env_get_cpu(env);
-
- cpu_abort(CPU(cpu), "banked r13 write\n");
-}
-
-uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
-{
- ARMCPU *cpu = arm_env_get_cpu(env);
-
- cpu_abort(CPU(cpu), "banked r13 read\n");
- return 0;
-}
-
-#else
-
void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val)
{
if ((env->uncached_cpsr & CPSR_M) == mode) {
@@ -492,7 +474,6 @@ uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
return env->banked_r13[bank_number(mode)];
}
}
-#endif
void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome,
uint32_t isread)
--
1.9.1
next prev parent reply other threads:[~2016-02-18 14:35 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 14:34 [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 01/36] target-arm: correct CNTFRQ access rights Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 02/36] target-arm: Fix handling of SCR.SMD Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 04/36] target-arm: Implement MDCR_EL2.TDRA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 05/36] target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 06/36] target-arm: Report correct syndrome for FPEXC32_EL2 traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 07/36] target-arm: Clean up trap/undef handling of SRS Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 08/36] target-arm: Move get/set_r13_banked() to op_helper.c Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 09/36] target-arm: Move bank_number() into internals.h Peter Maydell
2016-02-18 14:34 ` Peter Maydell [this message]
2016-02-18 14:34 ` [Qemu-devel] [PULL 11/36] target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 12/36] target-arm: Add the pmceid0 and pmceid1 registers Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 13/36] target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 14/36] target-arm: Add PMUSERENR_EL0 register Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 15/36] ARM: PL061: Clear PL061 device state after reset Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 16/36] ARM: PL061: Cleaning field of PL061 device state Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 17/36] hw/sd/sdhci.c: Remove x-drive property Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 18/36] hw/sd/sd.c: QOMify Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 19/36] hw/sd/sd.c: Convert sd_reset() function into Device reset method Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 20/36] hw/sd: Add QOM bus which SD cards plug in to Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 21/36] hw/sd/sdhci.c: Update to use SDBus APIs Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 22/36] sdhci_sysbus: Create SD card device in users, not the device itself Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 23/36] hw/sd/pxa2xx_mmci: convert to SysBusDevice object Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 24/36] hw/sd/pxa2xx_mmci: Update to use new SDBus APIs Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 25/36] hw/sd/pxa2xx_mmci: Convert to VMStateDescription Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 26/36] hw/sd/pxa2xx_mmci: Add reset function Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 27/36] hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 28/36] hw/sd: model a power-up delay, as a workaround for an EDK2 bug Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 29/36] hw/sd: use guest error logging rather than fprintf to stderr Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 30/36] hw/timer: QOM'ify arm_timer (pass 1) Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 31/36] hw/timer: QOM'ify arm_timer (pass 2) Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 32/36] hw/timer: QOM'ify exynos4210_mct Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 34/36] hw/timer: QOM'ify exynos4210_rtc Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 35/36] hw/timer: QOM'ify pl031 Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 36/36] hw/timer: QOM'ify pxa2xx_timer Peter Maydell
2016-02-18 15:19 ` [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
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