From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/36] target-arm: correct CNTFRQ access rights
Date: Thu, 18 Feb 2016 14:34:33 +0000 [thread overview]
Message-ID: <1455806108-6961-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1455806108-6961-1-git-send-email-peter.maydell@linaro.org>
Correct some corner cases we were getting wrong for
CNTFRQ access rights:
* should UNDEF from 32-bit Secure EL1
* only writable from the highest implemented exception level,
which might not be EL1 now
To clarify the code, provide a new utility function
arm_highest_el() which returns the highest implemented
exception level.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target-arm/cpu.h | 12 ++++++++++++
target-arm/helper.c | 29 ++++++++++++++++++++++++++---
2 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 5137632..afbf366 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1255,6 +1255,18 @@ static inline bool cptype_valid(int cptype)
#define PL1_RW (PL1_R | PL1_W)
#define PL0_RW (PL0_R | PL0_W)
+/* Return the highest implemented Exception Level */
+static inline int arm_highest_el(CPUARMState *env)
+{
+ if (arm_feature(env, ARM_FEATURE_EL3)) {
+ return 3;
+ }
+ if (arm_feature(env, ARM_FEATURE_EL2)) {
+ return 2;
+ }
+ return 1;
+}
+
/* Return the current Exception Level (as per ARMv8; note that this differs
* from the ARMv7 Privilege Level).
*/
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 2f9db72..4d27c00 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1218,10 +1218,33 @@ static const ARMCPRegInfo v6k_cp_reginfo[] = {
static CPAccessResult gt_cntfrq_access(CPUARMState *env, const ARMCPRegInfo *ri,
bool isread)
{
- /* CNTFRQ: not visible from PL0 if both PL0PCTEN and PL0VCTEN are zero */
- if (arm_current_el(env) == 0 && !extract32(env->cp15.c14_cntkctl, 0, 2)) {
- return CP_ACCESS_TRAP;
+ /* CNTFRQ: not visible from PL0 if both PL0PCTEN and PL0VCTEN are zero.
+ * Writable only at the highest implemented exception level.
+ */
+ int el = arm_current_el(env);
+
+ switch (el) {
+ case 0:
+ if (!extract32(env->cp15.c14_cntkctl, 0, 2)) {
+ return CP_ACCESS_TRAP;
+ }
+ break;
+ case 1:
+ if (!isread && ri->state == ARM_CP_STATE_AA32 &&
+ arm_is_secure_below_el3(env)) {
+ /* Accesses from 32-bit Secure EL1 UNDEF (*not* trap to EL3!) */
+ return CP_ACCESS_TRAP_UNCATEGORIZED;
+ }
+ break;
+ case 2:
+ case 3:
+ break;
}
+
+ if (!isread && el < arm_highest_el(env)) {
+ return CP_ACCESS_TRAP_UNCATEGORIZED;
+ }
+
return CP_ACCESS_OK;
}
--
1.9.1
next prev parent reply other threads:[~2016-02-18 14:35 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 14:34 [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
2016-02-18 14:34 ` Peter Maydell [this message]
2016-02-18 14:34 ` [Qemu-devel] [PULL 02/36] target-arm: Fix handling of SCR.SMD Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 04/36] target-arm: Implement MDCR_EL2.TDRA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 05/36] target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 06/36] target-arm: Report correct syndrome for FPEXC32_EL2 traps Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 07/36] target-arm: Clean up trap/undef handling of SRS Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 08/36] target-arm: Move get/set_r13_banked() to op_helper.c Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 09/36] target-arm: Move bank_number() into internals.h Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 10/36] target-arm: Combine user-only and softmmu get/set_r13_banked() Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 11/36] target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 12/36] target-arm: Add the pmceid0 and pmceid1 registers Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 13/36] target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 14/36] target-arm: Add PMUSERENR_EL0 register Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 15/36] ARM: PL061: Clear PL061 device state after reset Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 16/36] ARM: PL061: Cleaning field of PL061 device state Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 17/36] hw/sd/sdhci.c: Remove x-drive property Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 18/36] hw/sd/sd.c: QOMify Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 19/36] hw/sd/sd.c: Convert sd_reset() function into Device reset method Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 20/36] hw/sd: Add QOM bus which SD cards plug in to Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 21/36] hw/sd/sdhci.c: Update to use SDBus APIs Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 22/36] sdhci_sysbus: Create SD card device in users, not the device itself Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 23/36] hw/sd/pxa2xx_mmci: convert to SysBusDevice object Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 24/36] hw/sd/pxa2xx_mmci: Update to use new SDBus APIs Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 25/36] hw/sd/pxa2xx_mmci: Convert to VMStateDescription Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 26/36] hw/sd/pxa2xx_mmci: Add reset function Peter Maydell
2016-02-18 14:34 ` [Qemu-devel] [PULL 27/36] hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 28/36] hw/sd: model a power-up delay, as a workaround for an EDK2 bug Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 29/36] hw/sd: use guest error logging rather than fprintf to stderr Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 30/36] hw/timer: QOM'ify arm_timer (pass 1) Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 31/36] hw/timer: QOM'ify arm_timer (pass 2) Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 32/36] hw/timer: QOM'ify exynos4210_mct Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 34/36] hw/timer: QOM'ify exynos4210_rtc Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 35/36] hw/timer: QOM'ify pl031 Peter Maydell
2016-02-18 14:35 ` [Qemu-devel] [PULL 36/36] hw/timer: QOM'ify pxa2xx_timer Peter Maydell
2016-02-18 15:19 ` [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
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