From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51827) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWbn3-0003E2-Gf for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:31:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aWbn2-0000WR-JT for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:31:33 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48371) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWbn2-0000WN-E8 for qemu-devel@nongnu.org; Thu, 18 Feb 2016 22:31:32 -0500 From: Peter Xu Date: Fri, 19 Feb 2016 11:30:12 +0800 Message-Id: <1455852618-5224-8-git-send-email-peterx@redhat.com> In-Reply-To: <1455852618-5224-1-git-send-email-peterx@redhat.com> References: <1455852618-5224-1-git-send-email-peterx@redhat.com> Subject: [Qemu-devel] [PATCH 07/13] intel_iommu: handle interrupt remap enable List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, rth@twiddle.net Handle writting to IRE bit in global command register. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 62f0fa7..f1cb574 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1179,6 +1179,22 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool en) } } +/* Handle Interrupt Remap Enable/Disable */ +static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en) +{ + VTD_DPRINTF(CSR, "Interrupt Remap Enable %s", (en ? "on" : "off")); + + if (en) { + s->intr_enabled = true; + /* Ok - report back to driver */ + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES); + } else { + s->intr_enabled = false; + /* Ok - report back to driver */ + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0); + } +} + /* Handle write to Global Command Register */ static void vtd_handle_gcmd_write(IntelIOMMUState *s) { @@ -1203,6 +1219,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s) /* Set/update the interrupt remapping root-table pointer */ vtd_handle_gcmd_sirtp(s); } + if (changed & VTD_GCMD_IRE) { + /* Interrupt remap enable/disable */ + vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE); + } } /* Handle write to Context Command Register */ -- 2.4.3