From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35586) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aXYTt-000775-19 for qemu-devel@nongnu.org; Sun, 21 Feb 2016 13:11:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aXYTr-0005ba-8m for qemu-devel@nongnu.org; Sun, 21 Feb 2016 13:11:40 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:34130) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aXYTr-0005bQ-2m for qemu-devel@nongnu.org; Sun, 21 Feb 2016 13:11:39 -0500 Received: by mail-wm0-x22e.google.com with SMTP id b205so128641358wmb.1 for ; Sun, 21 Feb 2016 10:11:39 -0800 (PST) From: David Kiarie Date: Sun, 21 Feb 2016 21:11:00 +0300 Message-Id: <1456078260-6669-5-git-send-email-davidkiarie4@gmail.com> In-Reply-To: <1456078260-6669-1-git-send-email-davidkiarie4@gmail.com> References: <1456078260-6669-1-git-send-email-davidkiarie4@gmail.com> Subject: [Qemu-devel] [V6 4/4] hw/pci-host: Emulate AMD IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: marcel@redhat.com, valentine.sinitsyn@gmail.com, jan.kiszka@web.de, David Kiarie , mst@redhat.com Add AMD IOMMU emulation support to q35 chipset Signed-off-by: David Kiarie --- hw/pci-host/piix.c | 1 + hw/pci-host/q35.c | 14 ++++++++++++-- include/hw/i386/intel_iommu.h | 1 + 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 41aa66f..ab2e24a 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -36,6 +36,7 @@ #include "hw/i386/ioapic.h" #include "qapi/visitor.h" #include "qemu/error-report.h" +#include "hw/i386/amd_iommu.h" /* * I440FX chipset data sheet. diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 115fb8c..355fb32 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -31,6 +31,7 @@ #include "hw/hw.h" #include "hw/pci-host/q35.h" #include "qapi/visitor.h" +#include "hw/i386/amd_iommu.h" /**************************************************************************** * Q35 host @@ -505,9 +506,18 @@ static void mch_realize(PCIDevice *d, Error **errp) mch->pci_address_space, &mch->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } - /* Intel IOMMU (VT-d) */ - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { + + if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, INTEL_IOMMU_STR) == 0) { + /* Intel IOMMU (VT-d) */ mch_init_dmar(mch); + } else if (g_strcmp0(MACHINE(qdev_get_machine())->iommu, AMD_IOMMU_STR) + == 0) { + AMDIOMMUState *iommu_state; + PCIDevice *iommu; + PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch))); + iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE); + iommu_state = AMD_IOMMU_DEVICE(iommu); + pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state); } } diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index b024ffa..539530c 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -27,6 +27,7 @@ #define TYPE_INTEL_IOMMU_DEVICE "intel-iommu" #define INTEL_IOMMU_DEVICE(obj) \ OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE) +#define INTEL_IOMMU_STR "intel" /* DMAR Hardware Unit Definition address (IOMMU unit) */ #define Q35_HOST_BRIDGE_IOMMU_ADDR 0xfed90000ULL -- 2.1.4