From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34250) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aYHbM-00013K-1B for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:22:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aYHbI-0006PB-O1 for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:22:23 -0500 Received: from roura.ac.upc.es ([147.83.33.10]:36331) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aYHbI-0006Ou-Bh for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:22:20 -0500 From: =?utf-8?b?TGx1w61z?= Vilanova Date: Tue, 23 Feb 2016 19:22:19 +0100 Message-Id: <145625173880.12025.6630606700468410319.stgit@localhost> In-Reply-To: <145625172744.12025.2350972792125742783.stgit@localhost> References: <145625172744.12025.2350972792125742783.stgit@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 2/5] trace: [all] Add "guest_vmem" event List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Signed-off-by: Llu=C3=ADs Vilanova --- include/exec/cpu_ldst_template.h | 17 +++++++++++++++ include/exec/cpu_ldst_useronly_template.h | 14 ++++++++++++ tcg/tcg-op.c | 34 +++++++++++++++++++++++= +++--- trace-events | 13 +++++++++++ 4 files changed, 74 insertions(+), 4 deletions(-) diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_tem= plate.h index 3091c00..516f378 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -23,6 +23,11 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +#if !defined(SOFTMMU_CODE_ACCESS) +#include "trace.h" +#endif + #if DATA_SIZE =3D=3D 8 #define SUFFIX q #define USUFFIX q @@ -80,6 +85,10 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUA= rchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 0); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; @@ -112,6 +121,10 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CP= UArchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 0); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; @@ -148,6 +161,10 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPU= ArchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 1); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu= _ldst_useronly_template.h index 040b147..cde3d00 100644 --- a/include/exec/cpu_ldst_useronly_template.h +++ b/include/exec/cpu_ldst_useronly_template.h @@ -22,6 +22,11 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +#if !defined(CODE_ACCESS) +#include "trace.h" +#endif + #if DATA_SIZE =3D=3D 8 #define SUFFIX q #define USUFFIX q @@ -53,6 +58,9 @@ static inline RES_TYPE glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong p= tr) { +#if !defined(CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 0); +#endif return glue(glue(ld, USUFFIX), _p)(g2h(ptr)); } =20 @@ -68,6 +76,9 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUAr= chState *env, static inline int glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong p= tr) { +#if !defined(CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 0); +#endif return glue(glue(lds, SUFFIX), _p)(g2h(ptr)); } =20 @@ -85,6 +96,9 @@ static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong pt= r, RES_TYPE v) { +#if !defined(CODE_ACCESS) + trace_guest_vmem_exec(ENV_GET_CPU(env), ptr, DATA_SIZE, 1); +#endif glue(glue(st, SUFFIX), _p)(g2h(ptr), v); } =20 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index f554b86..789e427 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "tcg.h" #include "tcg-op.h" +#include "trace-tcg.h" =20 /* Reduce the number of ifdefs below. This assumes that all uses of TCGV_HIGH and TCGV_LOW are properly protected by a conditional that @@ -1904,22 +1905,44 @@ static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 = val, TCGv addr, #endif } =20 -void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +static inline uint8_t tcg_memop_size(TCGMemOp op) +{ + return 1 << (op & MO_SIZE); +} + +static inline void do_tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGAr= g idx, TCGMemOp memop) { memop =3D tcg_canonicalize_memop(memop, 0, 0); gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx); } =20 -void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +{ + trace_guest_vmem_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, tcg_memop_size(memop), 0); + do_tcg_gen_qemu_ld_i32(val, addr, idx, memop); +} + +static inline void do_tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGAr= g idx, TCGMemOp memop) { memop =3D tcg_canonicalize_memop(memop, 0, 1); gen_ldst_i32(INDEX_op_qemu_st_i32, val, addr, memop, idx); } =20 +void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +{ + trace_guest_vmem_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, tcg_memop_size(memop), 1); + do_tcg_gen_qemu_st_i32(val, addr, idx, memop); +} + void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) { + trace_guest_vmem_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, tcg_memop_size(memop), 0); + if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { - tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); + do_tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); if (memop & MO_SIGN) { tcg_gen_sari_i32(TCGV_HIGH(val), TCGV_LOW(val), 31); } else { @@ -1934,8 +1957,11 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, = TCGArg idx, TCGMemOp memop) =20 void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) { + trace_guest_vmem_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, tcg_memop_size(memop), 0); + if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { - tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); + do_tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); return; } =20 diff --git a/trace-events b/trace-events index f986c81..1088fe0 100644 --- a/trace-events +++ b/trace-events @@ -1890,3 +1890,16 @@ qio_channel_command_new_pid(void *ioc, int writefd= , int readfd, int pid) "Comman qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) = "Command new spawn ioc=3D%p binary=3D%s flags=3D%d" qio_channel_command_abort(void *ioc, int pid) "Command abort ioc=3D%p pi= d=3D%d" qio_channel_command_wait(void *ioc, int pid, int ret, int status) "Comma= nd abort ioc=3D%p pid=3D%d ret=3D%d status=3D%d" + +### Guest events, keep at bottom + +# @vaddr: Access' virtual address. +# @size : Access' size (bytes). +# @store: Whether the access is a store. +# +# Start virtual memory access (before any potential access violation). +# +# Does not include memory accesses performed by devices. +# +# Targets: TCG(all) +disable vcpu tcg guest_vmem(TCGv vaddr, uint8_t size, uint8_t store) "si= ze=3D%d store=3D%d", "vaddr=3D0x%016"PRIx64" size=3D%d store=3D%d"