From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aYHmP-0001VH-JB for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:33:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aYHmK-0001J6-Gu for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:33:49 -0500 Received: from mail-qg0-x235.google.com ([2607:f8b0:400d:c04::235]:36408) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aYHmK-0001Iz-Cu for qemu-devel@nongnu.org; Tue, 23 Feb 2016 13:33:44 -0500 Received: by mail-qg0-x235.google.com with SMTP id y9so145102278qgd.3 for ; Tue, 23 Feb 2016 10:33:44 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Tue, 23 Feb 2016 10:33:01 -0800 Message-Id: <1456252389-4416-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 0/8] tcg queued patches List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org A revision of the Feb 15 pull, with patch 5 adjusted to work around the reported Werror bug in gcc 4.8.2, and Peter's renaming patch set included. r~ The following changes since commit 90ce6e2644db2c47d72f364b4de57342e50bd10a: include: Clean up includes (2016-02-23 12:43:05 +0000) are available in the git repository at: git://github.com/rth7680/qemu.git tags/pull-tcg-20160223 for you to fetch changes up to c3b7f66800fbf9f47fddbcf2e2cd30ea932e0aae: tcg: Remove unnecessary osdep.h includes from tcg-target.inc.c (2016-02-23 08:31:03 -0800) ---------------------------------------------------------------- Queued TCG patches ---------------------------------------------------------------- Peter Maydell (3): tcg: Rename tcg-target.c to tcg-target.inc.c scripts/clean-includes: Ignore .inc.c files tcg: Remove unnecessary osdep.h includes from tcg-target.inc.c Richard Henderson (5): tcg: Work around clang bug wrt enum ranges, part 2 tcg: Implement indirect memory registers tcg: Allocate indirect_base temporaries in a different order target-sparc: Tidy global register initialization target-sparc: Use global registers for the register window qemu-tech.texi | 2 +- scripts/clean-includes | 5 + target-sparc/translate.c | 204 ++++++++++++------------- tcg/README | 5 +- tcg/aarch64/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/arm/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/i386/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/ia64/{tcg-target.c => tcg-target.inc.c} | 0 tcg/mips/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/ppc/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/s390/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/sparc/{tcg-target.c => tcg-target.inc.c} | 1 - tcg/tcg.c | 145 ++++++++++++------ tcg/tcg.h | 4 +- tcg/tci/README | 4 +- tcg/tci/{tcg-target.c => tcg-target.inc.c} | 1 - 16 files changed, 214 insertions(+), 163 deletions(-) rename tcg/aarch64/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/arm/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/i386/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/ia64/{tcg-target.c => tcg-target.inc.c} (100%) rename tcg/mips/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/ppc/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/s390/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/sparc/{tcg-target.c => tcg-target.inc.c} (99%) rename tcg/tci/{tcg-target.c => tcg-target.inc.c} (99%)