From: Leon Alrae <leon.alrae@imgtec.com>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
James Hogan <james.hogan@imgtec.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PULL 4/8] mips/kvm: Support unsigned KVM registers
Date: Fri, 26 Feb 2016 11:16:56 +0000 [thread overview]
Message-ID: <1456485420-18937-5-git-send-email-leon.alrae@imgtec.com> (raw)
In-Reply-To: <1456485420-18937-1-git-send-email-leon.alrae@imgtec.com>
From: James Hogan <james.hogan@imgtec.com>
Add KVM register access functions for the uint32_t type. This is
required for FP and MSA control registers, which are represented as
unsigned 32-bit integers.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
target-mips/kvm.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 57cde9d..abdd6b6 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -248,6 +248,17 @@ static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
}
+static inline int kvm_mips_put_one_ureg(CPUState *cs, uint64_t reg_id,
+ uint32_t *addr)
+{
+ struct kvm_one_reg cp0reg = {
+ .id = reg_id,
+ .addr = (uintptr_t)addr
+ };
+
+ return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg);
+}
+
static inline int kvm_mips_put_one_ulreg(CPUState *cs, uint64_t reg_id,
target_ulong *addr)
{
@@ -282,6 +293,17 @@ static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id,
return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
}
+static inline int kvm_mips_get_one_ureg(CPUState *cs, uint64_t reg_id,
+ uint32_t *addr)
+{
+ struct kvm_one_reg cp0reg = {
+ .id = reg_id,
+ .addr = (uintptr_t)addr
+ };
+
+ return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg);
+}
+
static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64_t reg_id,
target_ulong *addr)
{
--
2.1.0
next prev parent reply other threads:[~2016-02-26 11:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 11:16 [Qemu-devel] [PULL 0/8] target-mips queue Leon Alrae
2016-02-26 11:16 ` [Qemu-devel] [PULL 1/8] mips/kvm: Remove a couple of noisy DPRINTFs Leon Alrae
2016-02-26 11:16 ` [Qemu-devel] [PULL 2/8] mips/kvm: Implement PRid CP0 register Leon Alrae
2016-02-26 11:16 ` [Qemu-devel] [PULL 3/8] mips/kvm: Implement Config CP0 registers Leon Alrae
2016-02-26 11:16 ` Leon Alrae [this message]
2016-02-26 11:16 ` [Qemu-devel] [PULL 5/8] mips/kvm: Support signed 64-bit KVM registers Leon Alrae
2016-02-26 11:16 ` [Qemu-devel] [PULL 6/8] mips/kvm: Support FPU in MIPS KVM guests Leon Alrae
2016-02-26 11:16 ` [Qemu-devel] [PULL 7/8] mips/kvm: Support MSA " Leon Alrae
2016-02-26 11:17 ` [Qemu-devel] [PULL 8/8] target-mips: implement R6 multi-threading Leon Alrae
2016-02-26 13:24 ` [Qemu-devel] [PULL 0/8] target-mips queue Peter Maydell
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