From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v1 1/1] target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW
Date: Fri, 26 Feb 2016 13:45:39 +0100 [thread overview]
Message-ID: <1456490739-19343-1-git-send-email-edgar.iglesias@gmail.com> (raw)
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW due to the register not
having any underlying state. This fixes an issue with booting
KVM enabled kernels when EL2 is on.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target-arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 85a6685..601e3c1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3631,7 +3631,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
.writefn = gt_hyp_cval_write, .raw_writefn = raw_write },
{ .name = "CNTHP_TVAL_EL2", .state = ARM_CP_STATE_BOTH,
.opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 0,
- .type = ARM_CP_IO, .access = PL2_RW,
+ .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL2_RW,
.resetfn = gt_hyp_timer_reset,
.readfn = gt_hyp_tval_read, .writefn = gt_hyp_tval_write },
{ .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH,
--
2.5.0
next reply other threads:[~2016-02-26 12:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 12:45 Edgar E. Iglesias [this message]
2016-02-26 13:36 ` [Qemu-devel] [PATCH v1 1/1] target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW Peter Maydell
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