From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54084) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aZHmD-00032h-Om for qemu-devel@nongnu.org; Fri, 26 Feb 2016 07:45:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aZHm9-00045X-NB for qemu-devel@nongnu.org; Fri, 26 Feb 2016 07:45:45 -0500 From: "Edgar E. Iglesias" Date: Fri, 26 Feb 2016 13:45:39 +0100 Message-Id: <1456490739-19343-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v1 1/1] target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: edgar.iglesias@xilinx.com, qemu-arm@nongnu.org From: "Edgar E. Iglesias" Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW due to the register not having any underlying state. This fixes an issue with booting KVM enabled kernels when EL2 is on. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 85a6685..601e3c1 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3631,7 +3631,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .writefn = gt_hyp_cval_write, .raw_writefn = raw_write }, { .name = "CNTHP_TVAL_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 0, - .type = ARM_CP_IO, .access = PL2_RW, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL2_RW, .resetfn = gt_hyp_timer_reset, .readfn = gt_hyp_tval_read, .writefn = gt_hyp_tval_write }, { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH, -- 2.5.0