From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 04/20] linux-user: Use restrictive mask when calling cpsr_write()
Date: Fri, 26 Feb 2016 15:20:09 +0000 [thread overview]
Message-ID: <1456500025-28761-5-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1456500025-28761-1-git-send-email-peter.maydell@linaro.org>
When linux-user code is calling cpsr_write(), use a restrictive
mask to ensure we are limiting the set of CPSR bits we update.
In particular, don't allow the mode bits to be changed.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1455556977-3644-5-git-send-email-peter.maydell@linaro.org
---
linux-user/main.c | 3 ++-
linux-user/signal.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 072eee8..700724e 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -4446,7 +4446,8 @@ int main(int argc, char **argv, char **envp)
#elif defined(TARGET_ARM)
{
int i;
- cpsr_write(env, regs->uregs[16], 0xffffffff, CPSRWriteByInstr);
+ cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
+ CPSRWriteByInstr);
for(i = 0; i < 16; i++) {
env->regs[i] = regs->uregs[i];
}
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 82f81c7..962111c 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -1611,7 +1611,7 @@ setup_return(CPUARMState *env, struct target_sigaction *ka,
env->regs[13] = frame_addr;
env->regs[14] = retcode;
env->regs[15] = handler & (thumb ? ~1 : ~3);
- cpsr_write(env, cpsr, 0xffffffff, CPSRWriteByInstr);
+ cpsr_write(env, cpsr, CPSR_IT | CPSR_T, CPSRWriteByInstr);
}
static abi_ulong *setup_sigframe_v2_vfp(abi_ulong *regspace, CPUARMState *env)
--
1.9.1
next prev parent reply other threads:[~2016-02-26 15:20 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 15:20 [Qemu-devel] [PULL 00/20] target-arm queue Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 01/20] target-arm: Give CPSR setting on 32-bit exception return its own helper Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 02/20] target-arm: Add write_type argument to cpsr_write() Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 03/20] target-arm: Raw CPSR writes should skip checks and bank switching Peter Maydell
2016-02-26 15:20 ` Peter Maydell [this message]
2016-02-26 15:20 ` [Qemu-devel] [PULL 05/20] target-arm: In cpsr_write() ignore mode switches from User mode Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 06/20] target-arm: Add comment about not implementing NSACR.RFR Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 07/20] target-arm: Add Hyp mode checks to bad_mode_switch() Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 08/20] target-arm: Forbid mode switch to Mon from Secure EL1 Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 09/20] target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 10/20] target-arm: Make mode switches from Hyp via CPS and MRS illegal Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 11/20] target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1 Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 12/20] target-arm: Fix handling of SDCR for 32-bit code Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 13/20] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 14/20] ARM: PL061: Checking register r/w accesses to reserved area Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 15/20] raspi: fix SD card with recent sdhci changes Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 16/20] MAINTAINERS: Add some missing ARM related header files Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 17/20] sdhci: Revert "add optional quirk property to disable card insertion/removal interrupts" Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 18/20] sdhci: add quirk property for card insert interrupt status on Raspberry Pi Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 19/20] target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAW Peter Maydell
2016-02-26 15:20 ` [Qemu-devel] [PULL 20/20] target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF Peter Maydell
2016-02-26 16:42 ` [Qemu-devel] [PULL 00/20] target-arm queue Peter Maydell
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