From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51654) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aagLp-0001Fy-OT for qemu-devel@nongnu.org; Tue, 01 Mar 2016 04:12:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aagLm-0007UF-GX for qemu-devel@nongnu.org; Tue, 01 Mar 2016 04:12:17 -0500 Received: from e23smtp02.au.ibm.com ([202.81.31.144]:32873) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aagLl-0007Tv-UT for qemu-devel@nongnu.org; Tue, 01 Mar 2016 04:12:14 -0500 Received: from localhost by e23smtp02.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 1 Mar 2016 19:12:12 +1000 From: Alexey Kardashevskiy Date: Tue, 1 Mar 2016 20:10:30 +1100 Message-Id: <1456823441-46757-6-git-send-email-aik@ozlabs.ru> In-Reply-To: <1456823441-46757-1-git-send-email-aik@ozlabs.ru> References: <1456823441-46757-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH qemu v13 05/16] spapr_iommu: Add root memory region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , Alex Williamson , qemu-ppc@nongnu.org We are going to have multiple DMA windows at different offsets on a PCI bus. For the sake of migration, we will have as many TCE table objects pre-created as many windows supported. So we need a way to map windows dynamically onto a PCI bus when migration of a table is completed but at this stage a TCE table object does not have access to a PHB to ask it to map a DMA window backed by just migrated TCE table. This adds a "root" memory region (UINT64_MAX long) to the TCE object. This new region is mapped on a PCI bus with enabled overlapping as there will be one root MR per TCE table, each of them mapped at 0. The actual IOMMU memory region is a subregion of the root region and a TCE table enables/disables this subregion and maps it at the specific offset inside the root MR which is 1:1 mapping of a PCI address space. Signed-off-by: Alexey Kardashevskiy Reviewed-by: David Gibson Reviewed-by: Thomas Huth --- hw/ppc/spapr_iommu.c | 13 ++++++++++--- hw/ppc/spapr_pci.c | 5 +++-- include/hw/ppc/spapr.h | 2 +- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index e66e128..ba9ddbb 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -172,10 +172,15 @@ static MemoryRegionIOMMUOps spapr_iommu_ops = { static int spapr_tce_table_realize(DeviceState *dev) { sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); + Object *tcetobj = OBJECT(tcet); + char tmp[32]; tcet->fd = -1; - memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops, - "iommu-spapr", 0); + snprintf(tmp, sizeof(tmp), "tce-root-%x", tcet->liobn); + memory_region_init(&tcet->root, tcetobj, tmp, UINT64_MAX); + + snprintf(tmp, sizeof(tmp), "tce-iommu-%x", tcet->liobn); + memory_region_init_iommu(&tcet->iommu, tcetobj, &spapr_iommu_ops, tmp, 0); QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list); @@ -253,6 +258,7 @@ static void spapr_tce_table_do_enable(sPAPRTCETable *tcet) memory_region_set_size(&tcet->iommu, (uint64_t)tcet->nb_table << tcet->page_shift); + memory_region_add_subregion(&tcet->root, tcet->bus_offset, &tcet->iommu); tcet->enabled = true; } @@ -279,6 +285,7 @@ static void spapr_tce_table_disable(sPAPRTCETable *tcet) return; } + memory_region_del_subregion(&tcet->root, &tcet->iommu); memory_region_set_size(&tcet->iommu, 0); spapr_tce_free_table(tcet->table, tcet->fd, tcet->nb_table); @@ -302,7 +309,7 @@ static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp) MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet) { - return &tcet->iommu; + return &tcet->root; } static void spapr_tce_reset(DeviceState *dev) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index c34a906..7b40687 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -822,8 +822,6 @@ static int spapr_phb_dma_window_enable(sPAPRPHBState *sphb, spapr_tce_table_enable(tcet, page_shift, window_addr, nb_table, false); - memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset, - spapr_tce_get_iommu(tcet)); return 0; } @@ -1411,6 +1409,9 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) return; } + memory_region_add_subregion(&sphb->iommu_root, 0, + spapr_tce_get_iommu(tcet)); + /* Register default 32bit DMA window */ spapr_phb_dma_window_enable(sphb, sphb->dma_liobn, SPAPR_TCE_PAGE_SHIFT, diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3e6bb84..bdf27ec 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -548,7 +548,7 @@ struct sPAPRTCETable { bool bypass; bool need_vfio; int fd; - MemoryRegion iommu; + MemoryRegion root, iommu; struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */ QLIST_ENTRY(sPAPRTCETable) list; }; -- 2.5.0.rc3