From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47636) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab8KY-00058y-Ql for qemu-devel@nongnu.org; Wed, 02 Mar 2016 10:04:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ab8KT-0005pQ-2V for qemu-devel@nongnu.org; Wed, 02 Mar 2016 10:04:50 -0500 Received: from mx1.redhat.com ([209.132.183.28]:58657) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab8KS-0005pJ-MI for qemu-devel@nongnu.org; Wed, 02 Mar 2016 10:04:44 -0500 From: Paolo Bonzini Date: Wed, 2 Mar 2016 16:04:38 +0100 Message-Id: <1456931078-21635-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH] target-i386: fix addr16 prefix List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: hpoussin@reactos.org, rth@twiddle.net While ADDSEG will only be false in 16-bit mode for LEA, it can be false even in other cases when 16-bit addresses are obtained via the 67h prefix in 32-bit mode. In this case, gen_lea_v_seg forgets to add a nonzero FS or GS base if CS/DS/ES/SS are all zero. This case is pretty rare but happens when booting Windows 95/98, and this patch fixes it. The bug is visible since commit d6a291498, but it was introduced together with gen_lea_v_seg and it probably could be reproduced with a "addr16 gs movsb" instruction as early as in commit ca2f29f555805d07fb0b9ebfbbfc4e3656530977. Cc: rth@twiddle.net Reported-by: Herv=C3=A9 Poussineau Signed-off-by: Paolo Bonzini --- target-i386/translate.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index aaac3c2..b11dfbd 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -466,15 +466,15 @@ static void gen_lea_v_seg(DisasContext *s, TCGMemOp= aflag, TCGv a0, break; case MO_16: /* 16 bit address */ - if (ovr_seg < 0) { - ovr_seg =3D def_seg; - } tcg_gen_ext16u_tl(cpu_A0, a0); - /* ADDSEG will only be false in 16-bit mode for LEA. */ - if (!s->addseg) { - return; - } a0 =3D cpu_A0; + if (ovr_seg < 0) { + if (s->addseg) { + ovr_seg =3D def_seg; + } else { + return; + } + } break; default: tcg_abort(); --=20 2.5.0