* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2014-02-20 11:17 Peter Maydell
2014-02-21 16:01 ` Peter Maydell
0 siblings, 1 reply; 42+ messages in thread
From: Peter Maydell @ 2014-02-20 11:17 UTC (permalink / raw)
To: Anthony Liguori; +Cc: Blue Swirl, qemu-devel, Aurelien Jarno
Here's the latest target-arm pull request. There are definitely
more things still in the pipeline so there will be at least one
more before softfreeze...
thanks
-- PMM
The following changes since commit 46eef33b89e936ca793e13c4aeea1414e97e8dbb:
Fix QEMU build on OpenBSD on x86 archs (2014-02-17 11:44:00 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140220
for you to fetch changes up to 2ea5a2ca1f1dc302652d2ad5035e0b209ccaa177:
linux-user: AArch64: Fix exclusive store of the zero register (2014-02-20 10:35:56 +0000)
----------------------------------------------------------------
target-arm queue:
* Fix a bug causing an assertion in the NVIC on ARMv7M models
* More A64 Neon instructions
* Refactor cpreg API to separate out access check functions, as
groundwork for AArch64 system mode
* Fix bug in linux-user A64 store-exclusive of XZR
----------------------------------------------------------------
Alex Bennée (2):
target-arm: A64: Implement SIMD FP compare and set insns
target-arm: A64: Implement floating point pairwise insns
Janne Grunau (1):
linux-user: AArch64: Fix exclusive store of the zero register
Peter Maydell (27):
hw/intc/arm_gic: Fix NVIC assertion failure
target-arm: A64: Implement plain vector SIMD indexed element insns
target-arm: A64: Implement long vector x indexed insns
target-arm: A64: Implement SIMD scalar indexed instructions
target-arm: A64: Implement scalar three different instructions
softfloat: Support halving the result of muladd operation
target-arm: A64: Implement remaining 3-same instructions
target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
target-arm: Define names for SCTLR bits
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
target-arm: Remove unused ARMCPUState sr substruct
target-arm: Log bad system register accesses with LOG_UNIMP
target-arm: Stop underdecoding ARM946 PRBS registers
target-arm: Split cpreg access checks out from read/write functions
target-arm: Convert performance monitor reginfo to accessfn
target-arm: Convert generic timer reginfo to accessfn
target-arm: Convert miscellaneous reginfo structs to accessfn
target-arm: Drop success/fail return from cpreg read and write functions
target-arm: Remove unnecessary code now read/write fns can't fail
target-arm: Remove failure status return from read/write_raw_cp_reg
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
target-arm: A64: Implement store-exclusive for system mode
target-arm: A64: Add opcode comments to disas_simd_three_reg_diff
target-arm: A64: Add most remaining three-reg-diff widening ops
target-arm: A64: Implement the wide 3-reg-different operations
target-arm: A64: Implement narrowing three-reg-diff operations
target-arm: A64: Implement unprivileged load/store
fpu/softfloat.c | 38 ++
hw/arm/pxa2xx.c | 36 +-
hw/arm/pxa2xx_pic.c | 11 +-
hw/intc/arm_gic.c | 2 +-
include/fpu/softfloat.h | 3 +
linux-user/main.c | 6 +-
target-arm/cpu.c | 8 +-
target-arm/cpu.h | 105 +++-
target-arm/helper-a64.c | 105 ++++
target-arm/helper-a64.h | 9 +
target-arm/helper.c | 620 +++++++++-----------
target-arm/helper.h | 3 +
target-arm/kvm-consts.h | 16 +-
target-arm/neon_helper.c | 16 +
target-arm/op_helper.c | 46 +-
target-arm/translate-a64.c | 1358 ++++++++++++++++++++++++++++++++++++++------
target-arm/translate.c | 28 +-
17 files changed, 1815 insertions(+), 595 deletions(-)
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2014-02-20 11:17 Peter Maydell
@ 2014-02-21 16:01 ` Peter Maydell
0 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2014-02-21 16:01 UTC (permalink / raw)
To: Anthony Liguori; +Cc: Blue Swirl, QEMU Developers, Aurelien Jarno
On 20 February 2014 11:17, Peter Maydell <peter.maydell@linaro.org> wrote:
> Here's the latest target-arm pull request. There are definitely
> more things still in the pipeline so there will be at least one
> more before softfreeze...
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-03-04 11:41 Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 01/30] target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode Peter Maydell
` (30 more replies)
0 siblings, 31 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
Here's the target-arm queue: fairly large with a roundup of lots
of patches that hit the list at or just before the softfreeze
deadline. Most notable thing in here is Peter/Paolo's bigendian
and SETEND support patchset.
There are still some patchsets on list that I haven't got to
reviewing yet (eg last set of raspi patches, imx6) which I hope
to get to early next week and into a pullreq next week sometime.
thanks
-- PMM
The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc:
Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304
for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b:
target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000)
----------------------------------------------------------------
target-arm queue:
* Correct handling of writes to CPSR from gdbstub in user mode
* virt: lift maximum RAM limit to 255GB
* sdhci: implement reset
* virt: if booting in Secure mode, provide secure-only RAM, make first
flash device secure-only, and assume the EL3 boot rom will handle PSCI
* bcm2835: use explicit endianness accessors rather than ldl/stl_phys
* support big-endian in system mode for ARM
* implement SETEND instruction
* arm_gic: implement the GICv2 GICC_DIR register
* fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon
----------------------------------------------------------------
Andrew Baumann (1):
bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses
Paolo Bonzini (8):
linux-user: arm: fix coding style for some linux-user signal functions
linux-user: arm: pass env to get_user_code_*
target-arm: implement SCTLR.B, drop bswap_code
linux-user: arm: handle CPSR.E correctly in strex emulation
target-arm: pass DisasContext to gen_aa32_ld*/st*
target-arm: introduce disas flag for endianness
target-arm: implement setend
target-arm: implement BE32 mode in system emulation
Peter Crosthwaite (10):
target-arm: cpu: Move cpu_is_big_endian to header
arm: cpu: handle BE32 user-mode as BE
linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
target-arm: implement SCTLR.EE
target-arm: a64: Add endianness support
target-arm: introduce tbflag for endianness
loader: add API to load elf header
loader: load_elf(): Add doc comment
loader: Add data swap option to load-elf
arm: boot: Support big-endian elfs
Peter Maydell (10):
target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
virt: Lift the maximum RAM limit from 30GB to 255GB
sd.c: Handle NULL block backend in sd_get_inserted()
sdhci: Implement DeviceClass reset
hw/arm/virt: Provide a secure-only RAM if booting in Secure mode
loader: Add load_image_mr() to load ROM image to a MemoryRegion
hw/arm/virt: Load bios image to MemoryRegion, not physaddr
hw/arm/virt: Make first flash device Secure-only if booting secure
hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided
hw/intc/arm_gic.c: Implement GICv2 GICC_DIR
Ralf-Philipp Weinmann (1):
target-arm: Only trap SRS from S-EL1 if specified mode is MON
hw/alpha/dp264.c | 4 +-
hw/arm/armv7m.c | 2 +-
hw/arm/boot.c | 93 ++++++++-
hw/arm/virt.c | 168 +++++++++++++----
hw/core/loader.c | 99 +++++++++-
hw/cpu/a15mpcore.c | 2 +-
hw/cris/boot.c | 2 +-
hw/i386/multiboot.c | 3 +-
hw/intc/arm_gic.c | 45 ++++-
hw/intc/arm_gic_common.c | 2 +-
hw/lm32/lm32_boards.c | 4 +-
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/dummy_m68k.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/microblaze/boot.c | 4 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/misc/bcm2835_mbox.c | 6 +-
hw/misc/bcm2835_property.c | 38 ++--
hw/moxie/moxiesim.c | 3 +-
hw/openrisc/openrisc_sim.c | 3 +-
hw/pci-host/prep.c | 2 +-
hw/ppc/e500.c | 2 +-
hw/ppc/mac_newworld.c | 5 +-
hw/ppc/mac_oldworld.c | 5 +-
hw/ppc/ppc440_bamboo.c | 3 +-
hw/ppc/spapr.c | 6 +-
hw/ppc/virtex_ml507.c | 3 +-
hw/s390x/ipl.c | 4 +-
hw/sd/sd.c | 2 +-
hw/sd/sdhci.c | 21 ++-
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 4 +-
hw/sparc64/sun4u.c | 4 +-
hw/tricore/tricore_testboard.c | 2 +-
hw/xtensa/sim.c | 4 +-
hw/xtensa/xtfpga.c | 2 +-
include/hw/arm/arm.h | 9 +
include/hw/arm/virt.h | 1 +
include/hw/elf_ops.h | 22 ++-
include/hw/loader.h | 59 +++++-
linux-user/main.c | 77 ++++++--
linux-user/signal.c | 110 +++++------
target-arm/arm_ldst.h | 8 +-
target-arm/cpu.c | 21 +--
target-arm/cpu.h | 98 +++++++++-
target-arm/helper.c | 42 ++++-
target-arm/helper.h | 1 +
target-arm/op_helper.c | 5 +
target-arm/translate-a64.c | 56 +++---
target-arm/translate.c | 418 ++++++++++++++++++++++++-----------------
target-arm/translate.h | 3 +-
55 files changed, 1064 insertions(+), 431 deletions(-)
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 01/30] target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 02/30] virt: Lift the maximum RAM limit from 30GB to 255GB Peter Maydell
` (29 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
In helper.c the expression
(env->uncached_cpsr & CPSR_M) != CPSR_USER
is always true; the right hand side was supposed to be ARM_CPU_MODE_USR
(an error in commit cb01d391).
Since the incorrect expression was always true, this just meant that
commit cb01d391 had no effect.
However simply changing the RHS here would reveal a logic error: if
the mode is USR we wish to completely ignore the attempt to set the
mode bits, which means that we must clear the CPSR_M bits from mask
to avoid the uncached_cpsr bits being updated at the end of the
function.
Move the condition into the correct place in the code, fix its RHS
constant, and add a comment about the fact that we must be doing a
gdbstub write if we're in user mode.
Fixes: https://bugs.launchpad.net/qemu/+bug/1550503
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1456764438-30015-1-git-send-email-peter.maydell@linaro.org
---
target-arm/helper.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 18c8296..935f13b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5490,9 +5490,16 @@ void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask,
env->daif |= val & CPSR_AIF & mask;
if (write_type != CPSRWriteRaw &&
- (env->uncached_cpsr & CPSR_M) != CPSR_USER &&
((env->uncached_cpsr ^ val) & mask & CPSR_M)) {
- if (bad_mode_switch(env, val & CPSR_M, write_type)) {
+ if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) {
+ /* Note that we can only get here in USR mode if this is a
+ * gdb stub write; for this case we follow the architectural
+ * behaviour for guest writes in USR mode of ignoring an attempt
+ * to switch mode. (Those are caught by translate.c for writes
+ * triggered by guest instructions.)
+ */
+ mask &= ~CPSR_M;
+ } else if (bad_mode_switch(env, val & CPSR_M, write_type)) {
/* Attempt to switch to an invalid mode: this is UNPREDICTABLE in
* v7, and has defined behaviour in v8:
* + leave CPSR.M untouched
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 02/30] virt: Lift the maximum RAM limit from 30GB to 255GB
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 01/30] target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 03/30] sd.c: Handle NULL block backend in sd_get_inserted() Peter Maydell
` (28 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
The virt board restricts guests to only 30GB of RAM. This is a
hangover from the vexpress-a15 board, and there's no inherent reason
for it. 30GB is smaller than you might reasonably want to provision
a VM for on a beefy server machine. Raise the limit to 255GB.
We choose 255GB because the available space we currently have
below the 1TB boundary is up to the 512GB mark, but we don't
want to paint ourselves into a corner by assigning it all to
RAM. So we make half of it available for RAM, with the 256GB..512GB
range available for future non-RAM expansion purposes.
If we need to provide more RAM to VMs in the future then we need to:
* allocate a second bank of RAM starting at 2TB and working up
* fix the DT and ACPI table generation code in QEMU to correctly
report two split lumps of RAM to the guest
* fix KVM in the host kernel to allow guests with >40 bit address spaces
The last of these is obviously the trickiest, but it seems
reasonable to assume that anybody configuring a VM with a quarter
of a terabyte of RAM will be doing it on a host with more than a
terabyte of physical address space.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Tested-by: Wei Huang <wei@redhat.com>
Message-id: 1456402182-11651-1-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 44bbbea..7a56b46 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -95,6 +95,23 @@ typedef struct {
#define VIRT_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
+/* RAM limit in GB. Since VIRT_MEM starts at the 1GB mark, this means
+ * RAM can go up to the 256GB mark, leaving 256GB of the physical
+ * address space unallocated and free for future use between 256G and 512G.
+ * If we need to provide more RAM to VMs in the future then we need to:
+ * * allocate a second bank of RAM starting at 2TB and working up
+ * * fix the DT and ACPI table generation code in QEMU to correctly
+ * report two split lumps of RAM to the guest
+ * * fix KVM in the host kernel to allow guests with >40 bit address spaces
+ * (We don't want to fill all the way up to 512GB with RAM because
+ * we might want it for non-RAM purposes later. Conversely it seems
+ * reasonable to assume that anybody configuring a VM with a quarter
+ * of a terabyte of RAM will be doing it on a host with more than a
+ * terabyte of physical address space.)
+ */
+#define RAMLIMIT_GB 255
+#define RAMLIMIT_BYTES (RAMLIMIT_GB * 1024ULL * 1024 * 1024)
+
/* Addresses and sizes of our components.
* 0..128MB is space for a flash device so we can run bootrom code such as UEFI.
* 128MB..256MB is used for miscellaneous device I/O.
@@ -130,7 +147,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_PCIE_MMIO] = { 0x10000000, 0x2eff0000 },
[VIRT_PCIE_PIO] = { 0x3eff0000, 0x00010000 },
[VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
- [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
+ [VIRT_MEM] = { 0x40000000, RAMLIMIT_BYTES },
/* Second PCIe window, 512GB wide at the 512GB boundary */
[VIRT_PCIE_MMIO_HIGH] = { 0x8000000000ULL, 0x8000000000ULL },
};
@@ -1066,7 +1083,7 @@ static void machvirt_init(MachineState *machine)
vbi->smp_cpus = smp_cpus;
if (machine->ram_size > vbi->memmap[VIRT_MEM].size) {
- error_report("mach-virt: cannot model more than 30GB RAM");
+ error_report("mach-virt: cannot model more than %dGB RAM", RAMLIMIT_GB);
exit(1);
}
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 03/30] sd.c: Handle NULL block backend in sd_get_inserted()
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 01/30] target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 02/30] virt: Lift the maximum RAM limit from 30GB to 255GB Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 04/30] sdhci: Implement DeviceClass reset Peter Maydell
` (27 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
The sd.c SD card emulation code can be in a state where the
SDState BlockBackend pointer is NULL; this is treated as
"card not present". Add a missing check to sd_get_inserted()
so that we don't segfault in this situation.
(This could be provoked by the guest writing to the SDHCI
register to do a reset on a xilinx-zynq-a9 board; it will
also happen at startup when sdhci implements its DeviceClass
reset method.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 1456493044-10025-2-git-send-email-peter.maydell@linaro.org
---
hw/sd/sd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index edb6b32..00c320d 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -449,7 +449,7 @@ static void sd_reset(DeviceState *dev)
static bool sd_get_inserted(SDState *sd)
{
- return blk_is_inserted(sd->blk);
+ return sd->blk && blk_is_inserted(sd->blk);
}
static bool sd_get_readonly(SDState *sd)
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 04/30] sdhci: Implement DeviceClass reset
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 03/30] sd.c: Handle NULL block backend in sd_get_inserted() Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 05/30] hw/arm/virt: Provide a secure-only RAM if booting in Secure mode Peter Maydell
` (26 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
The sdhci device was missing a DeviceClass reset method;
implement it. Poweron reset looks the same as reset commanded
by the guest via the device registers, apart from modelling of
the rpi 'pending insert interrupt on powerup' quirk.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Message-id: 1456493044-10025-3-git-send-email-peter.maydell@linaro.org
---
hw/sd/sdhci.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e087c17..d28b587 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -207,6 +207,21 @@ static void sdhci_reset(SDHCIState *s)
s->pending_insert_state = false;
}
+static void sdhci_poweron_reset(DeviceState *dev)
+{
+ /* QOM (ie power-on) reset. This is identical to reset
+ * commanded via device register apart from handling of the
+ * 'pending insert on powerup' quirk.
+ */
+ SDHCIState *s = (SDHCIState *)dev;
+
+ sdhci_reset(s);
+
+ if (s->pending_insert_quirk) {
+ s->pending_insert_state = true;
+ }
+}
+
static void sdhci_data_transfer(void *opaque);
static void sdhci_send_command(SDHCIState *s)
@@ -1290,6 +1305,7 @@ static void sdhci_pci_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->vmsd = &sdhci_vmstate;
dc->props = sdhci_pci_properties;
+ dc->reset = sdhci_poweron_reset;
}
static const TypeInfo sdhci_pci_info = {
@@ -1332,10 +1348,6 @@ static void sdhci_sysbus_realize(DeviceState *dev, Error ** errp)
memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
SDHC_REGISTERS_MAP_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
-
- if (s->pending_insert_quirk) {
- s->pending_insert_state = true;
- }
}
static void sdhci_sysbus_class_init(ObjectClass *klass, void *data)
@@ -1345,6 +1357,7 @@ static void sdhci_sysbus_class_init(ObjectClass *klass, void *data)
dc->vmsd = &sdhci_vmstate;
dc->props = sdhci_sysbus_properties;
dc->realize = sdhci_sysbus_realize;
+ dc->reset = sdhci_poweron_reset;
}
static const TypeInfo sdhci_sysbus_info = {
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 05/30] hw/arm/virt: Provide a secure-only RAM if booting in Secure mode
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 04/30] sdhci: Implement DeviceClass reset Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 06/30] loader: Add load_image_mr() to load ROM image to a MemoryRegion Peter Maydell
` (25 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
If we're booting in Secure mode, provide a secure-only RAM
(just 16MB) so that secure firmware has somewhere to run
from that won't be accessible to the Non-secure guest.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455288361-30117-2-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 23 +++++++++++++++++++++++
include/hw/arm/virt.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7a56b46..a7e6a74 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -144,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
+ [VIRT_SECURE_MEM] = { 0x0e000000, 0x01000000 },
[VIRT_PCIE_MMIO] = { 0x10000000, 0x2eff0000 },
[VIRT_PCIE_PIO] = { 0x3eff0000, 0x00010000 },
[VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
@@ -977,6 +978,27 @@ static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic)
sysbus_mmio_get_region(s, 0));
}
+static void create_secure_ram(VirtBoardInfo *vbi, MemoryRegion *secure_sysmem)
+{
+ MemoryRegion *secram = g_new(MemoryRegion, 1);
+ char *nodename;
+ hwaddr base = vbi->memmap[VIRT_SECURE_MEM].base;
+ hwaddr size = vbi->memmap[VIRT_SECURE_MEM].size;
+
+ memory_region_init_ram(secram, NULL, "virt.secure-ram", size, &error_fatal);
+ vmstate_register_ram_global(secram);
+ memory_region_add_subregion(secure_sysmem, base, secram);
+
+ nodename = g_strdup_printf("/secram@%" PRIx64, base);
+ qemu_fdt_add_subnode(vbi->fdt, nodename);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "device_type", "memory");
+ qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", 2, base, 2, size);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "status", "disabled");
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "secure-status", "okay");
+
+ g_free(nodename);
+}
+
static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
{
const VirtBoardInfo *board = (const VirtBoardInfo *)binfo;
@@ -1169,6 +1191,7 @@ static void machvirt_init(MachineState *machine)
create_uart(vbi, pic, VIRT_UART, sysmem);
if (vms->secure) {
+ create_secure_ram(vbi, secure_sysmem);
create_uart(vbi, pic, VIRT_SECURE_UART, secure_sysmem);
}
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 1ce7847..ecd8589 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -61,6 +61,7 @@ enum {
VIRT_PCIE_MMIO_HIGH,
VIRT_GPIO,
VIRT_SECURE_UART,
+ VIRT_SECURE_MEM,
};
typedef struct MemMapEntry {
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 06/30] loader: Add load_image_mr() to load ROM image to a MemoryRegion
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 05/30] hw/arm/virt: Provide a secure-only RAM if booting in Secure mode Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: Load bios image to MemoryRegion, not physaddr Peter Maydell
` (24 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
Add a new function load_image_mr(), which behaves like
load_image_targphys() except that it loads the ROM image to
a specified MemoryRegion rather than to a specified physical
address. This is useful when a ROM blob needs to be loaded
to a particular flash or ROM device but the address of that
device in the machine's address space is not known. (For
instance, ROMs in devices, or ROMs which might exist in
a different address space to the system address space.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455288361-30117-3-git-send-email-peter.maydell@linaro.org
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/core/loader.c | 35 +++++++++++++++++++++++++++++++----
include/hw/loader.h | 18 ++++++++++++++++--
2 files changed, 47 insertions(+), 6 deletions(-)
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 3a57415..260b3d6 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -147,6 +147,28 @@ int load_image_targphys(const char *filename,
return size;
}
+int load_image_mr(const char *filename, MemoryRegion *mr)
+{
+ int size;
+
+ if (!memory_access_is_direct(mr, false)) {
+ /* Can only load an image into RAM or ROM */
+ return -1;
+ }
+
+ size = get_image_size(filename);
+
+ if (size > memory_region_size(mr)) {
+ return -1;
+ }
+ if (size > 0) {
+ if (rom_add_file_mr(filename, mr, -1) < 0) {
+ return -1;
+ }
+ }
+ return size;
+}
+
void pstrcpy_targphys(const char *name, hwaddr dest, int buf_size,
const char *source)
{
@@ -751,7 +773,7 @@ static void *rom_set_mr(Rom *rom, Object *owner, const char *name)
int rom_add_file(const char *file, const char *fw_dir,
hwaddr addr, int32_t bootindex,
- bool option_rom)
+ bool option_rom, MemoryRegion *mr)
{
MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
Rom *rom;
@@ -818,7 +840,12 @@ int rom_add_file(const char *file, const char *fw_dir,
fw_cfg_add_file(fw_cfg, fw_file_name, data, rom->romsize);
} else {
- snprintf(devpath, sizeof(devpath), "/rom@" TARGET_FMT_plx, addr);
+ if (mr) {
+ rom->mr = mr;
+ snprintf(devpath, sizeof(devpath), "/rom@%s", file);
+ } else {
+ snprintf(devpath, sizeof(devpath), "/rom@" TARGET_FMT_plx, addr);
+ }
}
add_boot_device_path(bootindex, NULL, devpath);
@@ -892,12 +919,12 @@ int rom_add_elf_program(const char *name, void *data, size_t datasize,
int rom_add_vga(const char *file)
{
- return rom_add_file(file, "vgaroms", 0, -1, true);
+ return rom_add_file(file, "vgaroms", 0, -1, true, NULL);
}
int rom_add_option(const char *file, int32_t bootindex)
{
- return rom_add_file(file, "genroms", 0, bootindex, true);
+ return rom_add_file(file, "genroms", 0, bootindex, true, NULL);
}
static void rom_reset(void *unused)
diff --git a/include/hw/loader.h b/include/hw/loader.h
index f7b43ab..09c3764 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -16,6 +16,18 @@ int load_image(const char *filename, uint8_t *addr); /* deprecated */
ssize_t load_image_size(const char *filename, void *addr, size_t size);
int load_image_targphys(const char *filename, hwaddr,
uint64_t max_sz);
+/**
+ * load_image_mr: load an image into a memory region
+ * @filename: Path to the image file
+ * @mr: Memory Region to load into
+ *
+ * Load the specified file into the memory region.
+ * The file loaded is registered as a ROM, so its contents will be
+ * reinstated whenever the system is reset.
+ * If the file is larger than the memory region's size the call will fail.
+ * Returns -1 on failure, or the size of the file.
+ */
+int load_image_mr(const char *filename, MemoryRegion *mr);
/* This is the limit on the maximum uncompressed image size that
* load_image_gzipped_buffer() and load_image_gzipped() will read. It prevents
@@ -67,7 +79,7 @@ extern bool rom_file_has_mr;
int rom_add_file(const char *file, const char *fw_dir,
hwaddr addr, int32_t bootindex,
- bool option_rom);
+ bool option_rom, MemoryRegion *mr);
MemoryRegion *rom_add_blob(const char *name, const void *blob, size_t len,
size_t max_len, hwaddr addr,
const char *fw_file_name,
@@ -82,9 +94,11 @@ void *rom_ptr(hwaddr addr);
void hmp_info_roms(Monitor *mon, const QDict *qdict);
#define rom_add_file_fixed(_f, _a, _i) \
- rom_add_file(_f, NULL, _a, _i, false)
+ rom_add_file(_f, NULL, _a, _i, false, NULL)
#define rom_add_blob_fixed(_f, _b, _l, _a) \
rom_add_blob(_f, _b, _l, _l, _a, NULL, NULL, NULL)
+#define rom_add_file_mr(_f, _mr, _i) \
+ rom_add_file(_f, NULL, 0, _i, false, mr)
#define PC_ROM_MIN_VGA 0xc0000
#define PC_ROM_MIN_OPTION 0xc8000
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 07/30] hw/arm/virt: Load bios image to MemoryRegion, not physaddr
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 06/30] loader: Add load_image_mr() to load ROM image to a MemoryRegion Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 08/30] hw/arm/virt: Make first flash device Secure-only if booting secure Peter Maydell
` (23 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
If we're loading a BIOS image into the first flash device,
load it into the flash's memory region specifically, not
into the physical address where the flash resides. This will
make a difference when the flash might be in the Secure
address space rather than the Nonsecure one.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455288361-30117-4-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 39 ++++++++++++++++++++-------------------
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a7e6a74..c1d2832 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -696,13 +696,14 @@ static void create_virtio_devices(const VirtBoardInfo *vbi, qemu_irq *pic)
}
static void create_one_flash(const char *name, hwaddr flashbase,
- hwaddr flashsize)
+ hwaddr flashsize, const char *file)
{
/* Create and map a single flash device. We use the same
* parameters as the flash devices on the Versatile Express board.
*/
DriveInfo *dinfo = drive_get_next(IF_PFLASH);
DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
const uint64_t sectorlength = 256 * 1024;
if (dinfo) {
@@ -722,19 +723,9 @@ static void create_one_flash(const char *name, hwaddr flashbase,
qdev_prop_set_string(dev, "name", name);
qdev_init_nofail(dev);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, flashbase);
-}
-
-static void create_flash(const VirtBoardInfo *vbi)
-{
- /* Create two flash devices to fill the VIRT_FLASH space in the memmap.
- * Any file passed via -bios goes in the first of these.
- */
- hwaddr flashsize = vbi->memmap[VIRT_FLASH].size / 2;
- hwaddr flashbase = vbi->memmap[VIRT_FLASH].base;
- char *nodename;
+ sysbus_mmio_map(sbd, 0, flashbase);
- if (bios_name) {
+ if (file) {
char *fn;
int image_size;
@@ -744,21 +735,31 @@ static void create_flash(const VirtBoardInfo *vbi)
"but you cannot use both options at once");
exit(1);
}
- fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+ fn = qemu_find_file(QEMU_FILE_TYPE_BIOS, file);
if (!fn) {
- error_report("Could not find ROM image '%s'", bios_name);
+ error_report("Could not find ROM image '%s'", file);
exit(1);
}
- image_size = load_image_targphys(fn, flashbase, flashsize);
+ image_size = load_image_mr(fn, sysbus_mmio_get_region(sbd, 0));
g_free(fn);
if (image_size < 0) {
- error_report("Could not load ROM image '%s'", bios_name);
+ error_report("Could not load ROM image '%s'", file);
exit(1);
}
}
+}
+
+static void create_flash(const VirtBoardInfo *vbi)
+{
+ /* Create two flash devices to fill the VIRT_FLASH space in the memmap.
+ * Any file passed via -bios goes in the first of these.
+ */
+ hwaddr flashsize = vbi->memmap[VIRT_FLASH].size / 2;
+ hwaddr flashbase = vbi->memmap[VIRT_FLASH].base;
+ char *nodename;
- create_one_flash("virt.flash0", flashbase, flashsize);
- create_one_flash("virt.flash1", flashbase + flashsize, flashsize);
+ create_one_flash("virt.flash0", flashbase, flashsize, bios_name);
+ create_one_flash("virt.flash1", flashbase + flashsize, flashsize, NULL);
nodename = g_strdup_printf("/flash@%" PRIx64, flashbase);
qemu_fdt_add_subnode(vbi->fdt, nodename);
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 08/30] hw/arm/virt: Make first flash device Secure-only if booting secure
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: Load bios image to MemoryRegion, not physaddr Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 09/30] hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided Peter Maydell
` (22 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
If the virt board is started with the 'secure' property set to
request a Secure setup, then make the first flash device be
visible only to the Secure world.
This is a breaking change, but I don't expect it to be noticed
by anybody, because running TZ-aware guests isn't common and
those guests are generally going to be booting from the flash
and implicitly expecting their Non-secure guests to not touch it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455288361-30117-5-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++-------------
1 file changed, 49 insertions(+), 14 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c1d2832..e53e1ce 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -696,7 +696,8 @@ static void create_virtio_devices(const VirtBoardInfo *vbi, qemu_irq *pic)
}
static void create_one_flash(const char *name, hwaddr flashbase,
- hwaddr flashsize, const char *file)
+ hwaddr flashsize, const char *file,
+ MemoryRegion *sysmem)
{
/* Create and map a single flash device. We use the same
* parameters as the flash devices on the Versatile Express board.
@@ -723,7 +724,8 @@ static void create_one_flash(const char *name, hwaddr flashbase,
qdev_prop_set_string(dev, "name", name);
qdev_init_nofail(dev);
- sysbus_mmio_map(sbd, 0, flashbase);
+ memory_region_add_subregion(sysmem, flashbase,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
if (file) {
char *fn;
@@ -749,26 +751,59 @@ static void create_one_flash(const char *name, hwaddr flashbase,
}
}
-static void create_flash(const VirtBoardInfo *vbi)
+static void create_flash(const VirtBoardInfo *vbi,
+ MemoryRegion *sysmem,
+ MemoryRegion *secure_sysmem)
{
/* Create two flash devices to fill the VIRT_FLASH space in the memmap.
* Any file passed via -bios goes in the first of these.
+ * sysmem is the system memory space. secure_sysmem is the secure view
+ * of the system, and the first flash device should be made visible only
+ * there. The second flash device is visible to both secure and nonsecure.
+ * If sysmem == secure_sysmem this means there is no separate Secure
+ * address space and both flash devices are generally visible.
*/
hwaddr flashsize = vbi->memmap[VIRT_FLASH].size / 2;
hwaddr flashbase = vbi->memmap[VIRT_FLASH].base;
char *nodename;
- create_one_flash("virt.flash0", flashbase, flashsize, bios_name);
- create_one_flash("virt.flash1", flashbase + flashsize, flashsize, NULL);
+ create_one_flash("virt.flash0", flashbase, flashsize,
+ bios_name, secure_sysmem);
+ create_one_flash("virt.flash1", flashbase + flashsize, flashsize,
+ NULL, sysmem);
- nodename = g_strdup_printf("/flash@%" PRIx64, flashbase);
- qemu_fdt_add_subnode(vbi->fdt, nodename);
- qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible", "cfi-flash");
- qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
- 2, flashbase, 2, flashsize,
- 2, flashbase + flashsize, 2, flashsize);
- qemu_fdt_setprop_cell(vbi->fdt, nodename, "bank-width", 4);
- g_free(nodename);
+ if (sysmem == secure_sysmem) {
+ /* Report both flash devices as a single node in the DT */
+ nodename = g_strdup_printf("/flash@%" PRIx64, flashbase);
+ qemu_fdt_add_subnode(vbi->fdt, nodename);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible", "cfi-flash");
+ qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
+ 2, flashbase, 2, flashsize,
+ 2, flashbase + flashsize, 2, flashsize);
+ qemu_fdt_setprop_cell(vbi->fdt, nodename, "bank-width", 4);
+ g_free(nodename);
+ } else {
+ /* Report the devices as separate nodes so we can mark one as
+ * only visible to the secure world.
+ */
+ nodename = g_strdup_printf("/secflash@%" PRIx64, flashbase);
+ qemu_fdt_add_subnode(vbi->fdt, nodename);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible", "cfi-flash");
+ qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
+ 2, flashbase, 2, flashsize);
+ qemu_fdt_setprop_cell(vbi->fdt, nodename, "bank-width", 4);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "status", "disabled");
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "secure-status", "okay");
+ g_free(nodename);
+
+ nodename = g_strdup_printf("/flash@%" PRIx64, flashbase);
+ qemu_fdt_add_subnode(vbi->fdt, nodename);
+ qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible", "cfi-flash");
+ qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg",
+ 2, flashbase + flashsize, 2, flashsize);
+ qemu_fdt_setprop_cell(vbi->fdt, nodename, "bank-width", 4);
+ g_free(nodename);
+ }
}
static void create_fw_cfg(const VirtBoardInfo *vbi, AddressSpace *as)
@@ -1185,7 +1220,7 @@ static void machvirt_init(MachineState *machine)
machine->ram_size);
memory_region_add_subregion(sysmem, vbi->memmap[VIRT_MEM].base, ram);
- create_flash(vbi);
+ create_flash(vbi, sysmem, secure_sysmem ? secure_sysmem : sysmem);
create_gic(vbi, pic, gic_version, vms->secure);
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 09/30] hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (7 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 08/30] hw/arm/virt: Make first flash device Secure-only if booting secure Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 10/30] bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses Peter Maydell
` (21 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
If the user passes us an EL3 boot rom, then it is going to want to
implement the PSCI interface itself. In this case, disable QEMU's
internal PSCI implementation so it does not get in the way, and
instead start all CPUs in an SMP configuration at once (the boot
rom will catch them all and pen up the secondaries until needed).
The boot rom code is also responsible for editing the device tree
to include any necessary information about its own PSCI implementation
before eventually passing it to a NonSecure guest.
(This "start all CPUs at once" approach is what both ARM Trusted
Firmware and UEFI expect, since it is what the ARM Foundation Model
does; the other approach would be to provide some emulated hardware
for "start the secondaries" but this is simplest.)
This is a compatibility break, but I don't believe that anybody
was using a secure boot ROM with an SMP configuration. Such a setup
would be somewhat broken since there was nothing preventing nonsecure
guest code from calling the QEMU PSCI function to start up a secondary
core in a way that completely bypassed the secure world.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1456853976-7592-1-git-send-email-peter.maydell@linaro.org
---
hw/arm/virt.c | 32 +++++++++++++++++++++++++-------
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index e53e1ce..8c6c996 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -73,6 +73,7 @@ typedef struct VirtBoardInfo {
uint32_t clock_phandle;
uint32_t gic_phandle;
uint32_t v2m_phandle;
+ bool using_psci;
} VirtBoardInfo;
typedef struct {
@@ -248,6 +249,10 @@ static void fdt_add_psci_node(const VirtBoardInfo *vbi)
void *fdt = vbi->fdt;
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
+ if (!vbi->using_psci) {
+ return;
+ }
+
qemu_fdt_add_subnode(fdt, "/psci");
if (armcpu->psci_version == 2) {
const char comp[] = "arm,psci-0.2\0arm,psci";
@@ -359,7 +364,7 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi)
qemu_fdt_setprop_string(vbi->fdt, nodename, "compatible",
armcpu->dtb_compatible);
- if (vbi->smp_cpus > 1) {
+ if (vbi->using_psci && vbi->smp_cpus > 1) {
qemu_fdt_setprop_string(vbi->fdt, nodename,
"enable-method", "psci");
}
@@ -1095,6 +1100,7 @@ static void machvirt_init(MachineState *machine)
VirtGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);
VirtGuestInfo *guest_info = &guest_info_state->info;
char **cpustr;
+ bool firmware_loaded = bios_name || drive_get(IF_PFLASH, 0, 0);
if (!cpu_model) {
cpu_model = "cortex-a15";
@@ -1122,6 +1128,15 @@ static void machvirt_init(MachineState *machine)
exit(1);
}
+ /* If we have an EL3 boot ROM then the assumption is that it will
+ * implement PSCI itself, so disable QEMU's internal implementation
+ * so it doesn't get in the way. Instead of starting secondary
+ * CPUs in PSCI powerdown state we will start them all running and
+ * let the boot ROM sort them out.
+ * The usual case is that we do use QEMU's PSCI implementation.
+ */
+ vbi->using_psci = !(vms->secure && firmware_loaded);
+
/* The maximum number of CPUs depends on the GIC version, or on how
* many redistributors we can fit into the memory map.
*/
@@ -1189,12 +1204,15 @@ static void machvirt_init(MachineState *machine)
object_property_set_bool(cpuobj, false, "has_el3", NULL);
}
- object_property_set_int(cpuobj, QEMU_PSCI_CONDUIT_HVC, "psci-conduit",
- NULL);
+ if (vbi->using_psci) {
+ object_property_set_int(cpuobj, QEMU_PSCI_CONDUIT_HVC,
+ "psci-conduit", NULL);
- /* Secondary CPUs start in PSCI powered-down state */
- if (n > 0) {
- object_property_set_bool(cpuobj, true, "start-powered-off", NULL);
+ /* Secondary CPUs start in PSCI powered-down state */
+ if (n > 0) {
+ object_property_set_bool(cpuobj, true,
+ "start-powered-off", NULL);
+ }
}
if (object_property_find(cpuobj, "reset-cbar", NULL)) {
@@ -1263,7 +1281,7 @@ static void machvirt_init(MachineState *machine)
vbi->bootinfo.board_id = -1;
vbi->bootinfo.loader_start = vbi->memmap[VIRT_MEM].base;
vbi->bootinfo.get_dtb = machvirt_dtb;
- vbi->bootinfo.firmware_loaded = bios_name || drive_get(IF_PFLASH, 0, 0);
+ vbi->bootinfo.firmware_loaded = firmware_loaded;
arm_load_kernel(ARM_CPU(first_cpu), &vbi->bootinfo);
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 10/30] bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (8 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 09/30] hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 11/30] linux-user: arm: fix coding style for some linux-user signal functions Peter Maydell
` (20 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Andrew Baumann <Andrew.Baumann@microsoft.com>
PMM pointed out that ldl_phys and stl_phys are dependent on the CPU's
endianness, whereas device model code should be independent of
it. This changes the relevant Raspberry Pi devices to explicitly call
the little-endian variants.
Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Message-id: 1456880233-22568-1-git-send-email-Andrew.Baumann@microsoft.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/bcm2835_mbox.c | 6 +++---
hw/misc/bcm2835_property.c | 38 +++++++++++++++++++-------------------
2 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 500baba..106585a 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -98,7 +98,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s)
*/
for (n = 0; n < MBOX_CHAN_COUNT; n++) {
while (s->available[n] && !(s->mbox[0].status & ARM_MS_FULL)) {
- value = ldl_phys(&s->mbox_as, n << MBOX_AS_CHAN_SHIFT);
+ value = ldl_le_phys(&s->mbox_as, n << MBOX_AS_CHAN_SHIFT);
assert(value != MBOX_INVALID_DATA); /* Pending interrupt but no data */
mbox_push(&s->mbox[0], value);
}
@@ -207,12 +207,12 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
ch = value & 0xf;
if (ch < MBOX_CHAN_COUNT) {
childaddr = ch << MBOX_AS_CHAN_SHIFT;
- if (ldl_phys(&s->mbox_as, childaddr + MBOX_AS_PENDING)) {
+ if (ldl_le_phys(&s->mbox_as, childaddr + MBOX_AS_PENDING)) {
/* Child busy, push delayed. Push it in the arm->vc mbox */
mbox_push(&s->mbox[1], value);
} else {
/* Push it directly to the child device */
- stl_phys(&s->mbox_as, childaddr, value);
+ stl_le_phys(&s->mbox_as, childaddr, value);
}
} else {
/* Invalid channel number */
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 581922a..41fbbe3 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -22,20 +22,20 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
s->addr = value;
- tot_len = ldl_phys(&s->dma_as, value);
+ tot_len = ldl_le_phys(&s->dma_as, value);
/* @(addr + 4) : Buffer response code */
value = s->addr + 8;
while (value + 8 <= s->addr + tot_len) {
- tag = ldl_phys(&s->dma_as, value);
- bufsize = ldl_phys(&s->dma_as, value + 4);
+ tag = ldl_le_phys(&s->dma_as, value);
+ bufsize = ldl_le_phys(&s->dma_as, value + 4);
/* @(value + 8) : Request/response indicator */
resplen = 0;
switch (tag) {
case 0x00000000: /* End tag */
break;
case 0x00000001: /* Get firmware revision */
- stl_phys(&s->dma_as, value + 12, 346337);
+ stl_le_phys(&s->dma_as, value + 12, 346337);
resplen = 4;
break;
case 0x00010001: /* Get board model */
@@ -44,7 +44,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
resplen = 4;
break;
case 0x00010002: /* Get board revision */
- stl_phys(&s->dma_as, value + 12, s->board_rev);
+ stl_le_phys(&s->dma_as, value + 12, s->board_rev);
resplen = 4;
break;
case 0x00010003: /* Get board MAC address */
@@ -58,24 +58,24 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010005: /* Get ARM memory */
/* base */
- stl_phys(&s->dma_as, value + 12, 0);
+ stl_le_phys(&s->dma_as, value + 12, 0);
/* size */
- stl_phys(&s->dma_as, value + 16, s->ram_size);
+ stl_le_phys(&s->dma_as, value + 16, s->ram_size);
resplen = 8;
break;
case 0x00028001: /* Set power state */
/* Assume that whatever device they asked for exists,
* and we'll just claim we set it to the desired state
*/
- tmp = ldl_phys(&s->dma_as, value + 16);
- stl_phys(&s->dma_as, value + 16, (tmp & 1));
+ tmp = ldl_le_phys(&s->dma_as, value + 16);
+ stl_le_phys(&s->dma_as, value + 16, (tmp & 1));
resplen = 8;
break;
/* Clocks */
case 0x00030001: /* Get clock state */
- stl_phys(&s->dma_as, value + 16, 0x1);
+ stl_le_phys(&s->dma_as, value + 16, 0x1);
resplen = 8;
break;
@@ -88,15 +88,15 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00030002: /* Get clock rate */
case 0x00030004: /* Get max clock rate */
case 0x00030007: /* Get min clock rate */
- switch (ldl_phys(&s->dma_as, value + 12)) {
+ switch (ldl_le_phys(&s->dma_as, value + 12)) {
case 1: /* EMMC */
- stl_phys(&s->dma_as, value + 16, 50000000);
+ stl_le_phys(&s->dma_as, value + 16, 50000000);
break;
case 2: /* UART */
- stl_phys(&s->dma_as, value + 16, 3000000);
+ stl_le_phys(&s->dma_as, value + 16, 3000000);
break;
default:
- stl_phys(&s->dma_as, value + 16, 700000000);
+ stl_le_phys(&s->dma_as, value + 16, 700000000);
break;
}
resplen = 8;
@@ -113,19 +113,19 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
/* Temperature */
case 0x00030006: /* Get temperature */
- stl_phys(&s->dma_as, value + 16, 25000);
+ stl_le_phys(&s->dma_as, value + 16, 25000);
resplen = 8;
break;
case 0x0003000A: /* Get max temperature */
- stl_phys(&s->dma_as, value + 16, 99000);
+ stl_le_phys(&s->dma_as, value + 16, 99000);
resplen = 8;
break;
case 0x00060001: /* Get DMA channels */
/* channels 2-5 */
- stl_phys(&s->dma_as, value + 12, 0x003C);
+ stl_le_phys(&s->dma_as, value + 12, 0x003C);
resplen = 4;
break;
@@ -143,12 +143,12 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
}
- stl_phys(&s->dma_as, value + 8, (1 << 31) | resplen);
+ stl_le_phys(&s->dma_as, value + 8, (1 << 31) | resplen);
value += bufsize + 12;
}
/* Buffer response code */
- stl_phys(&s->dma_as, s->addr + 4, (1 << 31));
+ stl_le_phys(&s->dma_as, s->addr + 4, (1 << 31));
}
static uint64_t bcm2835_property_read(void *opaque, hwaddr offset,
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 11/30] linux-user: arm: fix coding style for some linux-user signal functions
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (9 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 10/30] bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_* Peter Maydell
` (19 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/signal.c | 110 ++++++++++++++++++++++++++--------------------------
1 file changed, 56 insertions(+), 54 deletions(-)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 962111c..96e86c0 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -1536,82 +1536,84 @@ static void
setup_sigcontext(struct target_sigcontext *sc, /*struct _fpstate *fpstate,*/
CPUARMState *env, abi_ulong mask)
{
- __put_user(env->regs[0], &sc->arm_r0);
- __put_user(env->regs[1], &sc->arm_r1);
- __put_user(env->regs[2], &sc->arm_r2);
- __put_user(env->regs[3], &sc->arm_r3);
- __put_user(env->regs[4], &sc->arm_r4);
- __put_user(env->regs[5], &sc->arm_r5);
- __put_user(env->regs[6], &sc->arm_r6);
- __put_user(env->regs[7], &sc->arm_r7);
- __put_user(env->regs[8], &sc->arm_r8);
- __put_user(env->regs[9], &sc->arm_r9);
- __put_user(env->regs[10], &sc->arm_r10);
- __put_user(env->regs[11], &sc->arm_fp);
- __put_user(env->regs[12], &sc->arm_ip);
- __put_user(env->regs[13], &sc->arm_sp);
- __put_user(env->regs[14], &sc->arm_lr);
- __put_user(env->regs[15], &sc->arm_pc);
+ __put_user(env->regs[0], &sc->arm_r0);
+ __put_user(env->regs[1], &sc->arm_r1);
+ __put_user(env->regs[2], &sc->arm_r2);
+ __put_user(env->regs[3], &sc->arm_r3);
+ __put_user(env->regs[4], &sc->arm_r4);
+ __put_user(env->regs[5], &sc->arm_r5);
+ __put_user(env->regs[6], &sc->arm_r6);
+ __put_user(env->regs[7], &sc->arm_r7);
+ __put_user(env->regs[8], &sc->arm_r8);
+ __put_user(env->regs[9], &sc->arm_r9);
+ __put_user(env->regs[10], &sc->arm_r10);
+ __put_user(env->regs[11], &sc->arm_fp);
+ __put_user(env->regs[12], &sc->arm_ip);
+ __put_user(env->regs[13], &sc->arm_sp);
+ __put_user(env->regs[14], &sc->arm_lr);
+ __put_user(env->regs[15], &sc->arm_pc);
#ifdef TARGET_CONFIG_CPU_32
- __put_user(cpsr_read(env), &sc->arm_cpsr);
+ __put_user(cpsr_read(env), &sc->arm_cpsr);
#endif
- __put_user(/* current->thread.trap_no */ 0, &sc->trap_no);
- __put_user(/* current->thread.error_code */ 0, &sc->error_code);
- __put_user(/* current->thread.address */ 0, &sc->fault_address);
- __put_user(mask, &sc->oldmask);
+ __put_user(/* current->thread.trap_no */ 0, &sc->trap_no);
+ __put_user(/* current->thread.error_code */ 0, &sc->error_code);
+ __put_user(/* current->thread.address */ 0, &sc->fault_address);
+ __put_user(mask, &sc->oldmask);
}
static inline abi_ulong
get_sigframe(struct target_sigaction *ka, CPUARMState *regs, int framesize)
{
- unsigned long sp = regs->regs[13];
+ unsigned long sp = regs->regs[13];
- /*
- * This is the X/Open sanctioned signal stack switching.
- */
- if ((ka->sa_flags & TARGET_SA_ONSTACK) && !sas_ss_flags(sp))
- sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size;
- /*
- * ATPCS B01 mandates 8-byte alignment
- */
- return (sp - framesize) & ~7;
+ /*
+ * This is the X/Open sanctioned signal stack switching.
+ */
+ if ((ka->sa_flags & TARGET_SA_ONSTACK) && !sas_ss_flags(sp)) {
+ sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size;
+ }
+ /*
+ * ATPCS B01 mandates 8-byte alignment
+ */
+ return (sp - framesize) & ~7;
}
static void
setup_return(CPUARMState *env, struct target_sigaction *ka,
abi_ulong *rc, abi_ulong frame_addr, int usig, abi_ulong rc_addr)
{
- abi_ulong handler = ka->_sa_handler;
- abi_ulong retcode;
- int thumb = handler & 1;
- uint32_t cpsr = cpsr_read(env);
+ abi_ulong handler = ka->_sa_handler;
+ abi_ulong retcode;
+ int thumb = handler & 1;
+ uint32_t cpsr = cpsr_read(env);
- cpsr &= ~CPSR_IT;
- if (thumb) {
- cpsr |= CPSR_T;
- } else {
- cpsr &= ~CPSR_T;
- }
+ cpsr &= ~CPSR_IT;
+ if (thumb) {
+ cpsr |= CPSR_T;
+ } else {
+ cpsr &= ~CPSR_T;
+ }
- if (ka->sa_flags & TARGET_SA_RESTORER) {
- retcode = ka->sa_restorer;
- } else {
- unsigned int idx = thumb;
+ if (ka->sa_flags & TARGET_SA_RESTORER) {
+ retcode = ka->sa_restorer;
+ } else {
+ unsigned int idx = thumb;
- if (ka->sa_flags & TARGET_SA_SIGINFO)
- idx += 2;
+ if (ka->sa_flags & TARGET_SA_SIGINFO) {
+ idx += 2;
+ }
__put_user(retcodes[idx], rc);
- retcode = rc_addr + thumb;
- }
+ retcode = rc_addr + thumb;
+ }
- env->regs[0] = usig;
- env->regs[13] = frame_addr;
- env->regs[14] = retcode;
- env->regs[15] = handler & (thumb ? ~1 : ~3);
- cpsr_write(env, cpsr, CPSR_IT | CPSR_T, CPSRWriteByInstr);
+ env->regs[0] = usig;
+ env->regs[13] = frame_addr;
+ env->regs[14] = retcode;
+ env->regs[15] = handler & (thumb ? ~1 : ~3);
+ cpsr_write(env, cpsr, CPSR_IT | CPSR_T, CPSRWriteByInstr);
}
static abi_ulong *setup_sigframe_v2_vfp(abi_ulong *regspace, CPUARMState *env)
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_*
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (10 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 11/30] linux-user: arm: fix coding style for some linux-user signal functions Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 13/30] target-arm: implement SCTLR.B, drop bswap_code Peter Maydell
` (18 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
This matches the idiom used by get_user_data_* later in the series,
and will help when bswap_code will be replaced by SCTLR.B.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/main.c | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 700724e..bcb9f66 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -435,17 +435,17 @@ void cpu_loop(CPUX86State *env)
#ifdef TARGET_ARM
-#define get_user_code_u32(x, gaddr, doswap) \
+#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
- if (!__r && (doswap)) { \
+ if (!__r && (env)->bswap_code) { \
(x) = bswap32(x); \
} \
__r; \
})
-#define get_user_code_u16(x, gaddr, doswap) \
+#define get_user_code_u16(x, gaddr, env) \
({ abi_long __r = get_user_u16((x), (gaddr)); \
- if (!__r && (doswap)) { \
+ if (!__r && (env)->bswap_code) { \
(x) = bswap16(x); \
} \
__r; \
@@ -692,7 +692,7 @@ void cpu_loop(CPUARMState *env)
/* we handle the FPU emulation here, as Linux */
/* we get the opcode */
/* FIXME - what to do if get_user() fails? */
- get_user_code_u32(opcode, env->regs[15], env->bswap_code);
+ get_user_code_u32(opcode, env->regs[15], env);
rc = EmulateAll(opcode, &ts->fpa, env);
if (rc == 0) { /* illegal instruction */
@@ -762,25 +762,23 @@ void cpu_loop(CPUARMState *env)
if (trapnr == EXCP_BKPT) {
if (env->thumb) {
/* FIXME - what to do if get_user() fails? */
- get_user_code_u16(insn, env->regs[15], env->bswap_code);
+ get_user_code_u16(insn, env->regs[15], env);
n = insn & 0xff;
env->regs[15] += 2;
} else {
/* FIXME - what to do if get_user() fails? */
- get_user_code_u32(insn, env->regs[15], env->bswap_code);
+ get_user_code_u32(insn, env->regs[15], env);
n = (insn & 0xf) | ((insn >> 4) & 0xff0);
env->regs[15] += 4;
}
} else {
if (env->thumb) {
/* FIXME - what to do if get_user() fails? */
- get_user_code_u16(insn, env->regs[15] - 2,
- env->bswap_code);
+ get_user_code_u16(insn, env->regs[15] - 2, env);
n = insn & 0xff;
} else {
/* FIXME - what to do if get_user() fails? */
- get_user_code_u32(insn, env->regs[15] - 4,
- env->bswap_code);
+ get_user_code_u32(insn, env->regs[15] - 4, env);
n = insn & 0xffffff;
}
}
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 13/30] target-arm: implement SCTLR.B, drop bswap_code
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (11 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_* Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 14/30] target-arm: cpu: Move cpu_is_big_endian to header Peter Maydell
` (17 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
bswap_code is a CPU property of sorts ("is the iside endianness the
opposite way round to TARGET_WORDS_BIGENDIAN?") but it is not the
actual CPU state involved here which is SCTLR.B (set for BE32
binaries, clear for BE8).
Replace bswap_code with SCTLR.B, and pass that to arm_ld*_code.
The next patches will make data fetches honor both SCTLR.B and
CPSR.E appropriately.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[PC changes:
* rebased on master (Jan 2016)
* s/TARGET_USER_ONLY/CONFIG_USER_ONLY
* Use bswap_code() for disas_set_info() instead of raw sctlr_b
]
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/main.c | 10 +++++++---
target-arm/arm_ldst.h | 8 ++++----
target-arm/cpu.c | 2 +-
target-arm/cpu.h | 47 ++++++++++++++++++++++++++++++++++++++--------
target-arm/helper.c | 8 ++++----
target-arm/translate-a64.c | 6 +++---
target-arm/translate.c | 16 ++++++++--------
target-arm/translate.h | 2 +-
8 files changed, 67 insertions(+), 32 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index bcb9f66..fe2a8dd 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -437,7 +437,7 @@ void cpu_loop(CPUX86State *env)
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
- if (!__r && (env)->bswap_code) { \
+ if (!__r && bswap_code(arm_sctlr_b(env))) { \
(x) = bswap32(x); \
} \
__r; \
@@ -445,7 +445,7 @@ void cpu_loop(CPUX86State *env)
#define get_user_code_u16(x, gaddr, env) \
({ abi_long __r = get_user_u16((x), (gaddr)); \
- if (!__r && (env)->bswap_code) { \
+ if (!__r && bswap_code(arm_sctlr_b(env))) { \
(x) = bswap16(x); \
} \
__r; \
@@ -4449,11 +4449,15 @@ int main(int argc, char **argv, char **envp)
for(i = 0; i < 16; i++) {
env->regs[i] = regs->uregs[i];
}
+#ifdef TARGET_WORDS_BIGENDIAN
/* Enable BE8. */
if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
&& (info->elf_flags & EF_ARM_BE8)) {
- env->bswap_code = 1;
+ /* nothing for now, CPSR.E not emulated yet */
+ } else {
+ env->cp15.sctlr_el[1] |= SCTLR_B;
}
+#endif
}
#elif defined(TARGET_UNICORE32)
{
diff --git a/target-arm/arm_ldst.h b/target-arm/arm_ldst.h
index b1ece01..35c2c43 100644
--- a/target-arm/arm_ldst.h
+++ b/target-arm/arm_ldst.h
@@ -25,10 +25,10 @@
/* Load an instruction and return it in the standard little-endian order */
static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
- bool do_swap)
+ bool sctlr_b)
{
uint32_t insn = cpu_ldl_code(env, addr);
- if (do_swap) {
+ if (bswap_code(sctlr_b)) {
return bswap32(insn);
}
return insn;
@@ -36,10 +36,10 @@ static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
/* Ditto, for a halfword (Thumb) instruction */
static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
- bool do_swap)
+ bool sctlr_b)
{
uint16_t insn = cpu_lduw_code(env, addr);
- if (do_swap) {
+ if (bswap_code(sctlr_b)) {
return bswap16(insn);
}
return insn;
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index e95b030..001fccf 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -427,7 +427,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
} else {
info->print_insn = print_insn_arm;
}
- if (env->bswap_code) {
+ if (bswap_code(arm_sctlr_b(env))) {
#ifdef TARGET_WORDS_BIGENDIAN
info->endian = BFD_ENDIAN_LITTLE;
#else
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 744f052..61b8b03 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -478,9 +478,6 @@ typedef struct CPUARMState {
uint32_t cregs[16];
} iwmmxt;
- /* For mixed endian mode. */
- bool bswap_code;
-
#if defined(CONFIG_USER_ONLY)
/* For usermode syscall translation. */
int eabi;
@@ -1898,6 +1895,19 @@ static inline bool arm_singlestep_active(CPUARMState *env)
&& arm_generate_debug_exceptions(env);
}
+static inline bool arm_sctlr_b(CPUARMState *env)
+{
+ return
+ /* We need not implement SCTLR.ITD in user-mode emulation, so
+ * let linux-user ignore the fact that it conflicts with SCTLR_B.
+ * This lets people run BE32 binaries with "-cpu any".
+ */
+#ifndef CONFIG_USER_ONLY
+ !arm_feature(env, ARM_FEATURE_V7) &&
+#endif
+ (env->cp15.sctlr_el[1] & SCTLR_B) != 0;
+}
+
#include "exec/cpu-all.h"
/* Bit usage in the TB flags field: bit 31 indicates whether we are
@@ -1928,8 +1938,8 @@ static inline bool arm_singlestep_active(CPUARMState *env)
#define ARM_TBFLAG_VFPEN_MASK (1 << ARM_TBFLAG_VFPEN_SHIFT)
#define ARM_TBFLAG_CONDEXEC_SHIFT 8
#define ARM_TBFLAG_CONDEXEC_MASK (0xff << ARM_TBFLAG_CONDEXEC_SHIFT)
-#define ARM_TBFLAG_BSWAP_CODE_SHIFT 16
-#define ARM_TBFLAG_BSWAP_CODE_MASK (1 << ARM_TBFLAG_BSWAP_CODE_SHIFT)
+#define ARM_TBFLAG_SCTLR_B_SHIFT 16
+#define ARM_TBFLAG_SCTLR_B_MASK (1 << ARM_TBFLAG_SCTLR_B_SHIFT)
/* We store the bottom two bits of the CPAR as TB flags and handle
* checks on the other bits at runtime
*/
@@ -1965,13 +1975,34 @@ static inline bool arm_singlestep_active(CPUARMState *env)
(((F) & ARM_TBFLAG_VFPEN_MASK) >> ARM_TBFLAG_VFPEN_SHIFT)
#define ARM_TBFLAG_CONDEXEC(F) \
(((F) & ARM_TBFLAG_CONDEXEC_MASK) >> ARM_TBFLAG_CONDEXEC_SHIFT)
-#define ARM_TBFLAG_BSWAP_CODE(F) \
- (((F) & ARM_TBFLAG_BSWAP_CODE_MASK) >> ARM_TBFLAG_BSWAP_CODE_SHIFT)
+#define ARM_TBFLAG_SCTLR_B(F) \
+ (((F) & ARM_TBFLAG_SCTLR_B_MASK) >> ARM_TBFLAG_SCTLR_B_SHIFT)
#define ARM_TBFLAG_XSCALE_CPAR(F) \
(((F) & ARM_TBFLAG_XSCALE_CPAR_MASK) >> ARM_TBFLAG_XSCALE_CPAR_SHIFT)
#define ARM_TBFLAG_NS(F) \
(((F) & ARM_TBFLAG_NS_MASK) >> ARM_TBFLAG_NS_SHIFT)
+static inline bool bswap_code(bool sctlr_b)
+{
+#ifdef CONFIG_USER_ONLY
+ /* BE8 (SCTLR.B = 0, TARGET_WORDS_BIGENDIAN = 1) is mixed endian.
+ * The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_WORDS_BIGENDIAN=0
+ * would also end up as a mixed-endian mode with BE code, LE data.
+ */
+ return
+#ifdef TARGET_WORDS_BIGENDIAN
+ 1 ^
+#endif
+ sctlr_b;
+#else
+ /* We do not implement BE32 mode for system-mode emulation, but
+ * anyway it would always do little-endian accesses with
+ * TARGET_WORDS_BIGENDIAN = 0.
+ */
+ return 0;
+#endif
+}
+
/* Return the exception level to which FP-disabled exceptions should
* be taken, or 0 if FP is enabled.
*/
@@ -2049,7 +2080,7 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
| (env->vfp.vec_len << ARM_TBFLAG_VECLEN_SHIFT)
| (env->vfp.vec_stride << ARM_TBFLAG_VECSTRIDE_SHIFT)
| (env->condexec_bits << ARM_TBFLAG_CONDEXEC_SHIFT)
- | (env->bswap_code << ARM_TBFLAG_BSWAP_CODE_SHIFT);
+ | (arm_sctlr_b(env) << ARM_TBFLAG_SCTLR_B_SHIFT);
if (!(access_secure_reg(env))) {
*flags |= ARM_TBFLAG_NS_MASK;
}
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 935f13b..0a0e85d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5848,7 +5848,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
case EXCP_BKPT:
if (semihosting_enabled()) {
int nr;
- nr = arm_lduw_code(env, env->regs[15], env->bswap_code) & 0xff;
+ nr = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env)) & 0xff;
if (nr == 0xab) {
env->regs[15] += 2;
qemu_log_mask(CPU_LOG_INT,
@@ -6386,13 +6386,13 @@ static inline bool check_for_semihosting(CPUState *cs)
case EXCP_SWI:
/* Check for semihosting interrupt. */
if (env->thumb) {
- imm = arm_lduw_code(env, env->regs[15] - 2, env->bswap_code)
+ imm = arm_lduw_code(env, env->regs[15] - 2, arm_sctlr_b(env))
& 0xff;
if (imm == 0xab) {
break;
}
} else {
- imm = arm_ldl_code(env, env->regs[15] - 4, env->bswap_code)
+ imm = arm_ldl_code(env, env->regs[15] - 4, arm_sctlr_b(env))
& 0xffffff;
if (imm == 0x123456) {
break;
@@ -6402,7 +6402,7 @@ static inline bool check_for_semihosting(CPUState *cs)
case EXCP_BKPT:
/* See if this is a semihosting syscall. */
if (env->thumb) {
- imm = arm_lduw_code(env, env->regs[15], env->bswap_code)
+ imm = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env))
& 0xff;
if (imm == 0xab) {
env->regs[15] += 2;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 7f65aea..f6dd44b 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -10966,7 +10966,7 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
{
uint32_t insn;
- insn = arm_ldl_code(env, s->pc, s->bswap_code);
+ insn = arm_ldl_code(env, s->pc, s->sctlr_b);
s->insn = insn;
s->pc += 4;
@@ -11031,7 +11031,7 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
dc->secure_routed_to_el3 = arm_feature(env, ARM_FEATURE_EL3) &&
!arm_el_is_aa64(env, 3);
dc->thumb = 0;
- dc->bswap_code = 0;
+ dc->sctlr_b = 0;
dc->condexec_mask = 0;
dc->condexec_cond = 0;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
@@ -11217,7 +11217,7 @@ done_generating:
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc->pc - pc_start,
- 4 | (dc->bswap_code << 1));
+ 4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
qemu_log("\n");
}
#endif
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c29c47f..b52bbc3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7770,7 +7770,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if ((insn & 0x0ffffdff) == 0x01010000) {
ARCH(6);
/* setend */
- if (((insn >> 9) & 1) != s->bswap_code) {
+ if (((insn >> 9) & 1) != bswap_code(s->sctlr_b)) {
/* Dynamic endianness switching not implemented. */
qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
goto illegal_op;
@@ -9286,7 +9286,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
/* Fall through to 32-bit decode. */
}
- insn = arm_lduw_code(env, s->pc, s->bswap_code);
+ insn = arm_lduw_code(env, s->pc, s->sctlr_b);
s->pc += 2;
insn |= (uint32_t)insn_hw1 << 16;
@@ -10528,7 +10528,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
}
}
- insn = arm_lduw_code(env, s->pc, s->bswap_code);
+ insn = arm_lduw_code(env, s->pc, s->sctlr_b);
s->pc += 2;
switch (insn >> 12) {
@@ -11099,7 +11099,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
case 2:
/* setend */
ARCH(6);
- if (((insn >> 3) & 1) != s->bswap_code) {
+ if (((insn >> 3) & 1) != bswap_code(s->sctlr_b)) {
/* Dynamic endianness switching not implemented. */
qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
goto illegal_op;
@@ -11253,7 +11253,7 @@ static bool insn_crosses_page(CPUARMState *env, DisasContext *s)
}
/* This must be a Thumb insn */
- insn = arm_lduw_code(env, s->pc, s->bswap_code);
+ insn = arm_lduw_code(env, s->pc, s->sctlr_b);
if ((insn >> 11) >= 0x1d) {
/* Top five bits 0b11101 / 0b11110 / 0b11111 : this is the
@@ -11307,7 +11307,7 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
dc->secure_routed_to_el3 = arm_feature(env, ARM_FEATURE_EL3) &&
!arm_el_is_aa64(env, 3);
dc->thumb = ARM_TBFLAG_THUMB(tb->flags);
- dc->bswap_code = ARM_TBFLAG_BSWAP_CODE(tb->flags);
+ dc->sctlr_b = ARM_TBFLAG_SCTLR_B(tb->flags);
dc->condexec_mask = (ARM_TBFLAG_CONDEXEC(tb->flags) & 0xf) << 1;
dc->condexec_cond = ARM_TBFLAG_CONDEXEC(tb->flags) >> 4;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
@@ -11487,7 +11487,7 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
}
}
} else {
- unsigned int insn = arm_ldl_code(env, dc->pc, dc->bswap_code);
+ unsigned int insn = arm_ldl_code(env, dc->pc, dc->sctlr_b);
dc->pc += 4;
disas_arm_insn(dc, insn);
}
@@ -11644,7 +11644,7 @@ done_generating:
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc->pc - pc_start,
- dc->thumb | (dc->bswap_code << 1));
+ dc->thumb | (dc->sctlr_b << 1));
qemu_log("\n");
}
#endif
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 82e3f6b..5445232 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -16,7 +16,7 @@ typedef struct DisasContext {
struct TranslationBlock *tb;
int singlestep_enabled;
int thumb;
- int bswap_code;
+ int sctlr_b;
#if !defined(CONFIG_USER_ONLY)
int user;
#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 14/30] target-arm: cpu: Move cpu_is_big_endian to header
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (12 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 13/30] target-arm: implement SCTLR.B, drop bswap_code Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE Peter Maydell
` (16 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
There is a CPU data endianness test that is used to drive the
virtio_big_endian test.
Move this up to the header so it can be more generally used for endian
tests. The KVM specific cpu_syncronize_state call is left behind in the
virtio specific function.
Rename it arm_cpu-data_is_big_endian() to more accurately capture that
this is for data accesses only.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu.c | 19 +++----------------
target-arm/cpu.h | 19 +++++++++++++++++++
2 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 001fccf..352d9f8 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -369,26 +369,13 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
#endif
}
-static bool arm_cpu_is_big_endian(CPUState *cs)
+static bool arm_cpu_virtio_is_big_endian(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
- int cur_el;
cpu_synchronize_state(cs);
-
- /* In 32bit guest endianness is determined by looking at CPSR's E bit */
- if (!is_a64(env)) {
- return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
- }
-
- cur_el = arm_current_el(env);
-
- if (cur_el == 0) {
- return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
- }
-
- return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
+ return arm_cpu_data_is_big_endian(env);
}
#endif
@@ -1476,7 +1463,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->vmsd = &vmstate_arm_cpu;
- cc->virtio_is_big_endian = arm_cpu_is_big_endian;
+ cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
cc->write_elf64_note = arm_cpu_write_elf64_note;
cc->write_elf32_note = arm_cpu_write_elf32_note;
#endif
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 61b8b03..75e5ea0 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1908,6 +1908,25 @@ static inline bool arm_sctlr_b(CPUARMState *env)
(env->cp15.sctlr_el[1] & SCTLR_B) != 0;
}
+/* Return true if the processor is in big-endian mode. */
+static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
+{
+ int cur_el;
+
+ /* In 32bit endianness is determined by looking at CPSR's E bit */
+ if (!is_a64(env)) {
+ return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
+ }
+
+ cur_el = arm_current_el(env);
+
+ if (cur_el == 0) {
+ return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
+ }
+
+ return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
+}
+
#include "exec/cpu-all.h"
/* Bit usage in the TB flags field: bit 31 indicates whether we are
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (13 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 14/30] target-arm: cpu: Move cpu_is_big_endian to header Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 16/30] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode Peter Maydell
` (15 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
endian with address manipulations on subword accesses (to give the
illusion of BE). But user-mode cannot tell the difference and is
already implemented as straight BE. So handle the difference in the
endianess query, where USER mode is BE and system is not.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu.h | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 75e5ea0..ab0ea92 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1915,7 +1915,22 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
/* In 32bit endianness is determined by looking at CPSR's E bit */
if (!is_a64(env)) {
- return (env->uncached_cpsr & CPSR_E) ? 1 : 0;
+ return
+#ifdef CONFIG_USER_ONLY
+ /* In system mode, BE32 is modelled in line with the
+ * architecture (as word-invariant big-endianness), where loads
+ * and stores are done little endian but from addresses which
+ * are adjusted by XORing with the appropriate constant. So the
+ * endianness to use for the raw data access is not affected by
+ * SCTLR.B.
+ * In user mode, however, we model BE32 as byte-invariant
+ * big-endianness (because user-only code cannot tell the
+ * difference), and so we need to use a data access endianness
+ * that depends on SCTLR.B.
+ */
+ arm_sctlr_b(env) ||
+#endif
+ ((env->uncached_cpsr & CPSR_E) ? 1 : 0);
}
cur_el = arm_current_el(env);
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 16/30] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (14 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation Peter Maydell
` (14 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
If doing big-endian linux-user mode, set both the CPSR.E and SCTLR.E0E
bits. This sets big-endian mode for data accesses.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/main.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index fe2a8dd..510b3b7 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -4453,7 +4453,8 @@ int main(int argc, char **argv, char **envp)
/* Enable BE8. */
if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
&& (info->elf_flags & EF_ARM_BE8)) {
- /* nothing for now, CPSR.E not emulated yet */
+ env->uncached_cpsr |= CPSR_E;
+ env->cp15.sctlr_el[1] |= SCTLR_E0E;
} else {
env->cp15.sctlr_el[1] |= SCTLR_B;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (15 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 16/30] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 18/30] target-arm: implement SCTLR.EE Peter Maydell
` (13 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
Now that CPSR.E is set correctly, prepare for when setend will be able
to change it; bswap data in and out of strex manually by comparing
SCTLR.B, CPSR.E and TARGET_WORDS_BIGENDIAN (we do not have the luxury
of using TCGMemOps).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[ PC changes:
* Moved SCTLR/CPSR logic to arm_cpu_data_is_big_endian
]
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
linux-user/main.c | 50 +++++++++++++++++++++++++++++++++++++++++++-------
target-arm/cpu.h | 11 +++++++++++
2 files changed, 54 insertions(+), 7 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 510b3b7..2b1e755 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -451,6 +451,38 @@ void cpu_loop(CPUX86State *env)
__r; \
})
+#define get_user_data_u32(x, gaddr, env) \
+ ({ abi_long __r = get_user_u32((x), (gaddr)); \
+ if (!__r && arm_cpu_bswap_data(env)) { \
+ (x) = bswap32(x); \
+ } \
+ __r; \
+ })
+
+#define get_user_data_u16(x, gaddr, env) \
+ ({ abi_long __r = get_user_u16((x), (gaddr)); \
+ if (!__r && arm_cpu_bswap_data(env)) { \
+ (x) = bswap16(x); \
+ } \
+ __r; \
+ })
+
+#define put_user_data_u32(x, gaddr, env) \
+ ({ typeof(x) __x = (x); \
+ if (arm_cpu_bswap_data(env)) { \
+ __x = bswap32(__x); \
+ } \
+ put_user_u32(__x, (gaddr)); \
+ })
+
+#define put_user_data_u16(x, gaddr, env) \
+ ({ typeof(x) __x = (x); \
+ if (arm_cpu_bswap_data(env)) { \
+ __x = bswap16(__x); \
+ } \
+ put_user_u16(__x, (gaddr)); \
+ })
+
#ifdef TARGET_ABI32
/* Commpage handling -- there is no commpage for AArch64 */
@@ -610,11 +642,11 @@ static int do_strex(CPUARMState *env)
segv = get_user_u8(val, addr);
break;
case 1:
- segv = get_user_u16(val, addr);
+ segv = get_user_data_u16(val, addr, env);
break;
case 2:
case 3:
- segv = get_user_u32(val, addr);
+ segv = get_user_data_u32(val, addr, env);
break;
default:
abort();
@@ -625,12 +657,16 @@ static int do_strex(CPUARMState *env)
}
if (size == 3) {
uint32_t valhi;
- segv = get_user_u32(valhi, addr + 4);
+ segv = get_user_data_u32(valhi, addr + 4, env);
if (segv) {
env->exception.vaddress = addr + 4;
goto done;
}
- val = deposit64(val, 32, 32, valhi);
+ if (arm_cpu_bswap_data(env)) {
+ val = deposit64((uint64_t)valhi, 32, 32, val);
+ } else {
+ val = deposit64(val, 32, 32, valhi);
+ }
}
if (val != env->exclusive_val) {
goto fail;
@@ -642,11 +678,11 @@ static int do_strex(CPUARMState *env)
segv = put_user_u8(val, addr);
break;
case 1:
- segv = put_user_u16(val, addr);
+ segv = put_user_data_u16(val, addr, env);
break;
case 2:
case 3:
- segv = put_user_u32(val, addr);
+ segv = put_user_data_u32(val, addr, env);
break;
}
if (segv) {
@@ -655,7 +691,7 @@ static int do_strex(CPUARMState *env)
}
if (size == 3) {
val = env->regs[(env->exclusive_info >> 12) & 0xf];
- segv = put_user_u32(val, addr + 4);
+ segv = put_user_data_u32(val, addr + 4, env);
if (segv) {
env->exception.vaddress = addr + 4;
goto done;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index ab0ea92..cbf171c 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -2102,6 +2102,17 @@ static inline int fp_exception_el(CPUARMState *env)
return 0;
}
+#ifdef CONFIG_USER_ONLY
+static inline bool arm_cpu_bswap_data(CPUARMState *env)
+{
+ return
+#ifdef TARGET_WORDS_BIGENDIAN
+ 1 ^
+#endif
+ arm_cpu_data_is_big_endian(env);
+}
+#endif
+
static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
{
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 18/30] target-arm: implement SCTLR.EE
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (16 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 19/30] target-arm: pass DisasContext to gen_aa32_ld*/st* Peter Maydell
` (12 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Implement SCTLR.EE bit which controls data endianess for exceptions
and page table translations. SCTLR.EE is mirrored to the CPSR.E bit
on exception entry.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0a0e85d..eaded41 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6241,6 +6241,11 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
env->condexec_bits = 0;
/* Switch to the new mode, and to the correct instruction set. */
env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode;
+ /* Set new mode endianness */
+ env->uncached_cpsr &= ~CPSR_E;
+ if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) {
+ env->uncached_cpsr |= ~CPSR_E;
+ }
env->daif |= mask;
/* this is a lie, as the was no c1_sys on V4T/V5, but who cares
* and we should just guard the thumb mode on V4 */
@@ -6527,6 +6532,12 @@ static inline bool regime_translation_disabled(CPUARMState *env,
return (regime_sctlr(env, mmu_idx) & SCTLR_M) == 0;
}
+static inline bool regime_translation_big_endian(CPUARMState *env,
+ ARMMMUIdx mmu_idx)
+{
+ return (regime_sctlr(env, mmu_idx) & SCTLR_EE) != 0;
+}
+
/* Return the TCR controlling this translation regime */
static inline TCR *regime_tcr(CPUARMState *env, ARMMMUIdx mmu_idx)
{
@@ -6849,7 +6860,11 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
if (fi->s1ptw) {
return 0;
}
- return address_space_ldl(as, addr, attrs, NULL);
+ if (regime_translation_big_endian(env, mmu_idx)) {
+ return address_space_ldl_be(as, addr, attrs, NULL);
+ } else {
+ return address_space_ldl_le(as, addr, attrs, NULL);
+ }
}
static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
@@ -6867,7 +6882,11 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
if (fi->s1ptw) {
return 0;
}
- return address_space_ldq(as, addr, attrs, NULL);
+ if (regime_translation_big_endian(env, mmu_idx)) {
+ return address_space_ldq_be(as, addr, attrs, NULL);
+ } else {
+ return address_space_ldq_le(as, addr, attrs, NULL);
+ }
}
static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 19/30] target-arm: pass DisasContext to gen_aa32_ld*/st*
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (17 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 18/30] target-arm: implement SCTLR.EE Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 20/30] target-arm: introduce disas flag for endianness Peter Maydell
` (11 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
We'll need the DisasContext in the next patch to retrieve the
desired endianness, so pass it as a whole to gen_aa32_ld*/st*.
Unfortunately we cannot let those functions call get_mem_index,
because of user-mode load/store instructions.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[ PC changes:
* Fix long lines
]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 270 ++++++++++++++++++++++++++-----------------------
1 file changed, 142 insertions(+), 128 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b52bbc3..41c3c7f 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -921,23 +921,27 @@ static inline void store_reg_from_load(DisasContext *s, int reg, TCGv_i32 var)
#if TARGET_LONG_BITS == 32
#define DO_GEN_LD(SUFF, OPC) \
-static inline void gen_aa32_ld##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
+static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
+ TCGv_i32 addr, int index) \
{ \
tcg_gen_qemu_ld_i32(val, addr, index, (OPC)); \
}
#define DO_GEN_ST(SUFF, OPC) \
-static inline void gen_aa32_st##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
+static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
+ TCGv_i32 addr, int index) \
{ \
tcg_gen_qemu_st_i32(val, addr, index, (OPC)); \
}
-static inline void gen_aa32_ld64(TCGv_i64 val, TCGv_i32 addr, int index)
+static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
+ TCGv_i32 addr, int index)
{
tcg_gen_qemu_ld_i64(val, addr, index, MO_TEQ);
}
-static inline void gen_aa32_st64(TCGv_i64 val, TCGv_i32 addr, int index)
+static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
+ TCGv_i32 addr, int index)
{
tcg_gen_qemu_st_i64(val, addr, index, MO_TEQ);
}
@@ -945,7 +949,8 @@ static inline void gen_aa32_st64(TCGv_i64 val, TCGv_i32 addr, int index)
#else
#define DO_GEN_LD(SUFF, OPC) \
-static inline void gen_aa32_ld##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
+static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
+ TCGv_i32 addr, int index) \
{ \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
@@ -954,7 +959,8 @@ static inline void gen_aa32_ld##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
}
#define DO_GEN_ST(SUFF, OPC) \
-static inline void gen_aa32_st##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
+static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
+ TCGv_i32 addr, int index) \
{ \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
@@ -962,7 +968,8 @@ static inline void gen_aa32_st##SUFF(TCGv_i32 val, TCGv_i32 addr, int index) \
tcg_temp_free(addr64); \
}
-static inline void gen_aa32_ld64(TCGv_i64 val, TCGv_i32 addr, int index)
+static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
+ TCGv_i32 addr, int index)
{
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
@@ -970,7 +977,8 @@ static inline void gen_aa32_ld64(TCGv_i64 val, TCGv_i32 addr, int index)
tcg_temp_free(addr64);
}
-static inline void gen_aa32_st64(TCGv_i64 val, TCGv_i32 addr, int index)
+static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
+ TCGv_i32 addr, int index)
{
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
@@ -1285,18 +1293,18 @@ VFP_GEN_FIX(ulto, )
static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv_i32 addr)
{
if (dp) {
- gen_aa32_ld64(cpu_F0d, addr, get_mem_index(s));
+ gen_aa32_ld64(s, cpu_F0d, addr, get_mem_index(s));
} else {
- gen_aa32_ld32u(cpu_F0s, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, cpu_F0s, addr, get_mem_index(s));
}
}
static inline void gen_vfp_st(DisasContext *s, int dp, TCGv_i32 addr)
{
if (dp) {
- gen_aa32_st64(cpu_F0d, addr, get_mem_index(s));
+ gen_aa32_st64(s, cpu_F0d, addr, get_mem_index(s));
} else {
- gen_aa32_st32(cpu_F0s, addr, get_mem_index(s));
+ gen_aa32_st32(s, cpu_F0s, addr, get_mem_index(s));
}
}
@@ -1632,24 +1640,24 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
if (insn & ARM_CP_RW_BIT) {
if ((insn >> 28) == 0xf) { /* WLDRW wCx */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
iwmmxt_store_creg(wrd, tmp);
} else {
i = 1;
if (insn & (1 << 8)) {
if (insn & (1 << 22)) { /* WLDRD */
- gen_aa32_ld64(cpu_M0, addr, get_mem_index(s));
+ gen_aa32_ld64(s, cpu_M0, addr, get_mem_index(s));
i = 0;
} else { /* WLDRW wRd */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
}
} else {
tmp = tcg_temp_new_i32();
if (insn & (1 << 22)) { /* WLDRH */
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
} else { /* WLDRB */
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
}
}
if (i) {
@@ -1661,24 +1669,24 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
} else {
if ((insn >> 28) == 0xf) { /* WSTRW wCx */
tmp = iwmmxt_load_creg(wrd);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
} else {
gen_op_iwmmxt_movq_M0_wRn(wrd);
tmp = tcg_temp_new_i32();
if (insn & (1 << 8)) {
if (insn & (1 << 22)) { /* WSTRD */
- gen_aa32_st64(cpu_M0, addr, get_mem_index(s));
+ gen_aa32_st64(s, cpu_M0, addr, get_mem_index(s));
} else { /* WSTRW wRd */
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
}
} else {
if (insn & (1 << 22)) { /* WSTRH */
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
} else { /* WSTRB */
tcg_gen_extrl_i64_i32(tmp, cpu_M0);
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
}
}
}
@@ -2743,15 +2751,15 @@ static TCGv_i32 gen_load_and_replicate(DisasContext *s, TCGv_i32 addr, int size)
TCGv_i32 tmp = tcg_temp_new_i32();
switch (size) {
case 0:
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
gen_neon_dup_u8(tmp, 0);
break;
case 1:
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
gen_neon_dup_low16(tmp);
break;
case 2:
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
break;
default: /* Avoid compiler warnings. */
abort();
@@ -4449,11 +4457,11 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
if (size == 3) {
tmp64 = tcg_temp_new_i64();
if (load) {
- gen_aa32_ld64(tmp64, addr, get_mem_index(s));
+ gen_aa32_ld64(s, tmp64, addr, get_mem_index(s));
neon_store_reg64(tmp64, rd);
} else {
neon_load_reg64(tmp64, rd);
- gen_aa32_st64(tmp64, addr, get_mem_index(s));
+ gen_aa32_st64(s, tmp64, addr, get_mem_index(s));
}
tcg_temp_free_i64(tmp64);
tcg_gen_addi_i32(addr, addr, stride);
@@ -4462,21 +4470,21 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
if (size == 2) {
if (load) {
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
neon_store_reg(rd, pass, tmp);
} else {
tmp = neon_load_reg(rd, pass);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_gen_addi_i32(addr, addr, stride);
} else if (size == 1) {
if (load) {
tmp = tcg_temp_new_i32();
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
tcg_gen_addi_i32(addr, addr, stride);
tmp2 = tcg_temp_new_i32();
- gen_aa32_ld16u(tmp2, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp2, addr, get_mem_index(s));
tcg_gen_addi_i32(addr, addr, stride);
tcg_gen_shli_i32(tmp2, tmp2, 16);
tcg_gen_or_i32(tmp, tmp, tmp2);
@@ -4486,10 +4494,10 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
tmp = neon_load_reg(rd, pass);
tmp2 = tcg_temp_new_i32();
tcg_gen_shri_i32(tmp2, tmp, 16);
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, stride);
- gen_aa32_st16(tmp2, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp2, addr, get_mem_index(s));
tcg_temp_free_i32(tmp2);
tcg_gen_addi_i32(addr, addr, stride);
}
@@ -4498,7 +4506,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
TCGV_UNUSED_I32(tmp2);
for (n = 0; n < 4; n++) {
tmp = tcg_temp_new_i32();
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
tcg_gen_addi_i32(addr, addr, stride);
if (n == 0) {
tmp2 = tmp;
@@ -4518,7 +4526,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
} else {
tcg_gen_shri_i32(tmp, tmp2, n * 8);
}
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, stride);
}
@@ -4642,13 +4650,13 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
tmp = tcg_temp_new_i32();
switch (size) {
case 0:
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
break;
case 1:
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
break;
case 2:
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
break;
default: /* Avoid compiler warnings. */
abort();
@@ -4666,13 +4674,13 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
tcg_gen_shri_i32(tmp, tmp, shift);
switch (size) {
case 0:
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
break;
case 1:
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
break;
case 2:
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
break;
}
tcg_temp_free_i32(tmp);
@@ -7435,14 +7443,14 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
switch (size) {
case 0:
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
break;
case 1:
- gen_aa32_ld16ua(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16ua(s, tmp, addr, get_mem_index(s));
break;
case 2:
case 3:
- gen_aa32_ld32ua(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32ua(s, tmp, addr, get_mem_index(s));
break;
default:
abort();
@@ -7453,7 +7461,7 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
TCGv_i32 tmp3 = tcg_temp_new_i32();
tcg_gen_addi_i32(tmp2, addr, 4);
- gen_aa32_ld32u(tmp3, tmp2, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp3, tmp2, get_mem_index(s));
tcg_temp_free_i32(tmp2);
tcg_gen_concat_i32_i64(cpu_exclusive_val, tmp, tmp3);
store_reg(s, rt2, tmp3);
@@ -7504,14 +7512,14 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
tmp = tcg_temp_new_i32();
switch (size) {
case 0:
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
break;
case 1:
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
break;
case 2:
case 3:
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
break;
default:
abort();
@@ -7522,7 +7530,7 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
TCGv_i32 tmp2 = tcg_temp_new_i32();
TCGv_i32 tmp3 = tcg_temp_new_i32();
tcg_gen_addi_i32(tmp2, addr, 4);
- gen_aa32_ld32u(tmp3, tmp2, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp3, tmp2, get_mem_index(s));
tcg_temp_free_i32(tmp2);
tcg_gen_concat_i32_i64(val64, tmp, tmp3);
tcg_temp_free_i32(tmp3);
@@ -7537,14 +7545,14 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
tmp = load_reg(s, rt);
switch (size) {
case 0:
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
break;
case 1:
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
break;
case 2:
case 3:
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
break;
default:
abort();
@@ -7553,7 +7561,7 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
if (size == 3) {
tcg_gen_addi_i32(addr, addr, 4);
tmp = load_reg(s, rt2);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_gen_movi_i32(cpu_R[rd], 0);
@@ -7659,11 +7667,11 @@ static void gen_srs(DisasContext *s,
}
tcg_gen_addi_i32(addr, addr, offset);
tmp = load_reg(s, 14);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tmp = load_cpu_field(spsr);
tcg_gen_addi_i32(addr, addr, 4);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
if (writeback) {
switch (amode) {
@@ -7822,10 +7830,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
tcg_gen_addi_i32(addr, addr, offset);
/* Load PC into tmp and CPSR into tmp2. */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
tcg_gen_addi_i32(addr, addr, 4);
tmp2 = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp2, addr, get_mem_index(s));
if (insn & (1 << 21)) {
/* Base writeback. */
switch (i) {
@@ -8441,13 +8449,16 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
tmp = tcg_temp_new_i32();
switch (op1) {
case 0: /* lda */
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr,
+ get_mem_index(s));
break;
case 2: /* ldab */
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr,
+ get_mem_index(s));
break;
case 3: /* ldah */
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr,
+ get_mem_index(s));
break;
default:
abort();
@@ -8458,13 +8469,16 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
tmp = load_reg(s, rm);
switch (op1) {
case 0: /* stl */
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr,
+ get_mem_index(s));
break;
case 2: /* stlb */
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr,
+ get_mem_index(s));
break;
case 3: /* stlh */
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr,
+ get_mem_index(s));
break;
default:
abort();
@@ -8519,11 +8533,11 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
tmp = load_reg(s, rm);
tmp2 = tcg_temp_new_i32();
if (insn & (1 << 22)) {
- gen_aa32_ld8u(tmp2, addr, get_mem_index(s));
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp2, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
} else {
- gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp2, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
}
tcg_temp_free_i32(tmp);
tcg_temp_free_i32(addr);
@@ -8558,20 +8572,20 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if (!load) {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = load_reg(s, rd + 1);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
} else {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
rd++;
}
address_offset = -4;
@@ -8580,20 +8594,20 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
tmp = tcg_temp_new_i32();
switch (sh) {
case 1:
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
break;
case 2:
- gen_aa32_ld8s(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8s(s, tmp, addr, get_mem_index(s));
break;
default:
case 3:
- gen_aa32_ld16s(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16s(s, tmp, addr, get_mem_index(s));
break;
}
} else {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
/* Perform base writeback before the loaded value to
@@ -8946,17 +8960,17 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
/* load */
tmp = tcg_temp_new_i32();
if (insn & (1 << 22)) {
- gen_aa32_ld8u(tmp, tmp2, i);
+ gen_aa32_ld8u(s, tmp, tmp2, i);
} else {
- gen_aa32_ld32u(tmp, tmp2, i);
+ gen_aa32_ld32u(s, tmp, tmp2, i);
}
} else {
/* store */
tmp = load_reg(s, rd);
if (insn & (1 << 22)) {
- gen_aa32_st8(tmp, tmp2, i);
+ gen_aa32_st8(s, tmp, tmp2, i);
} else {
- gen_aa32_st32(tmp, tmp2, i);
+ gen_aa32_st32(s, tmp, tmp2, i);
}
tcg_temp_free_i32(tmp);
}
@@ -9029,7 +9043,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if (is_load) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
if (user) {
tmp2 = tcg_const_i32(i);
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
@@ -9056,7 +9070,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
} else {
tmp = load_reg(s, i);
}
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
j++;
@@ -9323,20 +9337,20 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
if (insn & (1 << 20)) {
/* ldrd */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, rs, tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
} else {
/* strd */
tmp = load_reg(s, rs);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = load_reg(s, rd);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
if (insn & (1 << 21)) {
@@ -9374,11 +9388,11 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tcg_gen_add_i32(addr, addr, tmp);
tcg_temp_free_i32(tmp);
tmp = tcg_temp_new_i32();
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
} else { /* tbb */
tcg_temp_free_i32(tmp);
tmp = tcg_temp_new_i32();
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
}
tcg_temp_free_i32(addr);
tcg_gen_shli_i32(tmp, tmp, 1);
@@ -9415,13 +9429,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tmp = tcg_temp_new_i32();
switch (op) {
case 0: /* ldab */
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
break;
case 1: /* ldah */
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
break;
case 2: /* lda */
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
break;
default:
abort();
@@ -9431,13 +9445,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tmp = load_reg(s, rs);
switch (op) {
case 0: /* stlb */
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
break;
case 1: /* stlh */
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
break;
case 2: /* stl */
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
break;
default:
abort();
@@ -9465,10 +9479,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tcg_gen_addi_i32(addr, addr, -8);
/* Load PC into tmp and CPSR into tmp2. */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
tcg_gen_addi_i32(addr, addr, 4);
tmp2 = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp2, addr, get_mem_index(s));
if (insn & (1 << 21)) {
/* Base writeback. */
if (insn & (1 << 24)) {
@@ -9507,7 +9521,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
if (insn & (1 << 20)) {
/* Load. */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
if (i == 15) {
gen_bx(s, tmp);
} else if (i == rn) {
@@ -9519,7 +9533,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
} else {
/* Store. */
tmp = load_reg(s, i);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_gen_addi_i32(addr, addr, 4);
@@ -10449,19 +10463,19 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tmp = tcg_temp_new_i32();
switch (op) {
case 0:
- gen_aa32_ld8u(tmp, addr, memidx);
+ gen_aa32_ld8u(s, tmp, addr, memidx);
break;
case 4:
- gen_aa32_ld8s(tmp, addr, memidx);
+ gen_aa32_ld8s(s, tmp, addr, memidx);
break;
case 1:
- gen_aa32_ld16u(tmp, addr, memidx);
+ gen_aa32_ld16u(s, tmp, addr, memidx);
break;
case 5:
- gen_aa32_ld16s(tmp, addr, memidx);
+ gen_aa32_ld16s(s, tmp, addr, memidx);
break;
case 2:
- gen_aa32_ld32u(tmp, addr, memidx);
+ gen_aa32_ld32u(s, tmp, addr, memidx);
break;
default:
tcg_temp_free_i32(tmp);
@@ -10478,13 +10492,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tmp = load_reg(s, rs);
switch (op) {
case 0:
- gen_aa32_st8(tmp, addr, memidx);
+ gen_aa32_st8(s, tmp, addr, memidx);
break;
case 1:
- gen_aa32_st16(tmp, addr, memidx);
+ gen_aa32_st16(s, tmp, addr, memidx);
break;
case 2:
- gen_aa32_st32(tmp, addr, memidx);
+ gen_aa32_st32(s, tmp, addr, memidx);
break;
default:
tcg_temp_free_i32(tmp);
@@ -10621,7 +10635,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
addr = tcg_temp_new_i32();
tcg_gen_movi_i32(addr, val);
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(addr);
store_reg(s, rd, tmp);
break;
@@ -10824,28 +10838,28 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
switch (op) {
case 0: /* str */
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
break;
case 1: /* strh */
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
break;
case 2: /* strb */
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
break;
case 3: /* ldrsb */
- gen_aa32_ld8s(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8s(s, tmp, addr, get_mem_index(s));
break;
case 4: /* ldr */
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
break;
case 5: /* ldrh */
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
break;
case 6: /* ldrb */
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
break;
case 7: /* ldrsh */
- gen_aa32_ld16s(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16s(s, tmp, addr, get_mem_index(s));
break;
}
if (op >= 3) { /* load */
@@ -10867,12 +10881,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
} else {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_temp_free_i32(addr);
@@ -10889,12 +10903,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld8u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld8u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
} else {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st8(tmp, addr, get_mem_index(s));
+ gen_aa32_st8(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_temp_free_i32(addr);
@@ -10911,12 +10925,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld16u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
} else {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st16(tmp, addr, get_mem_index(s));
+ gen_aa32_st16(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_temp_free_i32(addr);
@@ -10932,12 +10946,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, rd, tmp);
} else {
/* store */
tmp = load_reg(s, rd);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_temp_free_i32(addr);
@@ -11005,12 +11019,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* pop */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
store_reg(s, i, tmp);
} else {
/* push */
tmp = load_reg(s, i);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
/* advance to the next address. */
@@ -11022,13 +11036,13 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* pop pc */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
/* don't set the pc until the rest of the instruction
has completed */
} else {
/* push lr */
tmp = load_reg(s, 14);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
tcg_gen_addi_i32(addr, addr, 4);
@@ -11158,7 +11172,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
if (insn & (1 << 11)) {
/* load */
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(tmp, addr, get_mem_index(s));
+ gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
if (i == rn) {
loaded_var = tmp;
} else {
@@ -11167,7 +11181,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
} else {
/* store */
tmp = load_reg(s, i);
- gen_aa32_st32(tmp, addr, get_mem_index(s));
+ gen_aa32_st32(s, tmp, addr, get_mem_index(s));
tcg_temp_free_i32(tmp);
}
/* advance to the next address */
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 20/30] target-arm: introduce disas flag for endianness
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (18 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 19/30] target-arm: pass DisasContext to gen_aa32_ld*/st* Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 21/30] target-arm: a64: Add endianness support Peter Maydell
` (10 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
Introduce a disas flag for setting the CPU data endianness. This allows
control of the endianness from the CPU state rather than hard-coding it
to TARGET_WORDS_BIGENDIAN.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[ PC changes:
* Split off as new patch from original:
"target-arm: introduce tbflag for CPSR.E"
* Wrote commit message from scratch
]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate-a64.c | 1 +
target-arm/translate.c | 39 ++++++++++++++++++++++++---------------
target-arm/translate.h | 1 +
3 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index f6dd44b..88b95ab 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11032,6 +11032,7 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
!arm_el_is_aa64(env, 3);
dc->thumb = 0;
dc->sctlr_b = 0;
+ dc->be_data = MO_TE;
dc->condexec_mask = 0;
dc->condexec_cond = 0;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 41c3c7f..2d4b1cc 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -924,26 +924,30 @@ static inline void store_reg_from_load(DisasContext *s, int reg, TCGv_i32 var)
static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
- tcg_gen_qemu_ld_i32(val, addr, index, (OPC)); \
+ TCGMemOp opc = (OPC) | s->be_data; \
+ tcg_gen_qemu_ld_i32(val, addr, index, opc); \
}
#define DO_GEN_ST(SUFF, OPC) \
static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
- tcg_gen_qemu_st_i32(val, addr, index, (OPC)); \
+ TCGMemOp opc = (OPC) | s->be_data; \
+ tcg_gen_qemu_st_i32(val, addr, index, opc); \
}
static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
TCGv_i32 addr, int index)
{
- tcg_gen_qemu_ld_i64(val, addr, index, MO_TEQ);
+ TCGMemOp opc = MO_Q | s->be_data;
+ tcg_gen_qemu_ld_i64(val, addr, index, opc);
}
static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
TCGv_i32 addr, int index)
{
- tcg_gen_qemu_st_i64(val, addr, index, MO_TEQ);
+ TCGMemOp opc = MO_Q | s->be_data;
+ tcg_gen_qemu_st_i64(val, addr, index, opc);
}
#else
@@ -952,9 +956,10 @@ static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
+ TCGMemOp opc = (OPC) | s->be_data; \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
- tcg_gen_qemu_ld_i32(val, addr64, index, OPC); \
+ tcg_gen_qemu_ld_i32(val, addr64, index, opc); \
tcg_temp_free(addr64); \
}
@@ -962,27 +967,30 @@ static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
+ TCGMemOp opc = (OPC) | s->be_data; \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
- tcg_gen_qemu_st_i32(val, addr64, index, OPC); \
+ tcg_gen_qemu_st_i32(val, addr64, index, opc); \
tcg_temp_free(addr64); \
}
static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
TCGv_i32 addr, int index)
{
+ TCGMemOp opc = MO_Q | s->be_data;
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
- tcg_gen_qemu_ld_i64(val, addr64, index, MO_TEQ);
+ tcg_gen_qemu_ld_i64(val, addr64, index, opc);
tcg_temp_free(addr64);
}
static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
TCGv_i32 addr, int index)
{
+ TCGMemOp opc = MO_Q | s->be_data;
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
- tcg_gen_qemu_st_i64(val, addr64, index, MO_TEQ);
+ tcg_gen_qemu_st_i64(val, addr64, index, opc);
tcg_temp_free(addr64);
}
@@ -990,15 +998,15 @@ static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
DO_GEN_LD(8s, MO_SB)
DO_GEN_LD(8u, MO_UB)
-DO_GEN_LD(16s, MO_TESW)
-DO_GEN_LD(16u, MO_TEUW)
-DO_GEN_LD(32u, MO_TEUL)
+DO_GEN_LD(16s, MO_SW)
+DO_GEN_LD(16u, MO_UW)
+DO_GEN_LD(32u, MO_UL)
/* 'a' variants include an alignment check */
-DO_GEN_LD(16ua, MO_TEUW | MO_ALIGN)
-DO_GEN_LD(32ua, MO_TEUL | MO_ALIGN)
+DO_GEN_LD(16ua, MO_UW | MO_ALIGN)
+DO_GEN_LD(32ua, MO_UL | MO_ALIGN)
DO_GEN_ST(8, MO_UB)
-DO_GEN_ST(16, MO_TEUW)
-DO_GEN_ST(32, MO_TEUL)
+DO_GEN_ST(16, MO_UW)
+DO_GEN_ST(32, MO_UL)
static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
{
@@ -11322,6 +11330,7 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
!arm_el_is_aa64(env, 3);
dc->thumb = ARM_TBFLAG_THUMB(tb->flags);
dc->sctlr_b = ARM_TBFLAG_SCTLR_B(tb->flags);
+ dc->be_data = MO_TE;
dc->condexec_mask = (ARM_TBFLAG_CONDEXEC(tb->flags) & 0xf) << 1;
dc->condexec_cond = ARM_TBFLAG_CONDEXEC(tb->flags) >> 4;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 5445232..6a18d7b 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -17,6 +17,7 @@ typedef struct DisasContext {
int singlestep_enabled;
int thumb;
int sctlr_b;
+ TCGMemOp be_data;
#if !defined(CONFIG_USER_ONLY)
int user;
#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 21/30] target-arm: a64: Add endianness support
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (19 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 20/30] target-arm: introduce disas flag for endianness Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 22/30] target-arm: introduce tbflag for endianness Peter Maydell
` (9 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Set the dc->mo_endianness flag for AA64 and use it in all ldst ops.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate-a64.c | 49 ++++++++++++++++++++++++++++------------------
1 file changed, 30 insertions(+), 19 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 88b95ab..539e6d9 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -723,7 +723,7 @@ static void do_gpr_st_memidx(DisasContext *s, TCGv_i64 source,
TCGv_i64 tcg_addr, int size, int memidx)
{
g_assert(size <= 3);
- tcg_gen_qemu_st_i64(source, tcg_addr, memidx, MO_TE + size);
+ tcg_gen_qemu_st_i64(source, tcg_addr, memidx, s->be_data + size);
}
static void do_gpr_st(DisasContext *s, TCGv_i64 source,
@@ -738,7 +738,7 @@ static void do_gpr_st(DisasContext *s, TCGv_i64 source,
static void do_gpr_ld_memidx(DisasContext *s, TCGv_i64 dest, TCGv_i64 tcg_addr,
int size, bool is_signed, bool extend, int memidx)
{
- TCGMemOp memop = MO_TE + size;
+ TCGMemOp memop = s->be_data + size;
g_assert(size <= 3);
@@ -770,13 +770,18 @@ static void do_fp_st(DisasContext *s, int srcidx, TCGv_i64 tcg_addr, int size)
TCGv_i64 tmp = tcg_temp_new_i64();
tcg_gen_ld_i64(tmp, cpu_env, fp_reg_offset(s, srcidx, MO_64));
if (size < 4) {
- tcg_gen_qemu_st_i64(tmp, tcg_addr, get_mem_index(s), MO_TE + size);
+ tcg_gen_qemu_st_i64(tmp, tcg_addr, get_mem_index(s),
+ s->be_data + size);
} else {
+ bool be = s->be_data == MO_BE;
TCGv_i64 tcg_hiaddr = tcg_temp_new_i64();
- tcg_gen_qemu_st_i64(tmp, tcg_addr, get_mem_index(s), MO_TEQ);
- tcg_gen_ld_i64(tmp, cpu_env, fp_reg_hi_offset(s, srcidx));
+
tcg_gen_addi_i64(tcg_hiaddr, tcg_addr, 8);
- tcg_gen_qemu_st_i64(tmp, tcg_hiaddr, get_mem_index(s), MO_TEQ);
+ tcg_gen_qemu_st_i64(tmp, be ? tcg_hiaddr : tcg_addr, get_mem_index(s),
+ s->be_data | MO_Q);
+ tcg_gen_ld_i64(tmp, cpu_env, fp_reg_hi_offset(s, srcidx));
+ tcg_gen_qemu_st_i64(tmp, be ? tcg_addr : tcg_hiaddr, get_mem_index(s),
+ s->be_data | MO_Q);
tcg_temp_free_i64(tcg_hiaddr);
}
@@ -793,17 +798,21 @@ static void do_fp_ld(DisasContext *s, int destidx, TCGv_i64 tcg_addr, int size)
TCGv_i64 tmphi;
if (size < 4) {
- TCGMemOp memop = MO_TE + size;
+ TCGMemOp memop = s->be_data + size;
tmphi = tcg_const_i64(0);
tcg_gen_qemu_ld_i64(tmplo, tcg_addr, get_mem_index(s), memop);
} else {
+ bool be = s->be_data == MO_BE;
TCGv_i64 tcg_hiaddr;
+
tmphi = tcg_temp_new_i64();
tcg_hiaddr = tcg_temp_new_i64();
- tcg_gen_qemu_ld_i64(tmplo, tcg_addr, get_mem_index(s), MO_TEQ);
tcg_gen_addi_i64(tcg_hiaddr, tcg_addr, 8);
- tcg_gen_qemu_ld_i64(tmphi, tcg_hiaddr, get_mem_index(s), MO_TEQ);
+ tcg_gen_qemu_ld_i64(tmplo, be ? tcg_hiaddr : tcg_addr, get_mem_index(s),
+ s->be_data | MO_Q);
+ tcg_gen_qemu_ld_i64(tmphi, be ? tcg_addr : tcg_hiaddr, get_mem_index(s),
+ s->be_data | MO_Q);
tcg_temp_free_i64(tcg_hiaddr);
}
@@ -942,7 +951,7 @@ static void clear_vec_high(DisasContext *s, int rd)
static void do_vec_st(DisasContext *s, int srcidx, int element,
TCGv_i64 tcg_addr, int size)
{
- TCGMemOp memop = MO_TE + size;
+ TCGMemOp memop = s->be_data + size;
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
read_vec_element(s, tcg_tmp, srcidx, element, size);
@@ -955,7 +964,7 @@ static void do_vec_st(DisasContext *s, int srcidx, int element,
static void do_vec_ld(DisasContext *s, int destidx, int element,
TCGv_i64 tcg_addr, int size)
{
- TCGMemOp memop = MO_TE + size;
+ TCGMemOp memop = s->be_data + size;
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
tcg_gen_qemu_ld_i64(tcg_tmp, tcg_addr, get_mem_index(s), memop);
@@ -1702,7 +1711,7 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
TCGv_i64 addr, int size, bool is_pair)
{
TCGv_i64 tmp = tcg_temp_new_i64();
- TCGMemOp memop = MO_TE + size;
+ TCGMemOp memop = s->be_data + size;
g_assert(size <= 3);
tcg_gen_qemu_ld_i64(tmp, addr, get_mem_index(s), memop);
@@ -1764,7 +1773,7 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
tcg_gen_brcond_i64(TCG_COND_NE, addr, cpu_exclusive_addr, fail_label);
tmp = tcg_temp_new_i64();
- tcg_gen_qemu_ld_i64(tmp, addr, get_mem_index(s), MO_TE + size);
+ tcg_gen_qemu_ld_i64(tmp, addr, get_mem_index(s), s->be_data + size);
tcg_gen_brcond_i64(TCG_COND_NE, tmp, cpu_exclusive_val, fail_label);
tcg_temp_free_i64(tmp);
@@ -1773,7 +1782,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
TCGv_i64 tmphi = tcg_temp_new_i64();
tcg_gen_addi_i64(addrhi, addr, 1 << size);
- tcg_gen_qemu_ld_i64(tmphi, addrhi, get_mem_index(s), MO_TE + size);
+ tcg_gen_qemu_ld_i64(tmphi, addrhi, get_mem_index(s),
+ s->be_data + size);
tcg_gen_brcond_i64(TCG_COND_NE, tmphi, cpu_exclusive_high, fail_label);
tcg_temp_free_i64(tmphi);
@@ -1781,13 +1791,14 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
}
/* We seem to still have the exclusive monitor, so do the store */
- tcg_gen_qemu_st_i64(cpu_reg(s, rt), addr, get_mem_index(s), MO_TE + size);
+ tcg_gen_qemu_st_i64(cpu_reg(s, rt), addr, get_mem_index(s),
+ s->be_data + size);
if (is_pair) {
TCGv_i64 addrhi = tcg_temp_new_i64();
tcg_gen_addi_i64(addrhi, addr, 1 << size);
tcg_gen_qemu_st_i64(cpu_reg(s, rt2), addrhi,
- get_mem_index(s), MO_TE + size);
+ get_mem_index(s), s->be_data + size);
tcg_temp_free_i64(addrhi);
}
@@ -2602,7 +2613,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
tcg_gen_qemu_ld_i64(tcg_tmp, tcg_addr,
- get_mem_index(s), MO_TE + scale);
+ get_mem_index(s), s->be_data + scale);
switch (scale) {
case 0:
mulconst = 0x0101010101010101ULL;
@@ -2632,9 +2643,9 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
} else {
/* Load/store one element per register */
if (is_load) {
- do_vec_ld(s, rt, index, tcg_addr, MO_TE + scale);
+ do_vec_ld(s, rt, index, tcg_addr, s->be_data + scale);
} else {
- do_vec_st(s, rt, index, tcg_addr, MO_TE + scale);
+ do_vec_st(s, rt, index, tcg_addr, s->be_data + scale);
}
}
tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes);
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 22/30] target-arm: introduce tbflag for endianness
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (20 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 21/30] target-arm: a64: Add endianness support Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 23/30] target-arm: implement setend Peter Maydell
` (8 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Introduce a tbflags for endianness, set based upon the CPUs current
endianness. This in turn propagates through to the disas endianness
flag.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu.h | 7 +++++++
target-arm/translate-a64.c | 2 +-
target-arm/translate.c | 2 +-
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cbf171c..279c91f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1985,6 +1985,8 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
*/
#define ARM_TBFLAG_NS_SHIFT 19
#define ARM_TBFLAG_NS_MASK (1 << ARM_TBFLAG_NS_SHIFT)
+#define ARM_TBFLAG_BE_DATA_SHIFT 20
+#define ARM_TBFLAG_BE_DATA_MASK (1 << ARM_TBFLAG_BE_DATA_SHIFT)
/* Bit usage when in AArch64 state: currently we have no A64 specific bits */
@@ -2015,6 +2017,8 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
(((F) & ARM_TBFLAG_XSCALE_CPAR_MASK) >> ARM_TBFLAG_XSCALE_CPAR_SHIFT)
#define ARM_TBFLAG_NS(F) \
(((F) & ARM_TBFLAG_NS_MASK) >> ARM_TBFLAG_NS_SHIFT)
+#define ARM_TBFLAG_BE_DATA(F) \
+ (((F) & ARM_TBFLAG_BE_DATA_MASK) >> ARM_TBFLAG_BE_DATA_SHIFT)
static inline bool bswap_code(bool sctlr_b)
{
@@ -2157,6 +2161,9 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
}
}
+ if (arm_cpu_data_is_big_endian(env)) {
+ *flags |= ARM_TBFLAG_BE_DATA_MASK;
+ }
*flags |= fp_exception_el(env) << ARM_TBFLAG_FPEXC_EL_SHIFT;
*cs_base = 0;
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 539e6d9..f0c73df 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11043,7 +11043,7 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
!arm_el_is_aa64(env, 3);
dc->thumb = 0;
dc->sctlr_b = 0;
- dc->be_data = MO_TE;
+ dc->be_data = ARM_TBFLAG_BE_DATA(tb->flags) ? MO_BE : MO_LE;
dc->condexec_mask = 0;
dc->condexec_cond = 0;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 2d4b1cc..c430fec 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11330,7 +11330,7 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
!arm_el_is_aa64(env, 3);
dc->thumb = ARM_TBFLAG_THUMB(tb->flags);
dc->sctlr_b = ARM_TBFLAG_SCTLR_B(tb->flags);
- dc->be_data = MO_TE;
+ dc->be_data = ARM_TBFLAG_BE_DATA(tb->flags) ? MO_BE : MO_LE;
dc->condexec_mask = (ARM_TBFLAG_CONDEXEC(tb->flags) & 0xf) << 1;
dc->condexec_cond = ARM_TBFLAG_CONDEXEC(tb->flags) >> 4;
dc->mmu_idx = ARM_TBFLAG_MMUIDX(tb->flags);
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 23/30] target-arm: implement setend
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (21 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 22/30] target-arm: introduce tbflag for endianness Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 24/30] target-arm: implement BE32 mode in system emulation Peter Maydell
` (7 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.h | 1 +
target-arm/op_helper.c | 5 +++++
target-arm/translate.c | 14 ++++++--------
3 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/target-arm/helper.h b/target-arm/helper.h
index ea13202..e3d09d9 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
i32, i32, i32, i32)
DEF_HELPER_2(exception_internal, void, env, i32)
DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32)
+DEF_HELPER_1(setend, void, env)
DEF_HELPER_1(wfi, void, env)
DEF_HELPER_1(wfe, void, env)
DEF_HELPER_1(yield, void, env)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 4881e34..92fde0a 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -296,6 +296,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
return res;
}
+void HELPER(setend)(CPUARMState *env)
+{
+ env->uncached_cpsr ^= CPSR_E;
+}
+
/* Function checks whether WFx (WFI/WFE) instructions are set up to be trapped.
* The function returns the target EL (1-3) if the instruction is to be trapped;
* otherwise it returns 0 indicating it is not trapped.
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c430fec..c23ddb3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7786,10 +7786,9 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
if ((insn & 0x0ffffdff) == 0x01010000) {
ARCH(6);
/* setend */
- if (((insn >> 9) & 1) != bswap_code(s->sctlr_b)) {
- /* Dynamic endianness switching not implemented. */
- qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
- goto illegal_op;
+ if (((insn >> 9) & 1) != !!(s->be_data == MO_BE)) {
+ gen_helper_setend(cpu_env);
+ s->is_jmp = DISAS_UPDATE;
}
return;
} else if ((insn & 0x0fffff00) == 0x057ff000) {
@@ -11121,10 +11120,9 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
case 2:
/* setend */
ARCH(6);
- if (((insn >> 3) & 1) != bswap_code(s->sctlr_b)) {
- /* Dynamic endianness switching not implemented. */
- qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
- goto illegal_op;
+ if (((insn >> 3) & 1) != !!(s->be_data == MO_BE)) {
+ gen_helper_setend(cpu_env);
+ s->is_jmp = DISAS_UPDATE;
}
break;
case 3:
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 24/30] target-arm: implement BE32 mode in system emulation
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (22 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 23/30] target-arm: implement setend Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 25/30] loader: add API to load elf header Peter Maydell
` (6 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Paolo Bonzini <pbonzini@redhat.com>
System emulation only has a little-endian target; BE32 mode
is implemented by adjusting the low bits of the address
for every byte and halfword load and store. 64-bit accesses
flip the low and high words.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[PC changes:
* rebased against master (Jan 2016)
]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu.h | 5 ++-
target-arm/translate.c | 86 +++++++++++++++++++++++++++++++++++++++++---------
2 files changed, 73 insertions(+), 18 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 279c91f..066ff67 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -2033,9 +2033,8 @@ static inline bool bswap_code(bool sctlr_b)
#endif
sctlr_b;
#else
- /* We do not implement BE32 mode for system-mode emulation, but
- * anyway it would always do little-endian accesses with
- * TARGET_WORDS_BIGENDIAN = 0.
+ /* All code access in ARM is little endian, and there are no loaders
+ * doing swaps that need to be reversed
*/
return 0;
#endif
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c23ddb3..25db09e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -911,6 +911,12 @@ static inline void store_reg_from_load(DisasContext *s, int reg, TCGv_i32 var)
}
}
+#ifdef CONFIG_USER_ONLY
+#define IS_USER_ONLY 1
+#else
+#define IS_USER_ONLY 0
+#endif
+
/* Abstractions of "generate code to do a guest load/store for
* AArch32", where a vaddr is always 32 bits (and is zero
* extended if we're a 64 bit core) and data is also
@@ -920,19 +926,35 @@ static inline void store_reg_from_load(DisasContext *s, int reg, TCGv_i32 var)
*/
#if TARGET_LONG_BITS == 32
-#define DO_GEN_LD(SUFF, OPC) \
+#define DO_GEN_LD(SUFF, OPC, BE32_XOR) \
static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
TCGMemOp opc = (OPC) | s->be_data; \
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */ \
+ if (!IS_USER_ONLY && s->sctlr_b && BE32_XOR) { \
+ TCGv addr_be = tcg_temp_new(); \
+ tcg_gen_xori_i32(addr_be, addr, BE32_XOR); \
+ tcg_gen_qemu_ld_i32(val, addr_be, index, opc); \
+ tcg_temp_free(addr_be); \
+ return; \
+ } \
tcg_gen_qemu_ld_i32(val, addr, index, opc); \
}
-#define DO_GEN_ST(SUFF, OPC) \
+#define DO_GEN_ST(SUFF, OPC, BE32_XOR) \
static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
TCGMemOp opc = (OPC) | s->be_data; \
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */ \
+ if (!IS_USER_ONLY && s->sctlr_b && BE32_XOR) { \
+ TCGv addr_be = tcg_temp_new(); \
+ tcg_gen_xori_i32(addr_be, addr, BE32_XOR); \
+ tcg_gen_qemu_st_i32(val, addr_be, index, opc); \
+ tcg_temp_free(addr_be); \
+ return; \
+ } \
tcg_gen_qemu_st_i32(val, addr, index, opc); \
}
@@ -941,35 +963,55 @@ static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
{
TCGMemOp opc = MO_Q | s->be_data;
tcg_gen_qemu_ld_i64(val, addr, index, opc);
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */
+ if (!IS_USER_ONLY && s->sctlr_b) {
+ tcg_gen_rotri_i64(val, val, 32);
+ }
}
static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
TCGv_i32 addr, int index)
{
TCGMemOp opc = MO_Q | s->be_data;
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */
+ if (!IS_USER_ONLY && s->sctlr_b) {
+ TCGv_i64 tmp = tcg_temp_new_i64();
+ tcg_gen_rotri_i64(tmp, val, 32);
+ tcg_gen_qemu_st_i64(tmp, addr, index, opc);
+ tcg_temp_free_i64(tmp);
+ return;
+ }
tcg_gen_qemu_st_i64(val, addr, index, opc);
}
#else
-#define DO_GEN_LD(SUFF, OPC) \
+#define DO_GEN_LD(SUFF, OPC, BE32_XOR) \
static inline void gen_aa32_ld##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
TCGMemOp opc = (OPC) | s->be_data; \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */ \
+ if (!IS_USER_ONLY && s->sctlr_b && BE32_XOR) { \
+ tcg_gen_xori_i64(addr64, addr64, BE32_XOR); \
+ } \
tcg_gen_qemu_ld_i32(val, addr64, index, opc); \
tcg_temp_free(addr64); \
}
-#define DO_GEN_ST(SUFF, OPC) \
+#define DO_GEN_ST(SUFF, OPC, BE32_XOR) \
static inline void gen_aa32_st##SUFF(DisasContext *s, TCGv_i32 val, \
TCGv_i32 addr, int index) \
{ \
TCGMemOp opc = (OPC) | s->be_data; \
TCGv addr64 = tcg_temp_new(); \
tcg_gen_extu_i32_i64(addr64, addr); \
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */ \
+ if (!IS_USER_ONLY && s->sctlr_b && BE32_XOR) { \
+ tcg_gen_xori_i64(addr64, addr64, BE32_XOR); \
+ } \
tcg_gen_qemu_st_i32(val, addr64, index, opc); \
tcg_temp_free(addr64); \
}
@@ -981,6 +1023,11 @@ static inline void gen_aa32_ld64(DisasContext *s, TCGv_i64 val,
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
tcg_gen_qemu_ld_i64(val, addr64, index, opc);
+
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */
+ if (!IS_USER_ONLY && s->sctlr_b) {
+ tcg_gen_rotri_i64(val, val, 32);
+ }
tcg_temp_free(addr64);
}
@@ -990,23 +1037,32 @@ static inline void gen_aa32_st64(DisasContext *s, TCGv_i64 val,
TCGMemOp opc = MO_Q | s->be_data;
TCGv addr64 = tcg_temp_new();
tcg_gen_extu_i32_i64(addr64, addr);
- tcg_gen_qemu_st_i64(val, addr64, index, opc);
+
+ /* Not needed for user-mode BE32, where we use MO_BE instead. */
+ if (!IS_USER_ONLY && s->sctlr_b) {
+ TCGv tmp = tcg_temp_new();
+ tcg_gen_rotri_i64(tmp, val, 32);
+ tcg_gen_qemu_st_i64(tmp, addr64, index, opc);
+ tcg_temp_free(tmp);
+ } else {
+ tcg_gen_qemu_st_i64(val, addr64, index, opc);
+ }
tcg_temp_free(addr64);
}
#endif
-DO_GEN_LD(8s, MO_SB)
-DO_GEN_LD(8u, MO_UB)
-DO_GEN_LD(16s, MO_SW)
-DO_GEN_LD(16u, MO_UW)
-DO_GEN_LD(32u, MO_UL)
+DO_GEN_LD(8s, MO_SB, 3)
+DO_GEN_LD(8u, MO_UB, 3)
+DO_GEN_LD(16s, MO_SW, 2)
+DO_GEN_LD(16u, MO_UW, 2)
+DO_GEN_LD(32u, MO_UL, 0)
/* 'a' variants include an alignment check */
-DO_GEN_LD(16ua, MO_UW | MO_ALIGN)
-DO_GEN_LD(32ua, MO_UL | MO_ALIGN)
-DO_GEN_ST(8, MO_UB)
-DO_GEN_ST(16, MO_UW)
-DO_GEN_ST(32, MO_UL)
+DO_GEN_LD(16ua, MO_UW | MO_ALIGN, 2)
+DO_GEN_LD(32ua, MO_UL | MO_ALIGN, 0)
+DO_GEN_ST(8, MO_UB, 3)
+DO_GEN_ST(16, MO_UW, 2)
+DO_GEN_ST(32, MO_UL, 0)
static inline void gen_set_pc_im(DisasContext *s, target_ulong val)
{
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 25/30] loader: add API to load elf header
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (23 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 24/30] target-arm: implement BE32 mode in system emulation Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 26/30] loader: load_elf(): Add doc comment Peter Maydell
` (5 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Add an API to load an elf header header from a file. Populates a
buffer with the header contents, as well as a boolean for whether the
elf is 64b or not. Both arguments are optional.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: Fix typo in comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/core/loader.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++
include/hw/loader.h | 13 +++++++++++++
2 files changed, 68 insertions(+)
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 260b3d6..125aa05 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -354,6 +354,61 @@ const char *load_elf_strerror(int error)
}
}
+void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp)
+{
+ int fd;
+ uint8_t e_ident_local[EI_NIDENT];
+ uint8_t *e_ident;
+ size_t hdr_size, off;
+ bool is64l;
+
+ if (!hdr) {
+ hdr = e_ident_local;
+ }
+ e_ident = hdr;
+
+ fd = open(filename, O_RDONLY | O_BINARY);
+ if (fd < 0) {
+ error_setg_errno(errp, errno, "Failed to open file: %s", filename);
+ return;
+ }
+ if (read(fd, hdr, EI_NIDENT) != EI_NIDENT) {
+ error_setg_errno(errp, errno, "Failed to read file: %s", filename);
+ goto fail;
+ }
+ if (e_ident[0] != ELFMAG0 ||
+ e_ident[1] != ELFMAG1 ||
+ e_ident[2] != ELFMAG2 ||
+ e_ident[3] != ELFMAG3) {
+ error_setg(errp, "Bad ELF magic");
+ goto fail;
+ }
+
+ is64l = e_ident[EI_CLASS] == ELFCLASS64;
+ hdr_size = is64l ? sizeof(Elf64_Ehdr) : sizeof(Elf32_Ehdr);
+ if (is64) {
+ *is64 = is64l;
+ }
+
+ off = EI_NIDENT;
+ while (hdr != e_ident_local && off < hdr_size) {
+ size_t br = read(fd, hdr + off, hdr_size - off);
+ switch (br) {
+ case 0:
+ error_setg(errp, "File too short: %s", filename);
+ goto fail;
+ case -1:
+ error_setg_errno(errp, errno, "Failed to read file: %s",
+ filename);
+ goto fail;
+ }
+ off += br;
+ }
+
+fail:
+ close(fd);
+}
+
/* return < 0 if error, otherwise the number of bytes loaded in memory */
int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr,
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 09c3764..358da55 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -48,6 +48,19 @@ int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr,
uint64_t *highaddr, int big_endian, int elf_machine,
int clear_lsb);
+
+/** load_elf_hdr:
+ * @filename: Path of ELF file
+ * @hdr: Buffer to populate with header data. Header data will not be
+ * filled if set to NULL.
+ * @is64: Set to true if the ELF is 64bit. Ignored if set to NULL
+ * @errp: Populated with an error in failure cases
+ *
+ * Inspect an ELF file's header. Read its full header contents into a
+ * buffer and/or determine if the ELF is 64bit.
+ */
+void load_elf_hdr(const char *filename, void *hdr, bool *is64, Error **errp);
+
int load_aout(const char *filename, hwaddr addr, int max_sz,
int bswap_needed, hwaddr target_page_size);
int load_uimage(const char *filename, hwaddr *ep,
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 26/30] loader: load_elf(): Add doc comment
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (24 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 25/30] loader: add API to load elf header Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 27/30] loader: Add data swap option to load-elf Peter Maydell
` (4 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Document the usage of load_elf() for clarity on current features.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/loader.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 358da55..5485906 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -44,6 +44,29 @@ int load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz);
#define ELF_LOAD_WRONG_ARCH -3
#define ELF_LOAD_WRONG_ENDIAN -4
const char *load_elf_strerror(int error);
+
+/** load_elf:
+ * @filename: Path of ELF file
+ * @translate_fn: optional function to translate load addresses
+ * @translate_opaque: opaque data passed to @translate_fn
+ * @pentry: Populated with program entry point. Ignored if NULL.
+ * @lowaddr: Populated with lowest loaded address. Ignored if NULL.
+ * @highaddr: Populated with highest loaded address. Ignored if NULL.
+ * @bigendian: Expected ELF endianness. 0 for LE otherwise BE
+ * @elf_machine: Expected ELF machine type
+ * @clear_lsb: Set to mask off LSB of addresses (Some architectures use
+ * this for non-address data)
+ *
+ * Load an ELF file's contents to the emulated system's address space.
+ * Clients may optionally specify a callback to perform address
+ * translations. @pentry, @lowaddr and @highaddr are optional pointers
+ * which will be populated with various load information. @bigendian and
+ * @elf_machine give the expected endianness and machine for the ELF the
+ * load will fail if the target ELF does not match. Some architectures
+ * have some architecture-specific behaviours that come into effect when
+ * their particular values for @elf_machine are set.
+ */
+
int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr,
uint64_t *highaddr, int big_endian, int elf_machine,
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 27/30] loader: Add data swap option to load-elf
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (25 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 26/30] loader: load_elf(): Add doc comment Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 28/30] arm: boot: Support big-endian elfs Peter Maydell
` (3 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Some CPUs are of an opposite data-endianness to other components in the
system. Sometimes elfs have the data sections layed out with this CPU
data-endianness accounting for when loaded via the CPU, so byte swaps
(relative to other system components) will occur.
The leading example, is ARM's BE32 mode, which is is basically LE with
address manipulation on half-word and byte accesses to access the
hw/byte reversed address. This means that word data is invariant
across LE and BE32. This also means that instructions are still LE.
The expectation is that the elf will be loaded via the CPU in this
endianness scheme, which means the data in the elf is reversed at
compile time.
As QEMU loads via the system memory directly, rather than the CPU, we
need a mechanism to reverse elf data endianness to implement this
possibility.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/alpha/dp264.c | 4 ++--
hw/arm/armv7m.c | 2 +-
hw/arm/boot.c | 2 +-
hw/core/loader.c | 9 ++++++---
hw/cris/boot.c | 2 +-
hw/i386/multiboot.c | 3 ++-
hw/lm32/lm32_boards.c | 4 ++--
hw/lm32/milkymist.c | 2 +-
hw/m68k/an5206.c | 2 +-
hw/m68k/dummy_m68k.c | 2 +-
hw/m68k/mcf5208.c | 2 +-
hw/microblaze/boot.c | 4 ++--
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/moxie/moxiesim.c | 3 ++-
hw/openrisc/openrisc_sim.c | 3 ++-
hw/pci-host/prep.c | 2 +-
hw/ppc/e500.c | 2 +-
hw/ppc/mac_newworld.c | 5 +++--
hw/ppc/mac_oldworld.c | 5 +++--
hw/ppc/ppc440_bamboo.c | 3 ++-
hw/ppc/spapr.c | 6 ++++--
hw/ppc/virtex_ml507.c | 3 ++-
hw/s390x/ipl.c | 4 ++--
hw/sparc/leon3.c | 2 +-
hw/sparc/sun4m.c | 4 ++--
hw/sparc64/sun4u.c | 4 ++--
hw/tricore/tricore_testboard.c | 2 +-
hw/xtensa/sim.c | 4 ++--
hw/xtensa/xtfpga.c | 2 +-
include/hw/elf_ops.h | 22 +++++++++++++++++++++-
include/hw/loader.h | 5 ++++-
34 files changed, 81 insertions(+), 46 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 992d1b2..7c5989b 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -111,7 +111,7 @@ static void clipper_init(MachineState *machine)
}
size = load_elf(palcode_filename, cpu_alpha_superpage_to_phys,
NULL, &palcode_entry, &palcode_low, &palcode_high,
- 0, EM_ALPHA, 0);
+ 0, EM_ALPHA, 0, 0);
if (size < 0) {
error_report("could not load palcode '%s'", palcode_filename);
exit(1);
@@ -131,7 +131,7 @@ static void clipper_init(MachineState *machine)
size = load_elf(kernel_filename, cpu_alpha_superpage_to_phys,
NULL, &kernel_entry, &kernel_low, &kernel_high,
- 0, EM_ALPHA, 0);
+ 0, EM_ALPHA, 0, 0);
if (size < 0) {
error_report("could not load kernel '%s'", kernel_filename);
exit(1);
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index f3973f7..ed7d97f 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -211,7 +211,7 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
if (kernel_filename) {
image_size = load_elf(kernel_filename, NULL, NULL, &entry, &lowaddr,
- NULL, big_endian, EM_ARM, 1);
+ NULL, big_endian, EM_ARM, 1, 0);
if (image_size < 0) {
image_size = load_image_targphys(kernel_filename, 0, mem_size);
lowaddr = 0;
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 0a56d34c..17400be 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -755,7 +755,7 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
/* Assume that raw images are linux kernels, and ELF images are not. */
kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
&elf_low_addr, &elf_high_addr, big_endian,
- elf_machine, 1);
+ elf_machine, 1, 0);
if (kernel_size > 0 && have_dtb(info)) {
/* If there is still some room left at the base of RAM, try and put
* the DTB there like we do for images loaded with -bios or -pflash.
diff --git a/hw/core/loader.c b/hw/core/loader.c
index 125aa05..8e8031c 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -412,7 +412,8 @@ fail:
/* return < 0 if error, otherwise the number of bytes loaded in memory */
int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr,
- uint64_t *highaddr, int big_endian, int elf_machine, int clear_lsb)
+ uint64_t *highaddr, int big_endian, int elf_machine,
+ int clear_lsb, int data_swab)
{
int fd, data_order, target_data_order, must_swab, ret = ELF_LOAD_FAILED;
uint8_t e_ident[EI_NIDENT];
@@ -451,10 +452,12 @@ int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
lseek(fd, 0, SEEK_SET);
if (e_ident[EI_CLASS] == ELFCLASS64) {
ret = load_elf64(filename, fd, translate_fn, translate_opaque, must_swab,
- pentry, lowaddr, highaddr, elf_machine, clear_lsb);
+ pentry, lowaddr, highaddr, elf_machine, clear_lsb,
+ data_swab);
} else {
ret = load_elf32(filename, fd, translate_fn, translate_opaque, must_swab,
- pentry, lowaddr, highaddr, elf_machine, clear_lsb);
+ pentry, lowaddr, highaddr, elf_machine, clear_lsb,
+ data_swab);
}
fail:
diff --git a/hw/cris/boot.c b/hw/cris/boot.c
index 6608160..42485a4 100644
--- a/hw/cris/boot.c
+++ b/hw/cris/boot.c
@@ -73,7 +73,7 @@ void cris_load_image(CRISCPU *cpu, struct cris_load_info *li)
/* Boots a kernel elf binary, os/linux-2.6/vmlinux from the axis
devboard SDK. */
image_size = load_elf(li->image_filename, translate_kernel_address, NULL,
- &entry, NULL, &high, 0, EM_CRIS, 0);
+ &entry, NULL, &high, 0, EM_CRIS, 0, 0);
li->entry = entry;
if (image_size < 0) {
/* Takes a kimage from the axis devboard SDK. */
diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c
index c4d7d83..9e164e6 100644
--- a/hw/i386/multiboot.c
+++ b/hw/i386/multiboot.c
@@ -196,7 +196,8 @@ int load_multiboot(FWCfgState *fw_cfg,
}
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
- &elf_low, &elf_high, 0, I386_ELF_MACHINE, 0);
+ &elf_low, &elf_high, 0, I386_ELF_MACHINE,
+ 0, 0);
if (kernel_size < 0) {
fprintf(stderr, "Error while loading elf kernel\n");
exit(1);
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index efa6f91..c5a848b 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -143,7 +143,7 @@ static void lm32_evr_init(MachineState *machine)
int kernel_size;
kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL,
- 1, EM_LATTICEMICO32, 0);
+ 1, EM_LATTICEMICO32, 0, 0);
reset_info->bootstrap_pc = entry;
if (kernel_size < 0) {
@@ -245,7 +245,7 @@ static void lm32_uclinux_init(MachineState *machine)
int kernel_size;
kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL,
- 1, EM_LATTICEMICO32, 0);
+ 1, EM_LATTICEMICO32, 0, 0);
reset_info->bootstrap_pc = entry;
if (kernel_size < 0) {
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 5a37b4a..f71492e 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -177,7 +177,7 @@ milkymist_init(MachineState *machine)
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL,
- 1, EM_LATTICEMICO32, 0);
+ 1, EM_LATTICEMICO32, 0, 0);
reset_info->bootstrap_pc = entry;
if (kernel_size < 0) {
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index d87b945..85f7277 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -73,7 +73,7 @@ static void an5206_init(MachineState *machine)
}
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
- NULL, NULL, 1, EM_68K, 0);
+ NULL, NULL, 1, EM_68K, 0, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL,
diff --git a/hw/m68k/dummy_m68k.c b/hw/m68k/dummy_m68k.c
index a213bcf..3c2174b 100644
--- a/hw/m68k/dummy_m68k.c
+++ b/hw/m68k/dummy_m68k.c
@@ -50,7 +50,7 @@ static void dummy_m68k_init(MachineState *machine)
/* Load kernel. */
if (kernel_filename) {
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
- NULL, NULL, 1, EM_68K, 0);
+ NULL, NULL, 1, EM_68K, 0, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL,
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 9597e86..4f49d34 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -276,7 +276,7 @@ static void mcf5208evb_init(MachineState *machine)
}
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
- NULL, NULL, 1, EM_68K, 0);
+ NULL, NULL, 1, EM_68K, 0, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL,
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index 26cc378..c24014a 100644
--- a/hw/microblaze/boot.c
+++ b/hw/microblaze/boot.c
@@ -142,12 +142,12 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base,
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL,
&entry, &low, &high,
- big_endian, EM_MICROBLAZE, 0);
+ big_endian, EM_MICROBLAZE, 0, 0);
base32 = entry;
if (base32 == 0xc0000000) {
kernel_size = load_elf(kernel_filename, translate_kernel_address,
NULL, &entry, NULL, NULL,
- big_endian, EM_MICROBLAZE, 0);
+ big_endian, EM_MICROBLAZE, 0, 0);
}
/* Always boot into physical ram. */
boot_info.bootstrap_pc = (uint32_t)entry;
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 184c404..4e5581b 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -117,7 +117,7 @@ static int64_t load_kernel (CPUMIPSState *env)
if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
(uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
- (uint64_t *)&kernel_high, 0, EM_MIPS, 1) < 0) {
+ (uint64_t *)&kernel_high, 0, EM_MIPS, 1, 0) < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
loaderparams.kernel_filename);
exit(1);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index c04aa2b..f5173c4 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -796,7 +796,7 @@ static int64_t load_kernel (void)
if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
(uint64_t *)&kernel_entry, NULL, (uint64_t *)&kernel_high,
- big_endian, EM_MIPS, 1) < 0) {
+ big_endian, EM_MIPS, 1, 0) < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
loaderparams.kernel_filename);
exit(1);
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index 8951ae9..1ecff44 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -70,7 +70,7 @@ static int64_t load_kernel(void)
kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
NULL, (uint64_t *)&entry, NULL,
(uint64_t *)&kernel_high, big_endian,
- EM_MIPS, 1);
+ EM_MIPS, 1, 0);
if (kernel_size >= 0) {
if ((entry & ~0x7fffffffULL) == 0x80000000)
entry = (int32_t)entry;
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index b6625ae..724b1e9 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -88,7 +88,7 @@ static int64_t load_kernel(void)
kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
NULL, (uint64_t *)&entry, NULL,
(uint64_t *)&kernel_high, big_endian,
- EM_MIPS, 1);
+ EM_MIPS, 1, 0);
if (kernel_size >= 0) {
if ((entry & ~0x7fffffffULL) == 0x80000000)
entry = (int32_t)entry;
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 9191ae9..d88c942 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -54,7 +54,8 @@ static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params)
ram_addr_t initrd_offset;
kernel_size = load_elf(loader_params->kernel_filename, NULL, NULL,
- &entry, &kernel_low, &kernel_high, 1, EM_MOXIE, 0);
+ &entry, &kernel_low, &kernel_high, 1, EM_MOXIE,
+ 0, 0);
if (kernel_size <= 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 25c637a..46418c3 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -69,7 +69,8 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
if (kernel_filename && !qtest_enabled()) {
kernel_size = load_elf(kernel_filename, NULL, NULL,
- &elf_entry, NULL, NULL, 1, EM_OPENRISC, 1);
+ &elf_entry, NULL, NULL, 1, EM_OPENRISC,
+ 1, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename,
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 5dc550f..49cdaab 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -313,7 +313,7 @@ static void raven_realize(PCIDevice *d, Error **errp)
if (filename) {
if (s->elf_machine != EM_NONE) {
bios_size = load_elf(filename, NULL, NULL, NULL,
- NULL, NULL, 1, s->elf_machine, 0);
+ NULL, NULL, 1, s->elf_machine, 0, 0);
}
if (bios_size < 0) {
bios_size = get_image_size(filename);
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index bd84e9a..09154fa 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -1017,7 +1017,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
- 1, PPC_ELF_MACHINE, 0);
+ 1, PPC_ELF_MACHINE, 0, 0);
if (bios_size < 0) {
/*
* Hrm. No ELF image? Try a uImage, maybe someone is giving us an
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index f95086b..f0a36b3 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -221,7 +221,7 @@ static void ppc_core99_init(MachineState *machine)
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, NULL, NULL, NULL,
- NULL, NULL, 1, PPC_ELF_MACHINE, 0);
+ NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
g_free(filename);
} else {
@@ -244,7 +244,8 @@ static void ppc_core99_init(MachineState *machine)
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
- NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 0);
+ NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
+ 0, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 8984398..d952713 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -149,7 +149,7 @@ static void ppc_heathrow_init(MachineState *machine)
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
- 1, PPC_ELF_MACHINE, 0);
+ 1, PPC_ELF_MACHINE, 0, 0);
g_free(filename);
} else {
bios_size = -1;
@@ -170,7 +170,8 @@ static void ppc_heathrow_init(MachineState *machine)
#endif
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
- NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 0);
+ NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
+ 0, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index e535a9f..5c535b1 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -256,7 +256,8 @@ static void bamboo_init(MachineState *machine)
NULL, NULL);
if (success < 0) {
success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
- &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE, 0);
+ &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE,
+ 0, 0);
entry = elf_entry;
loadaddr = elf_lowaddr;
}
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index e9d4abf..64c4acc 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1942,11 +1942,13 @@ static void ppc_spapr_init(MachineState *machine)
uint64_t lowaddr = 0;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
- NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 0);
+ NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
+ 0, 0);
if (kernel_size == ELF_LOAD_WRONG_ENDIAN) {
kernel_size = load_elf(kernel_filename,
translate_kernel_address, NULL,
- NULL, &lowaddr, NULL, 0, PPC_ELF_MACHINE, 0);
+ NULL, &lowaddr, NULL, 0, PPC_ELF_MACHINE,
+ 0, 0);
kernel_le = kernel_size > 0;
}
if (kernel_size < 0) {
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index a902c88..b807a08 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -258,7 +258,8 @@ static void virtex_init(MachineState *machine)
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL,
- &entry, &low, &high, 1, PPC_ELF_MACHINE, 0);
+ &entry, &low, &high, 1, PPC_ELF_MACHINE,
+ 0, 0);
boot_info.bootstrap_pc = entry & 0x00ffffff;
if (kernel_size < 0) {
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index c9cf7cc..41ff002 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -101,7 +101,7 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
bios_size = load_elf(bios_filename, bios_translate_addr, &fwbase,
&ipl->bios_start_addr, NULL, NULL, 1,
- EM_S390, 0);
+ EM_S390, 0, 0);
if (bios_size > 0) {
/* Adjust ELF start address to final location */
ipl->bios_start_addr += fwbase;
@@ -124,7 +124,7 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp)
if (ipl->kernel) {
kernel_size = load_elf(ipl->kernel, NULL, NULL, &pentry, NULL,
- NULL, 1, EM_S390, 0);
+ NULL, 1, EM_S390, 0, 0);
if (kernel_size < 0) {
kernel_size = load_image_targphys(ipl->kernel, 0, ram_size);
}
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index 07c5c85..c579f5b 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -194,7 +194,7 @@ static void leon3_generic_hw_init(MachineState *machine)
uint64_t entry;
kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL,
- 1 /* big endian */, EM_SPARC, 0);
+ 1 /* big endian */, EM_SPARC, 0, 0);
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 20dc341..eebef37 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -279,7 +279,7 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
bswap_needed = 0;
#endif
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
- NULL, NULL, NULL, 1, EM_SPARC, 0);
+ NULL, NULL, NULL, 1, EM_SPARC, 0, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR,
RAM_size - KERNEL_LOAD_ADDR, bswap_needed,
@@ -723,7 +723,7 @@ static void prom_init(hwaddr addr, const char *bios_name)
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
ret = load_elf(filename, translate_prom_address, &addr, NULL,
- NULL, NULL, 1, EM_SPARC, 0);
+ NULL, NULL, 1, EM_SPARC, 0, 0);
if (ret < 0 || ret > PROM_SIZE_MAX) {
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);
}
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index add1e75..0a6f453 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -187,7 +187,7 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename,
bswap_needed = 0;
#endif
kernel_size = load_elf(kernel_filename, NULL, NULL, kernel_entry,
- kernel_addr, &kernel_top, 1, EM_SPARCV9, 0);
+ kernel_addr, &kernel_top, 1, EM_SPARCV9, 0, 0);
if (kernel_size < 0) {
*kernel_addr = KERNEL_LOAD_ADDR;
*kernel_entry = KERNEL_LOAD_ADDR;
@@ -633,7 +633,7 @@ static void prom_init(hwaddr addr, const char *bios_name)
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
ret = load_elf(filename, translate_prom_address, &addr,
- NULL, NULL, NULL, 1, EM_SPARCV9, 0);
+ NULL, NULL, NULL, 1, EM_SPARCV9, 0, 0);
if (ret < 0 || ret > PROM_SIZE_MAX) {
ret = load_image_targphys(filename, addr, PROM_SIZE_MAX);
}
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 9392571..3cadb65 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -45,7 +45,7 @@ static void tricore_load_kernel(CPUTriCoreState *env)
kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL,
NULL, (uint64_t *)&entry, NULL,
NULL, 0,
- EM_TRICORE, 1);
+ EM_TRICORE, 1, 0);
if (kernel_size <= 0) {
error_report("qemu: no kernel file '%s'",
tricoretb_binfo.kernel_filename);
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 3a5060b..23050e8 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -94,10 +94,10 @@ static void xtensa_sim_init(MachineState *machine)
uint64_t elf_lowaddr;
#ifdef TARGET_WORDS_BIGENDIAN
int success = load_elf(kernel_filename, translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0);
+ &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0);
#else
int success = load_elf(kernel_filename, translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0);
+ &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0);
#endif
if (success > 0) {
env->pc = elf_entry;
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index fe7684d..ed09b9d 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -355,7 +355,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)
uint64_t elf_entry;
uint64_t elf_lowaddr;
int success = load_elf(kernel_filename, translate_phys_addr, cpu,
- &elf_entry, &elf_lowaddr, NULL, be, EM_XTENSA, 0);
+ &elf_entry, &elf_lowaddr, NULL, be, EM_XTENSA, 0, 0);
if (success > 0) {
entry_point = elf_entry;
} else {
diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h
index 0010c44..f510e7e 100644
--- a/include/hw/elf_ops.h
+++ b/include/hw/elf_ops.h
@@ -263,7 +263,7 @@ static int glue(load_elf, SZ)(const char *name, int fd,
void *translate_opaque,
int must_swab, uint64_t *pentry,
uint64_t *lowaddr, uint64_t *highaddr,
- int elf_machine, int clear_lsb)
+ int elf_machine, int clear_lsb, int data_swab)
{
struct elfhdr ehdr;
struct elf_phdr *phdr = NULL, *ph;
@@ -366,6 +366,26 @@ static int glue(load_elf, SZ)(const char *name, int fd,
addr = ph->p_paddr;
}
+ if (data_swab) {
+ int j;
+ for (j = 0; j < file_size; j += (1 << data_swab)) {
+ uint8_t *dp = data + j;
+ switch (data_swab) {
+ case (1):
+ *(uint16_t *)dp = bswap16(*(uint16_t *)dp);
+ break;
+ case (2):
+ *(uint32_t *)dp = bswap32(*(uint32_t *)dp);
+ break;
+ case (3):
+ *(uint64_t *)dp = bswap64(*(uint64_t *)dp);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ }
+ }
+
/* the entry pointer in the ELF header is a virtual
* address, if the text segments paddr and vaddr differ
* we need to adjust the entry */
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 5485906..0ba7808 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -56,6 +56,9 @@ const char *load_elf_strerror(int error);
* @elf_machine: Expected ELF machine type
* @clear_lsb: Set to mask off LSB of addresses (Some architectures use
* this for non-address data)
+ * @data_swab: Set to order of byte swapping for data. 0 for no swap, 1
+ * for swapping bytes within halfwords, 2 for bytes within
+ * words and 3 for within doublewords.
*
* Load an ELF file's contents to the emulated system's address space.
* Clients may optionally specify a callback to perform address
@@ -70,7 +73,7 @@ const char *load_elf_strerror(int error);
int load_elf(const char *filename, uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr,
uint64_t *highaddr, int big_endian, int elf_machine,
- int clear_lsb);
+ int clear_lsb, int data_swab);
/** load_elf_hdr:
* @filename: Path of ELF file
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 28/30] arm: boot: Support big-endian elfs
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (26 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 27/30] loader: Add data swap option to load-elf Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 29/30] hw/intc/arm_gic.c: Implement GICv2 GICC_DIR Peter Maydell
` (2 subsequent siblings)
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Support ARM big-endian ELF files in system-mode emulation. When loading
an elf, determine the endianness mode expected by the elf, and set the
relevant CPU state accordingly.
With this, big-endian modes are now fully supported via system-mode LE,
so there is no need to restrict the elf loading to the TARGET
endianness so the ifdeffery on TARGET_WORDS_BIGENDIAN goes away.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fix typo in comments]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/boot.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++------
include/hw/arm/arm.h | 9 +++++
2 files changed, 92 insertions(+), 10 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 17400be..8ba0e42 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -518,9 +518,34 @@ static void do_cpu_reset(void *opaque)
cpu_reset(cs);
if (info) {
if (!info->is_linux) {
+ int i;
/* Jump to the entry point. */
uint64_t entry = info->entry;
+ switch (info->endianness) {
+ case ARM_ENDIANNESS_LE:
+ env->cp15.sctlr_el[1] &= ~SCTLR_E0E;
+ for (i = 1; i < 4; ++i) {
+ env->cp15.sctlr_el[i] &= ~SCTLR_EE;
+ }
+ env->uncached_cpsr &= ~CPSR_E;
+ break;
+ case ARM_ENDIANNESS_BE8:
+ env->cp15.sctlr_el[1] |= SCTLR_E0E;
+ for (i = 1; i < 4; ++i) {
+ env->cp15.sctlr_el[i] |= SCTLR_EE;
+ }
+ env->uncached_cpsr |= CPSR_E;
+ break;
+ case ARM_ENDIANNESS_BE32:
+ env->cp15.sctlr_el[1] |= SCTLR_B;
+ break;
+ case ARM_ENDIANNESS_UNKNOWN:
+ break; /* Board's decision */
+ default:
+ g_assert_not_reached();
+ }
+
if (!env->aarch64) {
env->thumb = info->entry & 1;
entry &= 0xfffffffe;
@@ -638,6 +663,62 @@ static int do_arm_linux_init(Object *obj, void *opaque)
return 0;
}
+static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
+ uint64_t *lowaddr, uint64_t *highaddr,
+ int elf_machine)
+{
+ bool elf_is64;
+ union {
+ Elf32_Ehdr h32;
+ Elf64_Ehdr h64;
+ } elf_header;
+ int data_swab = 0;
+ bool big_endian;
+ uint64_t ret = -1;
+ Error *err = NULL;
+
+
+ load_elf_hdr(info->kernel_filename, &elf_header, &elf_is64, &err);
+ if (err) {
+ return ret;
+ }
+
+ if (elf_is64) {
+ big_endian = elf_header.h64.e_ident[EI_DATA] == ELFDATA2MSB;
+ info->endianness = big_endian ? ARM_ENDIANNESS_BE8
+ : ARM_ENDIANNESS_LE;
+ } else {
+ big_endian = elf_header.h32.e_ident[EI_DATA] == ELFDATA2MSB;
+ if (big_endian) {
+ if (bswap32(elf_header.h32.e_flags) & EF_ARM_BE8) {
+ info->endianness = ARM_ENDIANNESS_BE8;
+ } else {
+ info->endianness = ARM_ENDIANNESS_BE32;
+ /* In BE32, the CPU has a different view of the per-byte
+ * address map than the rest of the system. BE32 ELF files
+ * are organised such that they can be programmed through
+ * the CPU's per-word byte-reversed view of the world. QEMU
+ * however loads ELF files independently of the CPU. So
+ * tell the ELF loader to byte reverse the data for us.
+ */
+ data_swab = 2;
+ }
+ } else {
+ info->endianness = ARM_ENDIANNESS_LE;
+ }
+ }
+
+ ret = load_elf(info->kernel_filename, NULL, NULL,
+ pentry, lowaddr, highaddr, big_endian, elf_machine,
+ 1, data_swab);
+ if (ret <= 0) {
+ /* The header loaded but the image didn't */
+ exit(1);
+ }
+
+ return ret;
+}
+
static void arm_load_kernel_notify(Notifier *notifier, void *data)
{
CPUState *cs;
@@ -647,7 +728,6 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
uint64_t elf_entry, elf_low_addr, elf_high_addr;
int elf_machine;
hwaddr entry, kernel_load_offset;
- int big_endian;
static const ARMInsnFixup *primary_loader;
ArmLoadKernelNotifier *n = DO_UPCAST(ArmLoadKernelNotifier,
notifier, notifier);
@@ -733,12 +813,6 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
if (info->nb_cpus == 0)
info->nb_cpus = 1;
-#ifdef TARGET_WORDS_BIGENDIAN
- big_endian = 1;
-#else
- big_endian = 0;
-#endif
-
/* We want to put the initrd far enough into RAM that when the
* kernel is uncompressed it will not clobber the initrd. However
* on boards without much RAM we must ensure that we still leave
@@ -753,9 +827,8 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
MIN(info->ram_size / 2, 128 * 1024 * 1024);
/* Assume that raw images are linux kernels, and ELF images are not. */
- kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
- &elf_low_addr, &elf_high_addr, big_endian,
- elf_machine, 1, 0);
+ kernel_size = arm_load_elf(info, &elf_entry, &elf_low_addr,
+ &elf_high_addr, elf_machine);
if (kernel_size > 0 && have_dtb(info)) {
/* If there is still some room left at the base of RAM, try and put
* the DTB there like we do for images loaded with -bios or -pflash.
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
index 52ecf4a..b2517f9 100644
--- a/include/hw/arm/arm.h
+++ b/include/hw/arm/arm.h
@@ -16,6 +16,13 @@
#include "qemu/notify.h"
#include "cpu.h"
+typedef enum {
+ ARM_ENDIANNESS_UNKNOWN = 0,
+ ARM_ENDIANNESS_LE,
+ ARM_ENDIANNESS_BE8,
+ ARM_ENDIANNESS_BE32,
+} arm_endianness;
+
/* armv7m.c */
DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
const char *kernel_filename, const char *cpu_model);
@@ -103,6 +110,8 @@ struct arm_boot_info {
* changing to non-secure state if implementing a non-secure boot
*/
bool secure_board_setup;
+
+ arm_endianness endianness;
};
/**
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 29/30] hw/intc/arm_gic.c: Implement GICv2 GICC_DIR
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (27 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 28/30] arm: boot: Support big-endian elfs Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 30/30] target-arm: Only trap SRS from S-EL1 if specified mode is MON Peter Maydell
2016-03-04 14:05 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
The GICv2 introduces a new CPU interface register GICC_DIR, which
allows an OS to split the "priority drop" and "deactivate interrupt"
parts of interrupt completion. Implement this register.
(Note that the register is at offset 0x1000 in the CPU interface,
which means it is on a different 4K page from all the other registers.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1456854176-7813-1-git-send-email-peter.maydell@linaro.org
---
hw/cpu/a15mpcore.c | 2 +-
hw/intc/arm_gic.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
hw/intc/arm_gic_common.c | 2 +-
3 files changed, 46 insertions(+), 3 deletions(-)
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index e9063ad..a221b8f 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -109,7 +109,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp)
/* Memory map (addresses are offsets from PERIPHBASE):
* 0x0000-0x0fff -- reserved
* 0x1000-0x1fff -- GIC Distributor
- * 0x2000-0x2fff -- GIC CPU interface
+ * 0x2000-0x3fff -- GIC CPU interface
* 0x4000-0x4fff -- GIC virtual interface control (not modelled)
* 0x5000-0x5fff -- GIC virtual interface control (not modelled)
* 0x6000-0x7fff -- GIC virtual CPU interface (not modelled)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 60ab9b8..0834c2f 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -500,6 +500,41 @@ static uint8_t gic_get_running_priority(GICState *s, int cpu, MemTxAttrs attrs)
}
}
+/* Return true if we should split priority drop and interrupt deactivation,
+ * ie whether the relevant EOIMode bit is set.
+ */
+static bool gic_eoi_split(GICState *s, int cpu, MemTxAttrs attrs)
+{
+ if (s->revision != 2) {
+ /* Before GICv2 prio-drop and deactivate are not separable */
+ return false;
+ }
+ if (s->security_extn && !attrs.secure) {
+ return s->cpu_ctlr[cpu] & GICC_CTLR_EOIMODE_NS;
+ }
+ return s->cpu_ctlr[cpu] & GICC_CTLR_EOIMODE;
+}
+
+static void gic_deactivate_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
+{
+ int cm = 1 << cpu;
+ int group = gic_has_groups(s) && GIC_TEST_GROUP(irq, cm);
+
+ if (!gic_eoi_split(s, cpu, attrs)) {
+ /* This is UNPREDICTABLE; we choose to ignore it */
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "gic_deactivate_irq: GICC_DIR write when EOIMode clear");
+ return;
+ }
+
+ if (s->security_extn && !attrs.secure && !group) {
+ DPRINTF("Non-secure DI for Group0 interrupt %d ignored\n", irq);
+ return;
+ }
+
+ GIC_CLEAR_ACTIVE(irq, cm);
+}
+
void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
{
int cm = 1 << cpu;
@@ -544,7 +579,11 @@ void gic_complete_irq(GICState *s, int cpu, int irq, MemTxAttrs attrs)
*/
gic_drop_prio(s, cpu, group);
- GIC_CLEAR_ACTIVE(irq, cm);
+
+ /* In GICv2 the guest can choose to split priority-drop and deactivate */
+ if (!gic_eoi_split(s, cpu, attrs)) {
+ GIC_CLEAR_ACTIVE(irq, cm);
+ }
gic_update(s);
}
@@ -1210,6 +1249,10 @@ static MemTxResult gic_cpu_write(GICState *s, int cpu, int offset,
s->nsapr[regno][cpu] = value;
break;
}
+ case 0x1000:
+ /* GICC_DIR */
+ gic_deactivate_irq(s, cpu, value & 0x3ff, attrs);
+ break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
"gic_cpu_write: Bad offset %x\n", (int)offset);
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index ac8cf42..707d00d 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -121,7 +121,7 @@ void gic_init_irqs_and_mmio(GICState *s, qemu_irq_handler handler,
* neither it can use KVM.
*/
memory_region_init_io(&s->cpuiomem[0], OBJECT(s), ops ? &ops[1] : NULL,
- s, "gic_cpu", s->revision == 2 ? 0x1000 : 0x100);
+ s, "gic_cpu", s->revision == 2 ? 0x2000 : 0x100);
sysbus_init_mmio(sbd, &s->cpuiomem[0]);
}
}
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 30/30] target-arm: Only trap SRS from S-EL1 if specified mode is MON
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (28 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 29/30] hw/intc/arm_gic.c: Implement GICv2 GICC_DIR Peter Maydell
@ 2016-03-04 11:41 ` Peter Maydell
2016-03-04 14:05 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 11:41 UTC (permalink / raw)
To: qemu-devel
From: Ralf-Philipp Weinmann <ralf+devel@comsecuris.com>
Commit cbc0326b6fb9 caused SRS instructions executed from Secure
EL1 to trap to EL3 even if the specified mode was not monitor mode.
According to the ARMv8 Architecture reference manual [F6.1.203], ALL
of the following conditions need to be met for SRS to trap to EL3:
* It is executed at Secure PL1.
* The specified mode is monitor mode.
* EL3 is using AArch64.
Correct the condition governing the trap to EL3 to check the
specified mode.
Signed-off-by: Ralf-Philipp Weinmann <ralf+devel@comsecuris.com>
Message-id: 20160222224251.GA11654@beta.comsecuris.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tweaked comment text to read 'specified mode'; edited
commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 25db09e..025c7a5 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7655,6 +7655,7 @@ static void gen_srs(DisasContext *s,
/* SRS is:
* - trapped to EL3 if EL3 is AArch64 and we are at Secure EL1
+ * and specified mode is monitor mode
* - UNDEFINED in Hyp mode
* - UNPREDICTABLE in User or System mode
* - UNPREDICTABLE if the specified mode is:
@@ -7664,7 +7665,7 @@ static void gen_srs(DisasContext *s,
* -- Monitor, if we are Non-secure
* For the UNPREDICTABLE cases we choose to UNDEF.
*/
- if (s->current_el == 1 && !s->ns) {
+ if (s->current_el == 1 && !s->ns && mode == ARM_CPU_MODE_MON) {
gen_exception_insn(s, 4, EXCP_UDEF, syn_uncategorized(), 3);
return;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
` (29 preceding siblings ...)
2016-03-04 11:41 ` [Qemu-devel] [PULL 30/30] target-arm: Only trap SRS from S-EL1 if specified mode is MON Peter Maydell
@ 2016-03-04 14:05 ` Peter Maydell
30 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-03-04 14:05 UTC (permalink / raw)
To: QEMU Developers
On 4 March 2016 at 11:41, Peter Maydell <peter.maydell@linaro.org> wrote:
> Here's the target-arm queue: fairly large with a roundup of lots
> of patches that hit the list at or just before the softfreeze
> deadline. Most notable thing in here is Peter/Paolo's bigendian
> and SETEND support patchset.
>
> There are still some patchsets on list that I haven't got to
> reviewing yet (eg last set of raspi patches, imx6) which I hope
> to get to early next week and into a pullreq next week sometime.
>
> thanks
> -- PMM
>
> The following changes since commit 2d3b7c0164e1b9287304bc70dd6ed071ba3e8dfc:
>
> Merge remote-tracking branch 'remotes/amit-virtio-rng/tags/rng-for-2.6-1' into staging (2016-03-03 13:13:36 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160304
>
> for you to fetch changes up to ba63cf47a93041137a94e86b7d0cd87fc896949b:
>
> target-arm: Only trap SRS from S-EL1 if specified mode is MON (2016-03-04 11:30:22 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Correct handling of writes to CPSR from gdbstub in user mode
> * virt: lift maximum RAM limit to 255GB
> * sdhci: implement reset
> * virt: if booting in Secure mode, provide secure-only RAM, make first
> flash device secure-only, and assume the EL3 boot rom will handle PSCI
> * bcm2835: use explicit endianness accessors rather than ldl/stl_phys
> * support big-endian in system mode for ARM
> * implement SETEND instruction
> * arm_gic: implement the GICv2 GICC_DIR register
> * fix SRS bug: only trap from S-EL1 to EL3 if specified mode is Mon
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2016-06-14 14:13 Peter Maydell
0 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2016-06-14 14:13 UTC (permalink / raw)
To: qemu-devel
target-arm queue; quite a lot of patches but nothing earthshaking.
thanks
-- PMM
The following changes since commit d32490ca74c700edc74f0b2f6b7536b52a644739:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160614' into staging (2016-06-14 13:14:55 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160614
for you to fetch changes up to ea924f729b7703c9d81f62b54bcaa75f9d9f314e:
target-arm: Don't permit ARMv8-only Neon insns on ARMv7 (2016-06-14 15:02:30 +0100)
----------------------------------------------------------------
target-arm queue:
* add PMU support for virt machine under KVM
* fix reset and migration of TTBCR(S)
* add virt-2.7 machine type
* QOMify various ARM devices
* implement xilinx DisplayPort device
* don't permit ARMv8-only Neon insns to work on ARMv7
----------------------------------------------------------------
Andrew Jones (4):
hw/arm/virt: separate versioned type-init code
hw/arm/virt: introduce DEFINE_VIRT_MACHINE
hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATEST
hw/arm/virt: create the 2.7 machine type
KONRAD Frederic (7):
i2cbus: remove unused dev field
i2c: implement broadcast write
introduce aux-bus
introduce dpcd module
introduce xlnx-dpdma
introduce xlnx-dp
arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma
Peter Crosthwaite (1):
i2c: Factor our send() and recv() common logic
Peter Maydell (3):
target-arm: Fix reset and migration of TTBCR(S)
hw/i2c-ddc.c: Implement DDC I2C slave
target-arm: Don't permit ARMv8-only Neon insns on ARMv7
Shannon Zhao (3):
target-arm: kvm64: set guest PMUv3 feature bit if supported
hw/arm/virt: Add PMU node for virt machine
hw/arm/virt-acpi-build: Add PMU IRQ number in ACPI table
xiaoqiang zhao (12):
hw/i2c: QOM'ify bitbang_i2c.c
hw/i2c: QOM'ify exynos4210_i2c.c
hw/i2c: QOM'ify omap_i2c.c
hw/i2c: QOM'ify versatile_i2c.c
hw/gpio: QOM'ify omap_gpio.c
hw/gpio: QOM'ify pl061.c
hw/gpio: QOM'ify zaurus.c
hw/misc: QOM'ify arm_l2x0.c
hw/misc: QOM'ify exynos4210_pmu.c
hw/misc: QOM'ify mst_fpga.c
hw/dma: QOM'ify pxa2xx_dma.c
hw/sd: QOM'ify pl181.c
default-configs/aarch64-softmmu.mak | 3 +
hw/arm/virt-acpi-build.c | 4 +
hw/arm/virt.c | 99 ++-
hw/arm/xlnx-zynqmp.c | 32 +-
hw/display/Makefile.objs | 2 +
hw/display/dpcd.c | 173 +++++
hw/display/xlnx_dp.c | 1336 +++++++++++++++++++++++++++++++++++
hw/dma/Makefile.objs | 1 +
hw/dma/pxa2xx_dma.c | 38 +-
hw/dma/xlnx_dpdma.c | 794 +++++++++++++++++++++
hw/gpio/omap_gpio.c | 61 +-
hw/gpio/pl061.c | 24 +-
hw/gpio/zaurus.c | 14 +-
hw/i2c/Makefile.objs | 1 +
hw/i2c/bitbang_i2c.c | 14 +-
hw/i2c/core.c | 161 +++--
hw/i2c/exynos4210_i2c.c | 13 +-
hw/i2c/i2c-ddc.c | 307 ++++++++
hw/i2c/omap_i2c.c | 42 +-
hw/i2c/versatile_i2c.c | 19 +-
hw/misc/Makefile.objs | 1 +
hw/misc/arm_l2x0.c | 11 +-
hw/misc/aux.c | 292 ++++++++
hw/misc/exynos4210_pmu.c | 11 +-
hw/misc/mst_fpga.c | 13 +-
hw/sd/pl181.c | 26 +-
include/hw/arm/virt.h | 4 +
include/hw/arm/xlnx-zynqmp.h | 4 +
include/hw/display/dpcd.h | 105 +++
include/hw/display/xlnx_dp.h | 109 +++
include/hw/dma/xlnx_dpdma.h | 85 +++
include/hw/i2c/i2c-ddc.h | 38 +
include/hw/i2c/i2c.h | 1 +
include/hw/misc/aux.h | 128 ++++
target-arm/cpu.h | 2 +
target-arm/helper.c | 5 +-
target-arm/kvm32.c | 6 +
target-arm/kvm64.c | 46 ++
target-arm/kvm_arm.h | 7 +
target-arm/translate.c | 28 +
40 files changed, 3837 insertions(+), 223 deletions(-)
create mode 100644 hw/display/dpcd.c
create mode 100644 hw/display/xlnx_dp.c
create mode 100644 hw/dma/xlnx_dpdma.c
create mode 100644 hw/i2c/i2c-ddc.c
create mode 100644 hw/misc/aux.c
create mode 100644 include/hw/display/dpcd.h
create mode 100644 include/hw/display/xlnx_dp.h
create mode 100644 include/hw/dma/xlnx_dpdma.h
create mode 100644 include/hw/i2c/i2c-ddc.h
create mode 100644 include/hw/misc/aux.h
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
0 siblings, 2 replies; 42+ messages in thread
From: Peter Maydell @ 2017-02-27 18:04 UTC (permalink / raw)
To: qemu-devel
ARM queu; includes all the NVIC rewrite patches.
The QOMify-armv7m patchset hasn't got enough review just
yet but I may be able to sneak it in before freeze
tomorrow if it gets review. Didn't want to hold this lot
up waiting, anyway.
thanks
-- PMM
The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51:
Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227
for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601:
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000)
----------------------------------------------------------------
target-arm queue:
* raspi2: implement RNG module, GPIO and new SD card controller
(sufficient to boot new raspbian kernels)
* sdhci: bugfixes for block transfers
* virt: fix cpu object reference leak
* Add missing fp_access_check() to aarch64 crypto instructions
* cputlb: Don't assume do_unassigned_access() never returns
* virt: Add a user option to disallow ITS instantiation
* i.MX timers: fix reset handling
* ARMv7M NVIC: rewrite to fix broken priority handling and masking
* exynos: Fix proper mapping of CPUs by providing real cluster ID
* exynos: Fix Linux kernel division by zero for PLLs
----------------------------------------------------------------
Clement Deschamps (4):
bcm2835_sdhost: add bcm2835 sdhost controller
hw/sd: add card-reparenting function
bcm2835_gpio: add bcm2835 gpio controller
bcm2835: add sdhost and gpio controllers
Eric Auger (1):
hw/arm/virt: Add a user option to disallow ITS instantiation
Igor Mammedov (1):
hw/arm/virt: fix cpu object reference leak
Krzysztof Kozlowski (2):
hw/arm/exynos: Fix Linux kernel division by zero for PLLs
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
Kurban Mallachiev (1):
ARM i.MX timers: fix reset handling
Marcin Chojnacki (1):
target-arm: Implement BCM2835 hardware RNG
Michael Davidsaver (5):
armv7m: Rewrite NVIC to not use any GIC code
arm: gic: Remove references to NVIC
armv7m: Escalate exceptions to HardFault if necessary
armv7m: Simpler and faster exception start
armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
Nick Reilly (1):
Add missing fp_access_check() to aarch64 crypto instructions
Peter Maydell (10):
bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
cputlb: Don't assume do_unassigned_access() never returns
armv7m: Rename nvic_state to NVICState
armv7m: Implement reading and writing of PRIGROUP
armv7m: Fix condition check for taking exceptions
armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
armv7m: Extract "exception taken" code into functions
armv7m: Check exception return consistency
armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
armv7m: Allow SHCSR writes to change pending and active bits
Prasad J Pandit (4):
sd: sdhci: mask transfer mode register value
sd: sdhci: check transfer mode register in multi block transfer
sd: sdhci: conditionally invoke multi block transfer
sd: sdhci: Remove block count enable check in single block transfers
hw/gpio/Makefile.objs | 1 +
hw/misc/Makefile.objs | 3 +-
hw/sd/Makefile.objs | 1 +
hw/intc/gic_internal.h | 7 +-
include/hw/arm/bcm2835_peripherals.h | 6 +
include/hw/arm/virt.h | 1 +
include/hw/gpio/bcm2835_gpio.h | 39 ++
include/hw/misc/bcm2835_rng.h | 27 ++
include/hw/sd/bcm2835_sdhost.h | 48 ++
include/hw/sd/sd.h | 11 +
target/arm/cpu.h | 23 +-
cputlb.c | 15 +-
hw/arm/bcm2835_peripherals.c | 58 ++-
hw/arm/exynos4210.c | 18 +
hw/arm/virt.c | 32 +-
hw/gpio/bcm2835_gpio.c | 353 ++++++++++++++
hw/intc/arm_gic.c | 31 +-
hw/intc/arm_gic_common.c | 23 +-
hw/intc/armv7m_nvic.c | 885 ++++++++++++++++++++++++++++-------
hw/misc/bcm2835_rng.c | 149 ++++++
hw/misc/exynos4210_clk.c | 164 +++++++
hw/sd/bcm2835_sdhost.c | 429 +++++++++++++++++
hw/sd/core.c | 30 ++
hw/sd/sdhci.c | 25 +-
hw/timer/imx_gpt.c | 33 +-
linux-user/main.c | 1 +
target/arm/cpu.c | 16 +-
target/arm/helper.c | 245 +++++++---
target/arm/translate-a64.c | 12 +
target/arm/translate.c | 8 +-
hw/intc/trace-events | 15 +
31 files changed, 2376 insertions(+), 333 deletions(-)
create mode 100644 include/hw/gpio/bcm2835_gpio.h
create mode 100644 include/hw/misc/bcm2835_rng.h
create mode 100644 include/hw/sd/bcm2835_sdhost.h
create mode 100644 hw/gpio/bcm2835_gpio.c
create mode 100644 hw/misc/bcm2835_rng.c
create mode 100644 hw/misc/exynos4210_clk.c
create mode 100644 hw/sd/bcm2835_sdhost.c
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2017-02-27 18:04 Peter Maydell
@ 2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
1 sibling, 0 replies; 42+ messages in thread
From: no-reply @ 2017-02-27 19:14 UTC (permalink / raw)
To: peter.maydell; +Cc: famz, qemu-devel
Hi,
This series failed build test on s390x host. Please find the details below.
Message-id: 1488218699-31035-1-git-send-email-peter.maydell@linaro.org
Type: series
Subject: [Qemu-devel] [PULL 00/30] target-arm queue
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=/var/tmp/patchew-qemu-build
echo -n "Using CC: "
realpath $CC
test -e $BUILD && rm -rf $BUILD
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
make check -j4
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org -> patchew/1488218699-31035-1-git-send-email-peter.maydell@linaro.org
Switched to a new branch 'test'
fac2e4e hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
a19dfed hw/arm/exynos: Fix Linux kernel division by zero for PLLs
c49b077 bcm2835: add sdhost and gpio controllers
119282b bcm2835_gpio: add bcm2835 gpio controller
d874e6e hw/sd: add card-reparenting function
dcbc5d0 bcm2835_sdhost: add bcm2835 sdhost controller
1c9fe401 armv7m: Allow SHCSR writes to change pending and active bits
ec123a6 armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
de24aef armv7m: Check exception return consistency
aba0f63 armv7m: Extract "exception taken" code into functions
041a279 armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
87177eb armv7m: Simpler and faster exception start
8b1fa57 armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
76d49a0 armv7m: Escalate exceptions to HardFault if necessary
b554bb3 arm: gic: Remove references to NVIC
d9368b7 armv7m: Fix condition check for taking exceptions
c44de81 armv7m: Rewrite NVIC to not use any GIC code
aa72c10 armv7m: Implement reading and writing of PRIGROUP
086d1be armv7m: Rename nvic_state to NVICState
a5cf037 ARM i.MX timers: fix reset handling
4aaa21e hw/arm/virt: Add a user option to disallow ITS instantiation
45db604 cputlb: Don't assume do_unassigned_access() never returns
65c7e7f Add missing fp_access_check() to aarch64 crypto instructions
f1d750d hw/arm/virt: fix cpu object reference leak
816a1bb sd: sdhci: Remove block count enable check in single block transfers
3ea47a5 sd: sdhci: conditionally invoke multi block transfer
6d6aac0 sd: sdhci: check transfer mode register in multi block transfer
4365104 sd: sdhci: mask transfer mode register value
3c3f31d bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
f58b171 target-arm: Implement BCM2835 hardware RNG
=== OUTPUT BEGIN ===
=== ENV ===
XDG_SESSION_ID=38554
SHELL=/bin/sh
USER=fam
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
PATH=/usr/bin:/bin
PWD=/var/tmp/patchew-tester-tmp-_t3ms3un/src
LANG=en_US.UTF-8
HOME=/home/fam
SHLVL=2
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
xz-libs-5.2.2-2.fc24.s390x
libacl-2.2.52-11.fc24.s390x
libxshmfence-1.2-3.fc24.s390x
cdparanoia-libs-10.2-21.fc24.s390x
ustr-1.0.4-21.fc24.s390x
giflib-4.1.6-15.fc24.s390x
libusb-0.1.5-7.fc24.s390x
trousers-lib-0.3.13-6.fc24.s390x
readline-devel-6.3-8.fc24.s390x
python-srpm-macros-3-10.fc25.noarch
ncurses-base-6.0-6.20160709.fc25.noarch
gmp-6.1.1-1.fc25.s390x
chkconfig-1.8-1.fc25.s390x
libidn-1.33-1.fc25.s390x
file-5.28-4.fc25.s390x
slang-2.3.0-7.fc25.s390x
avahi-libs-0.6.32-4.fc25.s390x
libsemanage-2.5-8.fc25.s390x
perl-Unicode-Normalize-1.25-365.fc25.s390x
perl-libnet-3.10-1.fc25.noarch
perl-Thread-Queue-3.11-1.fc25.noarch
perl-podlators-4.09-1.fc25.noarch
jasper-libs-1.900.13-1.fc25.s390x
graphite2-1.3.6-1.fc25.s390x
libblkid-2.28.2-1.fc25.s390x
pkgconfig-0.29.1-1.fc25.s390x
dbus-python-1.2.4-2.fc25.s390x
alsa-lib-1.1.1-2.fc25.s390x
libgnome-keyring-3.12.0-7.fc25.s390x
yum-metadata-parser-1.1.4-17.fc25.s390x
python3-3.5.2-4.fc25.s390x
python3-slip-dbus-0.6.4-4.fc25.noarch
python2-cssselect-0.9.2-1.fc25.noarch
python-backports-1.0-8.fc25.s390x
python-magic-5.28-4.fc25.noarch
python-pycparser-2.14-7.fc25.noarch
python-fedora-0.8.0-2.fc25.noarch
createrepo_c-libs-0.10.0-6.fc25.s390x
initscripts-9.69-1.fc25.s390x
plymouth-scripts-0.9.3-0.6.20160620git0e65b86c.fc25.s390x
cronie-1.5.1-2.fc25.s390x
python2-librepo-1.7.18-3.fc25.s390x
wget-1.18-2.fc25.s390x
python3-dnf-plugins-core-0.1.21-4.fc25.noarch
at-spi2-core-2.22.0-1.fc25.s390x
libXv-1.0.11-1.fc25.s390x
dhcp-client-4.3.5-1.fc25.s390x
python2-dnf-plugins-core-0.1.21-4.fc25.noarch
parted-3.2-21.fc25.s390x
python2-ndg_httpsclient-0.4.0-4.fc25.noarch
bash-completion-2.4-1.fc25.noarch
btrfs-progs-4.6.1-1.fc25.s390x
texinfo-6.1-3.fc25.s390x
perl-Filter-1.55-366.fc25.s390x
flex-2.6.0-3.fc25.s390x
libgcc-6.3.1-1.fc25.s390x
glib2-2.50.2-1.fc25.s390x
dbus-libs-1.11.8-1.fc25.s390x
libgomp-6.3.1-1.fc25.s390x
colord-libs-1.3.4-1.fc25.s390x
perl-Encode-2.88-5.fc25.s390x
gstreamer1-1.10.2-1.fc25.s390x
cracklib-2.9.6-4.fc25.s390x
rpm-build-libs-4.13.0-6.fc25.s390x
libobjc-6.3.1-1.fc25.s390x
pcre-devel-8.40-1.fc25.s390x
mariadb-config-10.1.20-1.fc25.s390x
gcc-6.3.1-1.fc25.s390x
mesa-libGL-13.0.3-1.fc25.s390x
python3-dnf-plugin-system-upgrade-0.7.1-4.fc25.noarch
bind-libs-9.10.4-4.P5.fc25.s390x
python-osbs-client-0.33-3.fc25.noarch
NetworkManager-1.4.4-3.fc25.s390x
audit-2.7.1-1.fc25.s390x
glibc-static-2.24-4.fc25.s390x
perl-Pod-Simple-3.35-1.fc25.noarch
gdb-7.12-36.fc25.s390x
python2-simplejson-3.10.0-1.fc25.s390x
python3-sssdconfig-1.14.2-2.fc25.noarch
texlive-lib-2016-30.20160520.fc25.s390x
boost-random-1.60.0-10.fc25.s390x
brltty-5.4-2.fc25.s390x
libref_array-0.1.5-29.fc25.s390x
librados2-10.2.4-2.fc25.s390x
gnutls-dane-3.5.8-1.fc25.s390x
systemtap-client-3.1-0.20160725git91bfb36.fc25.s390x
libXrender-devel-0.9.10-1.fc25.s390x
libXi-devel-1.7.8-2.fc25.s390x
texlive-pdftex-doc-svn41149-30.fc25.noarch
tcp_wrappers-7.6-83.fc25.s390x
javapackages-tools-4.7.0-6.1.fc25.noarch
texlive-kpathsea-bin-svn40473-30.20160520.fc25.s390x
texlive-url-svn32528.3.4-30.fc25.noarch
texlive-latex-fonts-svn28888.0-30.fc25.noarch
texlive-mptopdf-bin-svn18674.0-30.20160520.fc25.noarch
texlive-underscore-svn18261.0-30.fc25.noarch
texlive-subfig-svn15878.1.3-30.fc25.noarch
texlive-dvipdfmx-def-svn40328-30.fc25.noarch
texlive-plain-svn40274-30.fc25.noarch
texlive-texlive-scripts-svn41433-30.fc25.noarch
texlive-fancyref-svn15878.0.9c-30.fc25.noarch
texlive-csquotes-svn39538-30.fc25.noarch
texlive-pxfonts-svn15878.0-30.fc25.noarch
texlive-cite-svn36428.5.5-30.fc25.noarch
texlive-section-svn20180.0-30.fc25.noarch
texlive-pslatex-svn16416.0-30.fc25.noarch
texlive-tex-gyre-math-svn41264-30.fc25.noarch
texlive-knuth-local-svn38627-30.fc25.noarch
texlive-type1cm-svn21820.0-30.fc25.noarch
texlive-finstrut-svn21719.0.5-30.fc25.noarch
texlive-ucharcat-svn38907-30.fc25.noarch
texlive-environ-svn33821.0.3-30.fc25.noarch
texlive-eso-pic-svn37925.2.0g-30.fc25.noarch
texlive-filehook-svn24280.0.5d-30.fc25.noarch
texlive-luatexbase-svn38550-30.fc25.noarch
texlive-pst-text-svn15878.1.00-30.fc25.noarch
texlive-pst-tree-svn24142.1.12-30.fc25.noarch
texlive-latex-bin-bin-svn14050.0-30.20160520.fc25.noarch
texlive-metalogo-svn18611.0.12-30.fc25.noarch
texlive-cm-super-svn15878.0-30.fc25.noarch
texlive-xetex-svn41438-30.fc25.noarch
keyutils-1.5.9-8.fc24.s390x
libcephfs_jni1-10.2.4-2.fc25.s390x
libcom_err-devel-1.43.3-1.fc25.s390x
mesa-libGLES-devel-13.0.3-1.fc25.s390x
graphite2-devel-1.3.6-1.fc25.s390x
nettle-devel-3.3-1.fc25.s390x
lzo-minilzo-2.08-8.fc24.s390x
bzip2-devel-1.0.6-21.fc25.s390x
libusbx-devel-1.0.21-1.fc25.s390x
SDL2-devel-2.0.5-2.fc25.s390x
virglrenderer-devel-0.5.0-1.20160411git61846f92f.fc25.s390x
glib2-static-2.50.2-1.fc25.s390x
mesa-libgbm-devel-13.0.3-1.fc25.s390x
acpica-tools-20160831-1.fc25.s390x
gdk-pixbuf2-2.36.4-1.fc25.s390x
nss-softokn-3.28.1-1.0.fc25.s390x
python3-dnf-1.1.10-5.fc25.noarch
python-gluster-3.9.1-1.fc25.noarch
perl-IO-1.36-382.fc25.s390x
glusterfs-devel-3.9.1-1.fc25.s390x
gtk3-3.22.7-1.fc25.s390x
vim-enhanced-8.0.206-1.fc25.s390x
nss-tools-3.28.1-1.3.fc25.s390x
libmicrohttpd-0.9.52-1.fc25.s390x
gpg-pubkey-a29cb19c-53bcbba6
libaio-0.3.110-6.fc24.s390x
m4-1.4.17-9.fc24.s390x
libfontenc-1.1.3-3.fc24.s390x
lzo-2.08-8.fc24.s390x
isl-0.14-5.fc24.s390x
libXau-1.0.8-6.fc24.s390x
liblockfile-1.09-4.fc24.s390x
linux-atm-libs-2.5.1-14.fc24.s390x
sg3_utils-1.41-3.fc24.s390x
libXext-1.3.3-4.fc24.s390x
libXinerama-1.1.3-6.fc24.s390x
libXxf86vm-1.1.4-3.fc24.s390x
libXft-2.3.2-4.fc24.s390x
ykpers-1.17.3-2.fc24.s390x
bison-3.0.4-4.fc24.s390x
perl-srpm-macros-1-20.fc25.noarch
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ipcalc-0.1.8-1.fc25.s390x
perl-Pod-Perldoc-3.27-1.fc25.noarch
libteam-1.26-1.fc25.s390x
gmp-c++-6.1.1-1.fc25.s390x
fontconfig-2.12.1-1.fc25.s390x
enchant-1.6.0-14.fc25.s390x
json-glib-1.2.2-1.fc25.s390x
pyliblzma-0.5.3-16.fc25.s390x
libsepol-devel-2.5-10.fc25.s390x
python3-libs-3.5.2-4.fc25.s390x
python3-ordered-set-2.0.0-4.fc25.noarch
python3-rpmconf-1.0.18-2.fc25.noarch
python-ipaddress-1.0.16-3.fc25.noarch
python2-kerberos-1.2.5-1.fc25.s390x
python2-pysocks-1.5.6-5.fc25.noarch
fipscheck-lib-1.4.1-11.fc25.s390x
libatomic_ops-7.4.4-1.fc25.s390x
net-snmp-agent-libs-5.7.3-13.fc25.s390x
util-linux-2.28.2-1.fc25.s390x
dracut-044-78.fc25.s390x
python2-pygpgme-0.3-18.fc25.s390x
libsoup-2.56.0-2.fc25.s390x
orc-0.4.26-1.fc25.s390x
yum-utils-1.1.31-511.fc25.noarch
libXrender-0.9.10-1.fc25.s390x
libXrandr-1.5.1-1.fc25.s390x
go-srpm-macros-2-7.fc25.noarch
gnupg2-smime-2.1.13-2.fc25.s390x
guile-devel-2.0.13-1.fc25.s390x
uboot-tools-2016.09.01-2.fc25.s390x
pykickstart-2.32-1.fc25.noarch
python-bunch-1.0.1-9.fc25.noarch
perl-generators-1.10-1.fc25.noarch
perl-Mozilla-CA-20160104-3.fc25.noarch
glibc-all-langpacks-2.24-4.fc25.s390x
bzip2-libs-1.0.6-21.fc25.s390x
libpng-1.6.27-1.fc25.s390x
libtiff-4.0.7-1.fc25.s390x
desktop-file-utils-0.23-2.fc25.s390x
python2-cccolutils-1.4-1.fc25.s390x
libcurl-7.51.0-4.fc25.s390x
rpm-plugin-systemd-inhibit-4.13.0-6.fc25.s390x
cups-libs-2.2.0-5.fc25.s390x
python2-lxml-3.7.2-1.fc25.s390x
redhat-rpm-config-45-1.fc25.noarch
elfutils-libs-0.168-1.fc25.s390x
device-mapper-event-libs-1.02.136-3.fc25.s390x
lvm2-libs-2.02.167-3.fc25.s390x
elfutils-0.168-1.fc25.s390x
openssh-7.4p1-1.fc25.s390x
python2-gitdb-2.0.0-1.fc25.noarch
openssh-server-7.4p1-1.fc25.s390x
gcc-gfortran-6.3.1-1.fc25.s390x
rpm-devel-4.13.0-6.fc25.s390x
libselinux-python-2.5-13.fc25.s390x
openjpeg2-2.1.2-3.fc25.s390x
js-jquery-2.2.4-1.fc25.noarch
boost-thread-1.60.0-10.fc25.s390x
json-c-0.12-7.fc24.s390x
ghostscript-x11-9.20-5.fc25.s390x
libdrm-devel-2.4.74-1.fc25.s390x
libuuid-devel-2.28.2-1.fc25.s390x
librbd-devel-10.2.4-2.fc25.s390x
libXcursor-devel-1.1.14-6.fc24.s390x
python3-beautifulsoup4-4.5.3-1.fc25.noarch
texlive-kpathsea-svn41139-30.fc25.noarch
texlive-amsmath-svn41561-30.fc25.noarch
texlive-thumbpdf-svn34621.3.16-30.fc25.noarch
texlive-multido-svn18302.1.42-30.fc25.noarch
texlive-float-svn15878.1.3d-30.fc25.noarch
texlive-psnfss-svn33946.9.2a-30.fc25.noarch
texlive-wasy-svn35831.0-30.fc25.noarch
texlive-makeindex-svn40768-30.fc25.noarch
texlive-pdftex-svn41149-30.fc25.noarch
texlive-enumitem-svn24146.3.5.2-30.fc25.noarch
texlive-microtype-svn41127-30.fc25.noarch
texlive-helvetic-svn31835.0-30.fc25.noarch
texlive-times-svn35058.0-30.fc25.noarch
texlive-mdwtools-svn15878.1.05.4-30.fc25.noarch
texlive-babel-english-svn30264.3.3p-30.fc25.noarch
texlive-cmextra-svn32831.0-30.fc25.noarch
texlive-enctex-svn34957.0-30.fc25.noarch
texlive-texlive-docindex-svn41430-30.fc25.noarch
texlive-ifetex-svn24853.1.2-30.fc25.noarch
texlive-mparhack-svn15878.1.4-30.fc25.noarch
texlive-paralist-svn39247-30.fc25.noarch
texlive-algorithms-svn38085.0.1-30.fc25.noarch
texlive-geometry-svn19716.5.6-30.fc25.noarch
texlive-fontspec-svn41262-30.fc25.noarch
texlive-oberdiek-svn41346-30.fc25.noarch
texlive-pst-eps-svn15878.1.0-30.fc25.noarch
texlive-pstricks-svn41321-30.fc25.noarch
texlive-pst-blur-svn15878.2.0-30.fc25.noarch
texlive-jknapltx-svn19440.0-30.fc25.noarch
texlive-breqn-svn38099.0.98d-30.fc25.noarch
texlive-collection-basic-svn41149-30.20160520.fc25.noarch
latex2html-2012-7.fc24.noarch
lksctp-tools-1.0.16-5.fc24.s390x
vte291-0.46.1-1.fc25.s390x
openssl-devel-1.0.2j-3.fc25.s390x
at-spi2-core-devel-2.22.0-1.fc25.s390x
libfdt-1.4.2-1.fc25.s390x
libXft-devel-2.3.2-4.fc24.s390x
libattr-devel-2.4.47-16.fc24.s390x
libiscsi-devel-1.15.0-2.fc24.s390x
gettext-0.19.8.1-3.fc25.s390x
libjpeg-turbo-devel-1.5.1-0.fc25.s390x
glusterfs-libs-3.9.1-1.fc25.s390x
glusterfs-api-3.9.1-1.fc25.s390x
hawkey-0.6.3-6.1.fc25.s390x
nss-softokn-devel-3.28.1-1.0.fc25.s390x
glusterfs-cli-3.9.1-1.fc25.s390x
vim-common-8.0.206-1.fc25.s390x
libX11-1.6.4-4.fc25.s390x
pulseaudio-libs-devel-10.0-2.fc25.s390x
dnf-yum-1.1.10-5.fc25.noarch
tzdata-java-2016j-2.fc25.noarch
ccache-3.3.3-1.fc25.s390x
gpg-pubkey-8e1431d5-53bcbac7
zlib-1.2.8-10.fc24.s390x
sed-4.2.2-15.fc24.s390x
p11-kit-0.23.2-2.fc24.s390x
psmisc-22.21-8.fc24.s390x
gpm-libs-1.20.7-9.fc24.s390x
zip-3.0-16.fc24.s390x
hostname-3.15-7.fc24.s390x
libyubikey-1.13-2.fc24.s390x
sg3_utils-libs-1.41-3.fc24.s390x
polkit-pkla-compat-0.1-7.fc24.s390x
passwd-0.79-8.fc24.s390x
trousers-0.3.13-6.fc24.s390x
grubby-8.40-3.fc24.s390x
rootfiles-8.1-19.fc24.noarch
python-rpm-macros-3-10.fc25.noarch
info-6.1-3.fc25.s390x
libuuid-2.28.2-1.fc25.s390x
iptables-libs-1.6.0-2.fc25.s390x
nettle-3.3-1.fc25.s390x
jansson-2.9-1.fc25.s390x
libksba-1.3.5-1.fc25.s390x
perl-Text-ParseWords-3.30-365.fc25.noarch
perl-PathTools-3.63-366.fc25.s390x
perl-File-Temp-0.23.04-365.fc25.noarch
fuse-libs-2.9.7-1.fc25.s390x
perl-Pod-Escapes-1.07-365.fc25.noarch
perl-Term-ANSIColor-4.05-2.fc25.noarch
perl-URI-1.71-5.fc25.noarch
libXfont-1.5.2-1.fc25.s390x
crypto-policies-20160921-2.git75b9b04.fc25.noarch
python-six-1.10.0-3.fc25.noarch
dbus-glib-0.108-1.fc25.s390x
gobject-introspection-1.50.0-1.fc25.s390x
libpwquality-1.3.0-6.fc25.s390x
python-gobject-base-3.22.0-1.fc25.s390x
python-html5lib-0.999-9.fc25.noarch
python3-dbus-1.2.4-2.fc25.s390x
python3-chardet-2.3.0-1.fc25.noarch
python3-urllib3-1.15.1-3.fc25.noarch
python-offtrac-0.1.0-7.fc25.noarch
python2-cryptography-1.5.3-3.fc25.s390x
python2-requests-kerberos-0.10.0-2.fc25.noarch
libserf-1.3.9-1.fc25.s390x
libdatrie-0.2.9-3.fc25.s390x
s390utils-base-1.36.0-1.fc25.s390x
kpartx-0.4.9-83.fc25.s390x
s390utils-cpuplugd-1.36.0-1.fc25.s390x
rpmconf-1.0.18-2.fc25.noarch
s390utils-osasnmpd-1.36.0-1.fc25.s390x
python-dnf-plugins-extras-common-0.0.12-4.fc25.noarch
pango-1.40.3-1.fc25.s390x
fpc-srpm-macros-1.0-1.fc25.noarch
kernel-core-4.8.8-300.fc25.s390x
fedora-upgrade-25.2-1.fc25.noarch
net-tools-2.0-0.38.20160329git.fc25.s390x
libuser-0.62-4.fc25.s390x
screen-4.4.0-4.fc25.s390x
man-db-2.7.5-3.fc25.s390x
sqlite-3.14.2-1.fc25.s390x
python-systemd-doc-232-1.fc25.s390x
pcre-8.40-1.fc25.s390x
libdb-5.3.28-16.fc25.s390x
lz4-1.7.5-1.fc25.s390x
tar-1.29-3.fc25.s390x
emacs-common-25.1-3.fc25.s390x
perl-threads-shared-1.54-1.fc25.s390x
unzip-6.0-31.fc25.s390x
mesa-libglapi-13.0.3-1.fc25.s390x
rpm-libs-4.13.0-6.fc25.s390x
selinux-policy-3.13.1-225.6.fc25.noarch
pcre-utf16-8.40-1.fc25.s390x
bodhi-client-0.9.12.2-6.fc25.noarch
rpmlint-1.9-5.fc25.noarch
glibc-headers-2.24-4.fc25.s390x
dbus-1.11.8-1.fc25.s390x
kernel-core-4.9.3-200.fc25.s390x
cairo-1.14.8-1.fc25.s390x
ca-certificates-2017.2.11-1.0.fc25.noarch
openssh-clients-7.4p1-1.fc25.s390x
python2-GitPython-2.1.1-2.fc25.noarch
mariadb-libs-10.1.20-1.fc25.s390x
NetworkManager-glib-1.4.4-3.fc25.s390x
gcc-go-6.3.1-1.fc25.s390x
cracklib-dicts-2.9.6-4.fc25.s390x
iproute-tc-4.6.0-6.fc25.s390x
libselinux-python3-2.5-13.fc25.s390x
strace-4.15-1.fc25.s390x
python2-enchant-1.6.8-1.fc25.noarch
boost-iostreams-1.60.0-10.fc25.s390x
bluez-libs-5.43-1.fc25.s390x
ghostscript-9.20-5.fc25.s390x
userspace-rcu-0.9.2-2.fc25.s390x
mesa-libwayland-egl-devel-13.0.3-1.fc25.s390x
libXext-devel-1.3.3-4.fc24.s390x
libXrandr-devel-1.5.1-1.fc25.s390x
perl-XML-XPath-1.39-1.fc25.noarch
python3-lxml-3.7.2-1.fc25.s390x
texlive-texlive.infra-bin-svn40312-30.20160520.fc25.s390x
texlive-ifxetex-svn19685.0.5-30.fc25.noarch
texlive-thumbpdf-bin-svn6898.0-30.20160520.fc25.noarch
texlive-babelbib-svn25245.1.31-30.fc25.noarch
texlive-index-svn24099.4.1beta-30.fc25.noarch
texlive-caption-svn41409-30.fc25.noarch
texlive-bibtex-bin-svn40473-30.20160520.fc25.s390x
texlive-mfware-bin-svn40473-30.20160520.fc25.s390x
texlive-texconfig-svn40768-30.fc25.noarch
texlive-footmisc-svn23330.5.5b-30.fc25.noarch
texlive-psfrag-svn15878.3.04-30.fc25.noarch
texlive-eurosym-svn17265.1.4_subrfix-30.fc25.noarch
texlive-symbol-svn31835.0-30.fc25.noarch
texlive-euenc-svn19795.0.1h-30.fc25.noarch
texlive-textcase-svn15878.0-30.fc25.noarch
texlive-charter-svn15878.0-30.fc25.noarch
texlive-wasysym-svn15878.2.0-30.fc25.noarch
texlive-mflogo-svn38628-30.fc25.noarch
texlive-soul-svn15878.2.4-30.fc25.noarch
texlive-marginnote-svn41382-30.fc25.noarch
texlive-filecontents-svn24250.1.3-30.fc25.noarch
texlive-tipa-svn29349.1.3-30.fc25.noarch
texlive-xcolor-svn41044-30.fc25.noarch
texlive-breakurl-svn29901.1.40-30.fc25.noarch
texlive-attachfile-svn38830-30.fc25.noarch
texlive-pst-coil-svn37377.1.07-30.fc25.noarch
texlive-auto-pst-pdf-svn23723.0.6-30.fc25.noarch
texlive-ctable-svn38672-30.fc25.noarch
texlive-extsizes-svn17263.1.4a-30.fc25.noarch
texlive-beamer-svn36461.3.36-30.fc25.noarch
texlive-dvipdfmx-bin-svn40273-30.20160520.fc25.s390x
netpbm-progs-10.76.00-2.fc25.s390x
vte-profile-0.46.1-1.fc25.s390x
krb5-devel-1.14.4-4.fc25.s390x
dbus-devel-1.11.8-1.fc25.s390x
sqlite-devel-3.14.2-1.fc25.s390x
libiscsi-1.15.0-2.fc24.s390x
fontconfig-devel-2.12.1-1.fc25.s390x
libfdt-devel-1.4.2-1.fc25.s390x
ceph-devel-compat-10.2.4-2.fc25.s390x
zlib-static-1.2.8-10.fc24.s390x
chrpath-0.16-3.fc24.s390x
python-2.7.13-1.fc25.s390x
nss-3.28.1-1.3.fc25.s390x
python2-hawkey-0.6.3-6.1.fc25.s390x
gdk-pixbuf2-modules-2.36.4-1.fc25.s390x
perl-Git-2.9.3-2.fc25.noarch
kernel-core-4.9.5-200.fc25.s390x
publicsuffix-list-dafsa-20170116-1.fc25.noarch
perl-SelfLoader-1.23-382.fc25.noarch
perl-open-1.10-382.fc25.noarch
gpgme-1.8.0-8.fc25.s390x
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-_t3ms3un/src/install
BIOS directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/qemu
binary directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/bin
library directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib
module directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/include
config directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-_t3ms3un/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-_t3ms3un/src
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -D_GNU_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/cacard -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/libusb-1.0
LDFLAGS -Wl,--warn-common -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user
tcg debug enabled no
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
pixman system
SDL support yes (2.0.5)
GTK support yes (3.22.7)
GTK GL support yes
VTE support yes (0.46.1)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
RDMA support no
TCG interpreter no
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
libcap-ng support yes
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support no
coroutine backend ucontext
coroutine pool yes
debug stack usage no
GlusterFS support yes
Archipelago support no
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
QOM debugging yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
GEN aarch64-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak.tmp
GEN alpha-softmmu/config-devices.mak
GEN lm32-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN lm32-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak.tmp
GEN i386-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN mips64el-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN microblaze-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak.tmp
GEN mipsel-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak.tmp
GEN moxie-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN nios2-softmmu/config-devices.mak
GEN ppc-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN s390x-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak
GEN unicore32-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak
GEN x86_64-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak
GEN xtensa-softmmu/config-devices.mak
GEN alpha-linux-user/config-devices.mak.tmp
GEN armeb-linux-user/config-devices.mak.tmp
GEN xtensaeb-softmmu/config-devices.mak
GEN arm-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak
GEN armeb-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak.tmp
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak.tmp
GEN microblaze-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips64-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak.tmp
GEN mips-linux-user/config-devices.mak
GEN mipsn32el-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak.tmp
GEN sh4-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak
GEN config-host.h
GEN x86_64-linux-user/config-devices.mak
GEN qemu-options.def
GEN tilegx-linux-user/config-devices.mak
GEN qmp-commands.h
GEN qapi-types.h
GEN qapi-visit.h
GEN qapi-event.h
GEN qmp-introspect.h
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN module_block.h
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qapi-event.h
GEN tests/test-qmp-introspect.h
GEN trace-root.h
GEN util/trace.h
GEN crypto/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN backends/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/i386/trace.h
GEN hw/mem/trace.h
GEN hw/9pfs/trace.h
GEN hw/i386/xen/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/xen/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN target/arm/trace.h
GEN net/trace.h
GEN target/sparc/trace.h
GEN target/i386/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN config-all-devices.mak
CC tests/qemu-iotests/socket_scm_helper.o
GEN version.texi
GEN qemu-img-cmds.texi
GEN qemu-options.texi
GEN qemu-monitor.texi
GEN qemu-monitor-info.texi
GEN qemu-img.1
GEN qemu-nbd.8
GEN qemu-ga.8
GEN qemu-qapi.texi
GEN qemu-ga-qapi.texi
GEN fsdev/virtfs-proxy-helper.1
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-visit.c
GEN qga/qapi-generated/qga-qmp-marshal.c
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN backends/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/scsi/trace.c
GEN hw/usb/trace.c
GEN hw/nvram/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/s390x/trace.c
GEN hw/acpi/trace.c
GEN hw/vfio/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/xen/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/sparc/trace.c
GEN target/i386/trace.c
GEN target/s390x/trace.c
GEN target/ppc/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN qmp-introspect.c
GEN qapi-types.c
GEN qapi-visit.c
GEN qapi-event.c
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/string-input-visitor.o
CC qapi/qmp-dispatch.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qint.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qfloat.o
CC qobject/qbool.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/main-loop.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/host-utils.o
CC util/module.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/qemu-option.o
CC util/notify.o
CC util/qemu-progress.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/timed-average.o
CC util/buffer.o
CC util/base64.o
CC util/log.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/cpu-get-clock.o
CC stubs/clock-warp.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_pc_dimm_device_list.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC qemu-io-cmds.o
CC blockjob.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qed.o
CC block/qed-gencb.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/qapi.o
CC block/snapshot.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/throttle-groups.o
CC block/nbd.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/crypto.o
CC nbd/server.o
CC nbd/client.o
CC nbd/common.o
CC block/iscsi.o
CC block/nfs.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/cipher.o
CC crypto/desrfb.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/random-gnutls.o
CC crypto/secret.o
CC crypto/pbkdf.o
CC crypto/ivgen.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-tls.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/task.o
CC qom/object.o
CC qom/container.o
CC qom/qom-qobject.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC iothread.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC page_cache.o
CC accel.o
CC bt-host.o
CC bt-vhci.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC device_tree.o
GEN qmp-marshal.c
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/mixeng.o
CC audio/wavaudio.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/msmouse.o
CC backends/rng-random.o
CC backends/wctablet.o
CC backends/testdev.o
CC backends/baum.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC block/stream.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/cofs.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/cs4231.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/milkymist-ac97.o
CC hw/block/block.o
CC hw/block/cdrom.o
CC hw/block/fdc.o
CC hw/block/hd-geometry.o
CC hw/block/nand.o
CC hw/block/m25p80.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/xilinx_uartlite.o
CC hw/char/virtio-console.o
CC hw/char/cadence_uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/dma/puv3_dma.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/dma/sun4m_iommu.o
CC hw/gpio/pl061.o
CC hw/gpio/max7310.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/input/adb.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/stellaris_input.o
CC hw/input/ps2.o
CC hw/input/tsc2005.o
CC hw/input/vmmouse.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/imx_avic.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/mem/pc-dimm.o
CC hw/isa/vt82c686.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pci-testdev.o
CC hw/misc/pc-testdev.o
CC hw/misc/unimp.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/mac_dbdma.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/dec.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/apb.o
CC hw/pci-host/versatile.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/smbios/smbios.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/tpm/tpm_tis.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-network.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-legacy.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/fd.o
CC migration/socket.o
CC migration/exec.o
CC migration/tls.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/qemu-file.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/postcopy-ram.o
CC migration/qjson.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/tap.o
CC net/vhost-user.o
CC net/tap-linux.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-events.o
CC replay/replay-internal.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-keymap.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/sdl2-input.o
CC ui/sdl2.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/x_keymap.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
CC ui/gtk.o
CC ui/shader.o
VERT ui/shader/texture-blit-vert.h
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/gtk-gl-area.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
CCAS s390-ccw/start.o
LINK tests/qemu-iotests/socket_scm_helper
GEN qemu-doc.html
CC s390-ccw/main.o
GEN qemu-doc.txt
GEN qemu.1
CC s390-ccw/bootmap.o
CC s390-ccw/sclp-ascii.o
CC s390-ccw/virtio.o
GEN docs/qemu-qmp-ref.html
CC s390-ccw/virtio-scsi.o
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
GEN docs/qemu-qmp-ref.txt
GEN docs/qemu-qmp-ref.7
GEN docs/qemu-ga-ref.html
GEN docs/qemu-ga-ref.txt
GEN docs/qemu-ga-ref.7
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
CC qmp-introspect.o
CC qapi-types.o
CC qapi-visit.o
CC qapi-event.o
AR libqemustub.a
CC qemu-img.o
CC qmp-marshal.o
CC ui/console-gl.o
CC trace-root.o
CC util/trace.o
CC crypto/trace.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC backends/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/intc/trace.o
CC hw/char/trace.o
CC hw/net/trace.o
CC hw/virtio/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/usb/trace.o
CC hw/scsi/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/dma/trace.o
CC hw/sparc/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/pci/trace.o
CC hw/s390x/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC hw/xen/trace.o
CC ui/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/sparc/trace.o
CC target/s390x/trace.o
CC target/ppc/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
AR libqemuutil.a
LINK qemu-ga
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK qemu-bridge-helper
GEN alpha-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
CC cris-softmmu/exec.o
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
GEN arm-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands.h
GEN arm-softmmu/hmp-commands-info.h
CC alpha-softmmu/exec.o
GEN aarch64-softmmu/hmp-commands-info.h
GEN arm-softmmu/config-target.h
GEN aarch64-softmmu/config-target.h
CC arm-softmmu/exec.o
CC aarch64-softmmu/exec.o
CC cris-softmmu/translate-all.o
CC alpha-softmmu/translate-all.o
CC aarch64-softmmu/translate-all.o
CC cris-softmmu/cpu-exec.o
CC arm-softmmu/translate-all.o
CC alpha-softmmu/cpu-exec.o
CC cris-softmmu/translate-common.o
CC aarch64-softmmu/cpu-exec.o
CC alpha-softmmu/translate-common.o
CC cris-softmmu/cpu-exec-common.o
CC arm-softmmu/cpu-exec.o
CC alpha-softmmu/cpu-exec-common.o
CC cris-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg.o
CC aarch64-softmmu/translate-common.o
CC arm-softmmu/translate-common.o
CC aarch64-softmmu/cpu-exec-common.o
CC arm-softmmu/cpu-exec-common.o
CC aarch64-softmmu/tcg/tcg.o
CC arm-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC cris-softmmu/tcg/optimize.o
CC alpha-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/tcg-common.o
CC cris-softmmu/fpu/softfloat.o
CC alpha-softmmu/tcg/tcg-common.o
CC alpha-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/optimize.o
CC aarch64-softmmu/tcg/optimize.o
CC arm-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-common.o
CC arm-softmmu/fpu/softfloat.o
CC aarch64-softmmu/fpu/softfloat.o
CC cris-softmmu/disas.o
CC alpha-softmmu/disas.o
CC cris-softmmu/tcg-runtime.o
CC alpha-softmmu/tcg-runtime.o
CC alpha-softmmu/hax-stub.o
CC cris-softmmu/hax-stub.o
CC alpha-softmmu/kvm-stub.o
CC cris-softmmu/kvm-stub.o
CC alpha-softmmu/arch_init.o
CC cris-softmmu/arch_init.o
CC arm-softmmu/disas.o
CC cris-softmmu/cpus.o
CC alpha-softmmu/cpus.o
CC arm-softmmu/tcg-runtime.o
CC cris-softmmu/monitor.o
GEN arm-softmmu/gdbstub-xml.c
CC alpha-softmmu/monitor.o
CC aarch64-softmmu/disas.o
CC aarch64-softmmu/tcg-runtime.o
CC arm-softmmu/hax-stub.o
GEN aarch64-softmmu/gdbstub-xml.c
CC arm-softmmu/kvm-stub.o
CC cris-softmmu/gdbstub.o
CC alpha-softmmu/gdbstub.o
CC arm-softmmu/arch_init.o
CC cris-softmmu/balloon.o
CC alpha-softmmu/balloon.o
CC arm-softmmu/cpus.o
CC cris-softmmu/ioport.o
CC aarch64-softmmu/hax-stub.o
CC alpha-softmmu/ioport.o
CC cris-softmmu/numa.o
CC aarch64-softmmu/kvm-stub.o
CC arm-softmmu/monitor.o
CC alpha-softmmu/numa.o
CC aarch64-softmmu/arch_init.o
CC cris-softmmu/qtest.o
CC aarch64-softmmu/cpus.o
CC alpha-softmmu/qtest.o
CC cris-softmmu/bootdevice.o
CC cris-softmmu/memory.o
CC alpha-softmmu/bootdevice.o
CC aarch64-softmmu/monitor.o
CC alpha-softmmu/memory.o
CC arm-softmmu/gdbstub.o
CC cris-softmmu/cputlb.o
CC arm-softmmu/balloon.o
CC alpha-softmmu/cputlb.o
CC arm-softmmu/ioport.o
CC aarch64-softmmu/gdbstub.o
CC arm-softmmu/numa.o
CC cris-softmmu/memory_mapping.o
CC cris-softmmu/dump.o
CC aarch64-softmmu/balloon.o
CC arm-softmmu/qtest.o
CC aarch64-softmmu/ioport.o
CC arm-softmmu/bootdevice.o
CC alpha-softmmu/memory_mapping.o
CC cris-softmmu/migration/ram.o
CC arm-softmmu/memory.o
CC alpha-softmmu/dump.o
CC aarch64-softmmu/numa.o
CC cris-softmmu/migration/savevm.o
CC aarch64-softmmu/qtest.o
CC alpha-softmmu/migration/ram.o
CC arm-softmmu/cputlb.o
CC aarch64-softmmu/bootdevice.o
CC cris-softmmu/xen-common-stub.o
CC aarch64-softmmu/memory.o
CC cris-softmmu/xen-hvm-stub.o
CC alpha-softmmu/migration/savevm.o
CC cris-softmmu/hw/core/nmi.o
CC cris-softmmu/hw/core/generic-loader.o
CC cris-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/cputlb.o
CC arm-softmmu/memory_mapping.o
CC cris-softmmu/hw/cpu/core.o
CC arm-softmmu/dump.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC alpha-softmmu/xen-common-stub.o
CC cris-softmmu/hw/net/vhost_net.o
CC alpha-softmmu/xen-hvm-stub.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC cris-softmmu/hw/vfio/common.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/migration/ram.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/memory_mapping.o
CC cris-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/dump.o
CC cris-softmmu/hw/vfio/spapr.o
CC arm-softmmu/migration/savevm.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC cris-softmmu/hw/cris/boot.o
CC aarch64-softmmu/migration/ram.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC alpha-softmmu/hw/core/nmi.o
CC arm-softmmu/xen-common-stub.o
CC cris-softmmu/target/cris/translate.o
CC alpha-softmmu/hw/core/generic-loader.o
CC arm-softmmu/xen-hvm-stub.o
CC alpha-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/migration/savevm.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC alpha-softmmu/hw/cpu/core.o
CC arm-softmmu/hw/block/virtio-blk.o
CC alpha-softmmu/hw/display/vga.o
CC aarch64-softmmu/xen-common-stub.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/xen-hvm-stub.o
CC cris-softmmu/target/cris/op_helper.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/char/omap_uart.o
CC arm-softmmu/hw/char/digic-uart.o
CC cris-softmmu/target/cris/helper.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC cris-softmmu/target/cris/cpu.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC cris-softmmu/target/cris/gdbstub.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC cris-softmmu/target/cris/mmu.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/target/cris/machine.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/core/nmi.o
CC aarch64-softmmu/hw/char/omap_uart.o
GEN trace/generated-helpers.c
CC cris-softmmu/trace/control-target.o
CC arm-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/misc/edu.o
CC arm-softmmu/hw/core/null-machine.o
CC cris-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/net/virtio-net.o
LINK cris-softmmu/qemu-system-cris
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC arm-softmmu/hw/cpu/a9mpcore.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC alpha-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/cpu/core.o
CC aarch64-softmmu/hw/core/nmi.o
CC arm-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC arm-softmmu/hw/display/omap_lcdc.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC aarch64-softmmu/hw/cpu/core.o
CC alpha-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC arm-softmmu/hw/display/bcm2835_fb.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
CC aarch64-softmmu/hw/display/omap_lcdc.o
GEN i386-softmmu/config-target.h
CC i386-softmmu/exec.o
CC alpha-softmmu/hw/vfio/pci.o
CC arm-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC i386-softmmu/translate-all.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC alpha-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/display/vga.o
CC i386-softmmu/cpu-exec.o
CC alpha-softmmu/hw/vfio/spapr.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
CC alpha-softmmu/hw/virtio/virtio.o
CC i386-softmmu/translate-common.o
CC arm-softmmu/hw/dma/omap_dma.o
CC i386-softmmu/cpu-exec-common.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/tcg/tcg.o
CC arm-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/gpio/omap_gpio.o
CC aarch64-softmmu/hw/display/dpcd.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC alpha-softmmu/hw/alpha/dp264.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC alpha-softmmu/hw/alpha/pci.o
CC arm-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/target/alpha/machine.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC alpha-softmmu/target/alpha/translate.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC i386-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/target/alpha/helper.o
CC arm-softmmu/hw/intc/omap_intc.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/target/alpha/cpu.o
CC i386-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/target/alpha/int_helper.o
CC i386-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC alpha-softmmu/target/alpha/gdbstub.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC arm-softmmu/hw/misc/ivshmem.o
CC i386-softmmu/disas.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC alpha-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC alpha-softmmu/trace/generated-helpers.o
CC i386-softmmu/tcg-runtime.o
CC arm-softmmu/hw/misc/arm_sysctl.o
LINK alpha-softmmu/qemu-system-alpha
CC i386-softmmu/hax-stub.o
CC arm-softmmu/hw/misc/cbus.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC i386-softmmu/kvm-stub.o
CC i386-softmmu/arch_init.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC i386-softmmu/cpus.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC i386-softmmu/monitor.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC arm-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_src.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC i386-softmmu/gdbstub.o
CC arm-softmmu/hw/misc/omap_clk.o
CC aarch64-softmmu/hw/misc/ivshmem.o
GEN lm32-softmmu/hmp-commands.h
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC arm-softmmu/hw/misc/omap_gpmc.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC lm32-softmmu/exec.o
CC i386-softmmu/balloon.o
CC arm-softmmu/hw/misc/omap_l4.o
CC aarch64-softmmu/hw/misc/cbus.o
CC i386-softmmu/ioport.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC i386-softmmu/numa.o
CC arm-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
CC i386-softmmu/qtest.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC arm-softmmu/hw/misc/bcm2835_property.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC lm32-softmmu/translate-all.o
CC i386-softmmu/bootdevice.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC i386-softmmu/memory.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC lm32-softmmu/cpu-exec.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC lm32-softmmu/translate-common.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC i386-softmmu/cputlb.o
CC arm-softmmu/hw/misc/edu.o
CC lm32-softmmu/cpu-exec-common.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC lm32-softmmu/tcg/tcg.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC i386-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC arm-softmmu/hw/net/virtio-net.o
CC i386-softmmu/dump.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC lm32-softmmu/tcg/tcg-op.o
CC i386-softmmu/migration/ram.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC arm-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/migration/savevm.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC aarch64-softmmu/hw/misc/edu.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/xen-common-stub.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC lm32-softmmu/tcg/optimize.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC i386-softmmu/xen-hvm-stub.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC lm32-softmmu/tcg/tcg-common.o
CC i386-softmmu/hw/block/virtio-blk.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC lm32-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/hw/core/nmi.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC i386-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC i386-softmmu/hw/cpu/core.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC lm32-softmmu/disas.o
CC i386-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/tcg-runtime.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC arm-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC lm32-softmmu/hax-stub.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC arm-softmmu/hw/usb/tusb6010.o
CC lm32-softmmu/kvm-stub.o
CC lm32-softmmu/arch_init.o
CC arm-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC lm32-softmmu/cpus.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC lm32-softmmu/monitor.o
CC i386-softmmu/hw/display/virtio-vga.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/hw/intc/apic.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/gdbstub.o
CC i386-softmmu/hw/intc/apic_common.o
CC arm-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/intc/ioapic.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC lm32-softmmu/balloon.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC lm32-softmmu/ioport.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC arm-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/vfio/common.o
CC lm32-softmmu/numa.o
CC i386-softmmu/hw/misc/vmport.o
CC arm-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/misc/ivshmem.o
CC lm32-softmmu/qtest.o
CC i386-softmmu/hw/misc/pvpanic.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC i386-softmmu/hw/misc/edu.o
CC lm32-softmmu/bootdevice.o
CC arm-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC lm32-softmmu/memory.o
CC i386-softmmu/hw/net/virtio-net.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC i386-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
CC lm32-softmmu/cputlb.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/arm/boot.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/arm/collie.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC lm32-softmmu/memory_mapping.o
CC lm32-softmmu/dump.o
CC arm-softmmu/hw/arm/exynos4_boards.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC i386-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/arm/gumstix.o
CC arm-softmmu/hw/arm/highbank.o
CC lm32-softmmu/migration/ram.o
CC i386-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/arm/digic_boards.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC arm-softmmu/hw/arm/integratorcp.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC lm32-softmmu/migration/savevm.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC i386-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/arm/musicpal.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC i386-softmmu/hw/vfio/spapr.o
CC lm32-softmmu/xen-common-stub.o
CC aarch64-softmmu/hw/arm/boot.o
CC lm32-softmmu/xen-hvm-stub.o
CC i386-softmmu/hw/virtio/virtio.o
CC lm32-softmmu/hw/core/nmi.o
CC arm-softmmu/hw/arm/nseries.o
CC aarch64-softmmu/hw/arm/collie.o
CC lm32-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC lm32-softmmu/hw/core/null-machine.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC lm32-softmmu/hw/cpu/core.o
CC aarch64-softmmu/hw/arm/highbank.o
CC i386-softmmu/hw/virtio/vhost.o
CC arm-softmmu/hw/arm/palm.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC arm-softmmu/hw/arm/realview.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/arm/spitz.o
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC arm-softmmu/hw/arm/stellaris.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/arm/tosa.o
CC lm32-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/arm/nseries.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC arm-softmmu/hw/arm/versatilepb.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC arm-softmmu/hw/arm/vexpress.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC i386-softmmu/hw/i386/multiboot.o
CC lm32-softmmu/hw/vfio/common.o
CC arm-softmmu/hw/arm/virt.o
CC i386-softmmu/hw/i386/pc.o
CC aarch64-softmmu/hw/arm/palm.o
CC lm32-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/realview.o
CC arm-softmmu/hw/arm/z2.o
CC lm32-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/i386/pc_piix.o
CC aarch64-softmmu/hw/arm/spitz.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC arm-softmmu/hw/arm/virt-acpi-build.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC i386-softmmu/hw/i386/pc_q35.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC arm-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/arm/tosa.o
CC arm-softmmu/hw/arm/sysbus-fdt.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC lm32-softmmu/target/lm32/translate.o
CC arm-softmmu/hw/arm/armv7m.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC arm-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/virt.o
CC lm32-softmmu/target/lm32/op_helper.o
CC arm-softmmu/hw/arm/pxa2xx.o
CC lm32-softmmu/target/lm32/helper.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC lm32-softmmu/target/lm32/cpu.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC aarch64-softmmu/hw/arm/z2.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC arm-softmmu/hw/arm/pxa2xx_gpio.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC lm32-softmmu/target/lm32/machine.o
CC arm-softmmu/hw/arm/pxa2xx_pic.o
CC i386-softmmu/hw/i386/acpi-build.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/arm/netduino2.o
CC lm32-softmmu/trace/control-target.o
CC arm-softmmu/hw/arm/digic.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC lm32-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/arm/omap1.o
LINK lm32-softmmu/qemu-system-lm32
CC aarch64-softmmu/hw/arm/armv7m.o
CC i386-softmmu/hw/i386/pci-assign-load-rom.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC arm-softmmu/hw/arm/omap2.o
CC i386-softmmu/target/i386/translate.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC arm-softmmu/hw/arm/strongarm.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
GEN m68k-softmmu/config-target.h
CC m68k-softmmu/exec.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC arm-softmmu/hw/arm/allwinner-a10.o
CC aarch64-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/omap1.o
CC arm-softmmu/hw/arm/bcm2835_peripherals.o
CC arm-softmmu/hw/arm/bcm2836.o
CC m68k-softmmu/translate-all.o
CC arm-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/omap2.o
CC m68k-softmmu/cpu-exec.o
CC arm-softmmu/hw/arm/stm32f205_soc.o
CC m68k-softmmu/translate-common.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC arm-softmmu/hw/arm/fsl-imx25.o
CC m68k-softmmu/cpu-exec-common.o
CC arm-softmmu/hw/arm/imx25_pdk.o
CC m68k-softmmu/tcg/tcg.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC arm-softmmu/hw/arm/fsl-imx31.o
CC arm-softmmu/hw/arm/kzm.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC arm-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC i386-softmmu/target/i386/helper.o
CC arm-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC m68k-softmmu/tcg/tcg-op.o
CC i386-softmmu/target/i386/cpu.o
CC arm-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/arm/raspi.o
CC arm-softmmu/hw/arm/aspeed.o
CC i386-softmmu/target/i386/bpt_helper.o
CC arm-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC i386-softmmu/target/i386/excp_helper.o
CC arm-softmmu/target/arm/machine.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC arm-softmmu/target/arm/psci.o
CC i386-softmmu/target/i386/fpu_helper.o
CC aarch64-softmmu/hw/arm/xlnx-ep108.o
CC arm-softmmu/target/arm/arch_dump.o
CC m68k-softmmu/tcg/optimize.o
CC arm-softmmu/target/arm/monitor.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC arm-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC arm-softmmu/target/arm/translate.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC m68k-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/hw/arm/kzm.o
CC m68k-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC i386-softmmu/target/i386/cc_helper.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC i386-softmmu/target/i386/int_helper.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC i386-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/target/arm/machine.o
CC m68k-softmmu/disas.o
CC i386-softmmu/target/i386/smm_helper.o
CC aarch64-softmmu/target/arm/psci.o
CC m68k-softmmu/tcg-runtime.o
CC i386-softmmu/target/i386/misc_helper.o
GEN m68k-softmmu/gdbstub-xml.c
CC aarch64-softmmu/target/arm/arch_dump.o
CC i386-softmmu/target/i386/mem_helper.o
CC m68k-softmmu/hax-stub.o
CC aarch64-softmmu/target/arm/monitor.o
CC m68k-softmmu/kvm-stub.o
CC i386-softmmu/target/i386/seg_helper.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC m68k-softmmu/arch_init.o
CC aarch64-softmmu/target/arm/translate.o
CC m68k-softmmu/cpus.o
CC arm-softmmu/target/arm/op_helper.o
CC m68k-softmmu/monitor.o
CC arm-softmmu/target/arm/helper.o
CC i386-softmmu/target/i386/mpx_helper.o
CC m68k-softmmu/gdbstub.o
CC i386-softmmu/target/i386/gdbstub.o
CC i386-softmmu/target/i386/machine.o
CC m68k-softmmu/balloon.o
CC m68k-softmmu/ioport.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC m68k-softmmu/numa.o
CC i386-softmmu/target/i386/arch_dump.o
CC m68k-softmmu/qtest.o
CC i386-softmmu/target/i386/monitor.o
CC arm-softmmu/target/arm/cpu.o
CC m68k-softmmu/bootdevice.o
CC i386-softmmu/target/i386/kvm-stub.o
CC arm-softmmu/target/arm/neon_helper.o
CC m68k-softmmu/memory.o
GEN trace/generated-helpers.c
CC i386-softmmu/trace/control-target.o
CC aarch64-softmmu/target/arm/op_helper.o
CC i386-softmmu/trace/generated-helpers.o
LINK i386-softmmu/qemu-system-i386
CC arm-softmmu/target/arm/iwmmxt_helper.o
CC m68k-softmmu/cputlb.o
CC aarch64-softmmu/target/arm/helper.o
CC arm-softmmu/target/arm/gdbstub.o
CC arm-softmmu/target/arm/crypto_helper.o
CC m68k-softmmu/memory_mapping.o
GEN microblazeel-softmmu/hmp-commands.h
GEN microblazeel-softmmu/hmp-commands-info.h
CC arm-softmmu/target/arm/arm-powerctl.o
GEN microblazeel-softmmu/config-target.h
CC microblazeel-softmmu/exec.o
CC m68k-softmmu/dump.o
GEN trace/generated-helpers.c
CC arm-softmmu/trace/control-target.o
CC arm-softmmu/gdbstub-xml.o
CC m68k-softmmu/migration/ram.o
CC arm-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/target/arm/cpu.o
CC m68k-softmmu/migration/savevm.o
LINK arm-softmmu/qemu-system-arm
CC microblazeel-softmmu/translate-all.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC microblazeel-softmmu/cpu-exec.o
CC m68k-softmmu/xen-common-stub.o
CC microblazeel-softmmu/translate-common.o
CC m68k-softmmu/xen-hvm-stub.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC microblazeel-softmmu/cpu-exec-common.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC microblazeel-softmmu/tcg/tcg.o
CC m68k-softmmu/hw/core/nmi.o
CC m68k-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC m68k-softmmu/hw/core/null-machine.o
GEN microblaze-softmmu/hmp-commands.h
CC m68k-softmmu/hw/cpu/core.o
GEN microblaze-softmmu/hmp-commands-info.h
CC aarch64-softmmu/target/arm/cpu64.o
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC m68k-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC m68k-softmmu/hw/vfio/common.o
CC microblaze-softmmu/translate-all.o
CC m68k-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/tcg/optimize.o
CC m68k-softmmu/hw/vfio/spapr.o
CC microblaze-softmmu/cpu-exec.o
CC m68k-softmmu/hw/m68k/an5206.o
CC microblaze-softmmu/translate-common.o
CC m68k-softmmu/hw/m68k/mcf5208.o
CC microblaze-softmmu/cpu-exec-common.o
CC microblaze-softmmu/tcg/tcg.o
CC m68k-softmmu/hw/m68k/mcf5206.o
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/fpu/softfloat.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC aarch64-softmmu/target/arm/gdbstub64.o
CC m68k-softmmu/target/m68k/translate.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC microblaze-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC aarch64-softmmu/gdbstub-xml.o
CC microblazeel-softmmu/disas.o
CC aarch64-softmmu/trace/generated-helpers.o
CC m68k-softmmu/target/m68k/op_helper.o
CC microblazeel-softmmu/tcg-runtime.o
LINK aarch64-softmmu/qemu-system-aarch64
CC microblazeel-softmmu/hax-stub.o
CC microblaze-softmmu/tcg/optimize.o
CC m68k-softmmu/target/m68k/helper.o
CC microblazeel-softmmu/kvm-stub.o
CC microblazeel-softmmu/arch_init.o
CC m68k-softmmu/target/m68k/cpu.o
CC microblazeel-softmmu/cpus.o
CC microblaze-softmmu/tcg/tcg-common.o
CC m68k-softmmu/target/m68k/gdbstub.o
CC microblaze-softmmu/fpu/softfloat.o
GEN trace/generated-helpers.c
CC m68k-softmmu/trace/control-target.o
CC microblazeel-softmmu/monitor.o
CC m68k-softmmu/gdbstub-xml.o
CC m68k-softmmu/trace/generated-helpers.o
LINK m68k-softmmu/qemu-system-m68k
GEN mips64el-softmmu/hmp-commands.h
CC microblazeel-softmmu/gdbstub.o
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC microblazeel-softmmu/balloon.o
CC microblazeel-softmmu/ioport.o
CC microblaze-softmmu/disas.o
CC microblazeel-softmmu/numa.o
CC microblaze-softmmu/tcg-runtime.o
CC microblazeel-softmmu/qtest.o
CC microblaze-softmmu/hax-stub.o
CC mips64el-softmmu/translate-all.o
CC microblaze-softmmu/kvm-stub.o
CC microblazeel-softmmu/bootdevice.o
CC microblaze-softmmu/arch_init.o
CC microblazeel-softmmu/memory.o
CC mips64el-softmmu/cpu-exec.o
CC microblaze-softmmu/cpus.o
CC mips64el-softmmu/translate-common.o
CC mips64el-softmmu/cpu-exec-common.o
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC mips64-softmmu/exec.o
CC microblaze-softmmu/monitor.o
CC mips64el-softmmu/tcg/tcg.o
CC microblazeel-softmmu/cputlb.o
CC microblaze-softmmu/gdbstub.o
CC mips64-softmmu/translate-all.o
CC microblazeel-softmmu/memory_mapping.o
CC microblaze-softmmu/balloon.o
CC mips64el-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/dump.o
CC mips64-softmmu/cpu-exec.o
CC microblaze-softmmu/ioport.o
CC mips64-softmmu/translate-common.o
CC microblaze-softmmu/numa.o
CC microblazeel-softmmu/migration/ram.o
CC mips64-softmmu/cpu-exec-common.o
CC microblaze-softmmu/qtest.o
CC mips64-softmmu/tcg/tcg.o
CC microblaze-softmmu/bootdevice.o
CC microblaze-softmmu/memory.o
CC microblazeel-softmmu/migration/savevm.o
CC mips64el-softmmu/tcg/optimize.o
CC microblazeel-softmmu/xen-common-stub.o
CC microblaze-softmmu/cputlb.o
CC microblazeel-softmmu/xen-hvm-stub.o
CC mips64-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/hw/core/nmi.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/hw/cpu/core.o
CC mips64el-softmmu/fpu/softfloat.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC microblaze-softmmu/memory_mapping.o
CC microblaze-softmmu/dump.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC microblaze-softmmu/migration/ram.o
CC microblazeel-softmmu/hw/vfio/common.o
CC mips64-softmmu/tcg/optimize.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC microblaze-softmmu/migration/savevm.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/disas.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/tcg-runtime.o
CC microblaze-softmmu/xen-common-stub.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64-softmmu/fpu/softfloat.o
CC microblaze-softmmu/xen-hvm-stub.o
CC mips64el-softmmu/hax-stub.o
CC microblaze-softmmu/hw/core/nmi.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/kvm-stub.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC microblaze-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/arch_init.o
CC microblaze-softmmu/hw/cpu/core.o
CC mips64el-softmmu/cpus.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/monitor.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC microblaze-softmmu/hw/vfio/common.o
CC mips64-softmmu/disas.o
CC microblazeel-softmmu/target/microblaze/cpu.o
CC mips64-softmmu/tcg-runtime.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hax-stub.o
CC mips64el-softmmu/gdbstub.o
CC microblazeel-softmmu/target/microblaze/mmu.o
CC mips64-softmmu/kvm-stub.o
CC microblaze-softmmu/hw/vfio/spapr.o
GEN trace/generated-helpers.c
CC microblazeel-softmmu/trace/control-target.o
CC mips64el-softmmu/balloon.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64-softmmu/arch_init.o
CC microblazeel-softmmu/trace/generated-helpers.o
CC mips64el-softmmu/ioport.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64-softmmu/cpus.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC microblaze-softmmu/hw/microblaze/boot.o
CC mips64el-softmmu/numa.o
CC microblaze-softmmu/target/microblaze/translate.o
CC mips64-softmmu/monitor.o
CC mips64el-softmmu/qtest.o
CC mips64el-softmmu/bootdevice.o
CC microblaze-softmmu/target/microblaze/op_helper.o
CC microblaze-softmmu/target/microblaze/helper.o
CC mips64el-softmmu/memory.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC mips64-softmmu/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
CC mips64el-softmmu/cputlb.o
GEN mipsel-softmmu/hmp-commands.h
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
GEN mipsel-softmmu/hmp-commands-info.h
GEN mipsel-softmmu/config-target.h
CC mips64-softmmu/balloon.o
CC mipsel-softmmu/exec.o
CC mips64-softmmu/ioport.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
CC mips64-softmmu/numa.o
CC mips64el-softmmu/memory_mapping.o
CC mips64-softmmu/qtest.o
CC mips64el-softmmu/dump.o
CC mips64-softmmu/bootdevice.o
CC mips64el-softmmu/migration/ram.o
CC mips64-softmmu/memory.o
CC mips64el-softmmu/migration/savevm.o
CC mipsel-softmmu/translate-all.o
CC mipsel-softmmu/cpu-exec.o
CC mips64-softmmu/cputlb.o
CC mips64el-softmmu/xen-common-stub.o
CC mipsel-softmmu/translate-common.o
CC mips64el-softmmu/xen-hvm-stub.o
GEN mips-softmmu/hmp-commands.h
CC mipsel-softmmu/cpu-exec-common.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
GEN mips-softmmu/hmp-commands-info.h
GEN mips-softmmu/config-target.h
CC mips-softmmu/exec.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/tcg/tcg.o
CC mips64-softmmu/memory_mapping.o
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/dump.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/migration/ram.o
CC mips64el-softmmu/hw/core/nmi.o
CC mips-softmmu/translate-all.o
CC mips64el-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mips64-softmmu/migration/savevm.o
CC mips64el-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/cpu/core.o
CC mips-softmmu/cpu-exec.o
CC mips64el-softmmu/hw/display/vga.o
CC mips-softmmu/translate-common.o
CC mips64-softmmu/xen-common-stub.o
CC mips-softmmu/cpu-exec-common.o
CC mips64-softmmu/xen-hvm-stub.o
CC mips-softmmu/tcg/tcg.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/hw/core/nmi.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mips-softmmu/tcg/tcg-op.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/cpu/core.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC mips64-softmmu/hw/display/vga.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/tcg/optimize.o
CC mipsel-softmmu/disas.o
CC mips64el-softmmu/hw/misc/edu.o
CC mipsel-softmmu/tcg-runtime.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hax-stub.o
CC mips-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/kvm-stub.o
CC mips-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/arch_init.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/cpus.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/monitor.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips64el-softmmu/hw/vfio/common.o
CC mips-softmmu/disas.o
CC mips64-softmmu/hw/misc/edu.o
CC mipsel-softmmu/gdbstub.o
CC mips-softmmu/tcg-runtime.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mips64el-softmmu/hw/vfio/pci.o
CC mips-softmmu/hax-stub.o
CC mipsel-softmmu/balloon.o
CC mips-softmmu/kvm-stub.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/ioport.o
CC mips-softmmu/arch_init.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/numa.o
CC mips-softmmu/cpus.o
CC mipsel-softmmu/qtest.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mips-softmmu/monitor.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/bootdevice.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/memory.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mips-softmmu/gdbstub.o
CC mips64-softmmu/hw/vfio/common.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/cputlb.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mips-softmmu/balloon.o
CC mips-softmmu/ioport.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/numa.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
CC mipsel-softmmu/memory_mapping.o
CC mips-softmmu/qtest.o
CC mipsel-softmmu/dump.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips-softmmu/bootdevice.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/memory.o
CC mipsel-softmmu/migration/ram.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mipsel-softmmu/migration/savevm.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/cputlb.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mips64-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/xen-common-stub.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/xen-hvm-stub.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mips64el-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/memory_mapping.o
CC mips64el-softmmu/hw/mips/cputimer.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mips-softmmu/dump.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/migration/ram.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mips-softmmu/migration/savevm.o
CC mipsel-softmmu/hw/core/nmi.o
CC mips64el-softmmu/hw/mips/boston.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips64el-softmmu/target/mips/translate.o
CC mipsel-softmmu/hw/core/null-machine.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/xen-common-stub.o
CC mips64-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/cpu/core.o
CC mips-softmmu/xen-hvm-stub.o
CC mipsel-softmmu/hw/display/vga.o
CC mips64-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/hw/mips/mips_jazz.o
CC mips-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/hw/mips/cps.o
CC mips-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/target/mips/translate.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC mips-softmmu/hw/core/nmi.o
CC mips-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC mips-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC mips-softmmu/hw/cpu/core.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC mips-softmmu/hw/display/vga.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/misc/edu.o
CC mips64el-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mips-softmmu/hw/display/virtio-gpu-3d.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mips-softmmu/hw/display/virtio-gpu-pci.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC mips64el-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips-softmmu/hw/intc/mips_gic.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mips-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hw/vfio/common.o
CC mips-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mips-softmmu/hw/misc/mips_itu.o
CC mipsel-softmmu/hw/vfio/pci.o
CC mips64el-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/hw/misc/edu.o
CC mips64el-softmmu/target/mips/helper.o
CC mips-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/target/mips/cpu.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64el-softmmu/target/mips/gdbstub.o
CC mips-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/target/mips/msa_helper.o
CC mips-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mips-softmmu/hw/scsi/vhost-scsi.o
CC mips-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/hw/vfio/common.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC mips64-softmmu/target/mips/helper.o
CC mips-softmmu/hw/vfio/pci.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/target/mips/cpu.o
CC mips64-softmmu/target/mips/gdbstub.o
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/target/mips/msa_helper.o
CC mips64el-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC mips64el-softmmu/target/mips/machine.o
CC mips-softmmu/hw/vfio/platform.o
GEN trace/generated-helpers.c
CC mips64el-softmmu/trace/control-target.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/hw/mips/mips_r4k.o
CC mips64el-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/hw/mips/mips_malta.o
LINK mips64el-softmmu/qemu-system-mips64el
CC mipsel-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/hw/mips/mips_int.o
CC mipsel-softmmu/hw/mips/gt64xxx_pci.o
CC mips64-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/hw/mips/cps.o
CC mips-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/virtio/vhost-user.o
CC mips64-softmmu/target/mips/machine.o
CC mipsel-softmmu/target/mips/translate.o
CC mipsel-softmmu/target/mips/dsp_helper.o
GEN trace/generated-helpers.c
CC mips-softmmu/hw/virtio/vhost-vsock.o
CC mips64-softmmu/trace/control-target.o
CC mips64-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/virtio/virtio-crypto.o
LINK mips64-softmmu/qemu-system-mips64
CC mips-softmmu/hw/virtio/virtio-crypto-pci.o
CC mips-softmmu/hw/mips/mips_r4k.o
GEN moxie-softmmu/hmp-commands.h
GEN moxie-softmmu/hmp-commands-info.h
GEN moxie-softmmu/config-target.h
CC mips-softmmu/hw/mips/mips_malta.o
CC moxie-softmmu/exec.o
CC mipsel-softmmu/target/mips/op_helper.o
CC mips-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/mips/addr.o
CC mips-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/mips/gt64xxx_pci.o
CC mips-softmmu/hw/mips/cps.o
CC moxie-softmmu/translate-all.o
CC mipsel-softmmu/target/mips/lmi_helper.o
CC mips-softmmu/target/mips/translate.o
CC mipsel-softmmu/target/mips/helper.o
CC moxie-softmmu/cpu-exec.o
CC moxie-softmmu/translate-common.o
CC mips-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/target/mips/cpu.o
CC moxie-softmmu/cpu-exec-common.o
CC mipsel-softmmu/target/mips/gdbstub.o
CC moxie-softmmu/tcg/tcg.o
CC mipsel-softmmu/target/mips/msa_helper.o
CC mips-softmmu/target/mips/op_helper.o
CC moxie-softmmu/tcg/tcg-op.o
CC moxie-softmmu/tcg/optimize.o
CC mips-softmmu/target/mips/lmi_helper.o
CC mipsel-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/tcg/tcg-common.o
CC mipsel-softmmu/target/mips/machine.o
CC mips-softmmu/target/mips/helper.o
CC moxie-softmmu/fpu/softfloat.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/trace/control-target.o
CC mips-softmmu/target/mips/cpu.o
GEN nios2-softmmu/hmp-commands.h
GEN nios2-softmmu/hmp-commands-info.h
GEN nios2-softmmu/config-target.h
CC nios2-softmmu/exec.o
CC mipsel-softmmu/trace/generated-helpers.o
CC mips-softmmu/target/mips/gdbstub.o
LINK mipsel-softmmu/qemu-system-mipsel
CC mips-softmmu/target/mips/msa_helper.o
CC moxie-softmmu/disas.o
GEN or1k-softmmu/hmp-commands.h
GEN or1k-softmmu/hmp-commands-info.h
GEN or1k-softmmu/config-target.h
CC or1k-softmmu/exec.o
CC nios2-softmmu/translate-all.o
CC moxie-softmmu/tcg-runtime.o
CC nios2-softmmu/cpu-exec.o
CC moxie-softmmu/hax-stub.o
CC nios2-softmmu/translate-common.o
CC moxie-softmmu/kvm-stub.o
CC moxie-softmmu/arch_init.o
CC nios2-softmmu/cpu-exec-common.o
CC or1k-softmmu/translate-all.o
CC mips-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/cpus.o
CC nios2-softmmu/tcg/tcg.o
CC mips-softmmu/target/mips/machine.o
CC or1k-softmmu/cpu-exec.o
CC moxie-softmmu/monitor.o
GEN trace/generated-helpers.c
CC mips-softmmu/trace/control-target.o
CC or1k-softmmu/translate-common.o
CC mips-softmmu/trace/generated-helpers.o
CC or1k-softmmu/cpu-exec-common.o
CC nios2-softmmu/tcg/tcg-op.o
LINK mips-softmmu/qemu-system-mips
CC or1k-softmmu/tcg/tcg.o
CC moxie-softmmu/gdbstub.o
CC moxie-softmmu/balloon.o
CC moxie-softmmu/ioport.o
CC or1k-softmmu/tcg/tcg-op.o
CC moxie-softmmu/numa.o
CC nios2-softmmu/tcg/optimize.o
GEN ppc64-softmmu/hmp-commands.h
GEN ppc64-softmmu/hmp-commands-info.h
GEN ppc64-softmmu/config-target.h
CC moxie-softmmu/qtest.o
CC ppc64-softmmu/exec.o
CC nios2-softmmu/tcg/tcg-common.o
CC nios2-softmmu/fpu/softfloat.o
CC moxie-softmmu/bootdevice.o
CC or1k-softmmu/tcg/optimize.o
CC moxie-softmmu/memory.o
CC or1k-softmmu/tcg/tcg-common.o
CC moxie-softmmu/cputlb.o
CC or1k-softmmu/fpu/softfloat.o
CC ppc64-softmmu/translate-all.o
CC ppc64-softmmu/cpu-exec.o
CC nios2-softmmu/disas.o
CC moxie-softmmu/memory_mapping.o
CC ppc64-softmmu/translate-common.o
CC moxie-softmmu/dump.o
CC ppc64-softmmu/cpu-exec-common.o
CC nios2-softmmu/tcg-runtime.o
CC ppc64-softmmu/tcg/tcg.o
CC nios2-softmmu/hax-stub.o
CC moxie-softmmu/migration/ram.o
CC nios2-softmmu/kvm-stub.o
CC or1k-softmmu/disas.o
CC nios2-softmmu/arch_init.o
CC moxie-softmmu/migration/savevm.o
CC or1k-softmmu/tcg-runtime.o
CC nios2-softmmu/cpus.o
CC or1k-softmmu/hax-stub.o
CC moxie-softmmu/xen-common-stub.o
CC or1k-softmmu/kvm-stub.o
CC ppc64-softmmu/tcg/tcg-op.o
CC moxie-softmmu/xen-hvm-stub.o
CC nios2-softmmu/monitor.o
CC moxie-softmmu/hw/core/nmi.o
CC or1k-softmmu/arch_init.o
CC moxie-softmmu/hw/core/generic-loader.o
CC or1k-softmmu/cpus.o
CC moxie-softmmu/hw/core/null-machine.o
CC moxie-softmmu/hw/cpu/core.o
CC nios2-softmmu/gdbstub.o
CC or1k-softmmu/monitor.o
CC moxie-softmmu/hw/display/vga.o
CC nios2-softmmu/balloon.o
CC ppc64-softmmu/tcg/optimize.o
CC nios2-softmmu/ioport.o
CC moxie-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/numa.o
CC or1k-softmmu/gdbstub.o
CC moxie-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/tcg/tcg-common.o
CC nios2-softmmu/qtest.o
CC or1k-softmmu/balloon.o
CC moxie-softmmu/hw/timer/mc146818rtc.o
CC ppc64-softmmu/fpu/softfloat.o
CC or1k-softmmu/ioport.o
CC nios2-softmmu/bootdevice.o
CC moxie-softmmu/hw/vfio/common.o
CC nios2-softmmu/memory.o
CC or1k-softmmu/numa.o
CC moxie-softmmu/hw/vfio/platform.o
CC or1k-softmmu/qtest.o
CC moxie-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/cputlb.o
CC or1k-softmmu/bootdevice.o
CC moxie-softmmu/hw/moxie/moxiesim.o
CC or1k-softmmu/memory.o
CC ppc64-softmmu/disas.o
CC moxie-softmmu/target/moxie/translate.o
CC ppc64-softmmu/tcg-runtime.o
GEN ppc64-softmmu/gdbstub-xml.c
CC moxie-softmmu/target/moxie/helper.o
CC nios2-softmmu/memory_mapping.o
CC moxie-softmmu/target/moxie/machine.o
CC moxie-softmmu/target/moxie/cpu.o
CC nios2-softmmu/dump.o
CC or1k-softmmu/cputlb.o
CC moxie-softmmu/target/moxie/mmu.o
CC ppc64-softmmu/hax-stub.o
CC nios2-softmmu/migration/ram.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/kvm-stub.o
CC moxie-softmmu/trace/control-target.o
CC ppc64-softmmu/libdecnumber/decContext.o
CC moxie-softmmu/trace/generated-helpers.o
CC nios2-softmmu/migration/savevm.o
CC or1k-softmmu/memory_mapping.o
CC ppc64-softmmu/libdecnumber/decNumber.o
LINK moxie-softmmu/qemu-system-moxie
CC or1k-softmmu/dump.o
CC nios2-softmmu/xen-common-stub.o
CC nios2-softmmu/xen-hvm-stub.o
CC or1k-softmmu/migration/ram.o
CC nios2-softmmu/hw/core/nmi.o
CC ppc64-softmmu/libdecnumber/dpd/decimal32.o
CC nios2-softmmu/hw/core/generic-loader.o
CC nios2-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/libdecnumber/dpd/decimal64.o
CC or1k-softmmu/migration/savevm.o
CC nios2-softmmu/hw/cpu/core.o
CC or1k-softmmu/xen-common-stub.o
CC ppc64-softmmu/libdecnumber/dpd/decimal128.o
CC nios2-softmmu/hw/intc/nios2_iic.o
CC ppc64-softmmu/arch_init.o
CC nios2-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/hw/net/rocker/qmp-norocker.o
CC nios2-softmmu/hw/timer/altera_timer.o
CC ppc64-softmmu/cpus.o
CC or1k-softmmu/xen-hvm-stub.o
CC nios2-softmmu/hw/vfio/common.o
CC or1k-softmmu/hw/core/nmi.o
GEN ppcemb-softmmu/hmp-commands.h
CC ppc64-softmmu/monitor.o
GEN ppcemb-softmmu/hmp-commands-info.h
GEN ppcemb-softmmu/config-target.h
CC or1k-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/exec.o
CC nios2-softmmu/hw/vfio/platform.o
CC or1k-softmmu/hw/core/null-machine.o
CC or1k-softmmu/hw/cpu/core.o
CC nios2-softmmu/hw/vfio/spapr.o
CC or1k-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/hw/nios2/boot.o
CC or1k-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/gdbstub.o
CC nios2-softmmu/hw/nios2/cpu_pic.o
CC or1k-softmmu/hw/vfio/common.o
CC nios2-softmmu/hw/nios2/10m50_devboard.o
CC ppc64-softmmu/balloon.o
CC nios2-softmmu/target/nios2/translate.o
CC ppcemb-softmmu/translate-all.o
CC or1k-softmmu/hw/vfio/platform.o
CC ppc64-softmmu/ioport.o
CC ppcemb-softmmu/cpu-exec.o
CC or1k-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/target/nios2/op_helper.o
CC ppc64-softmmu/numa.o
CC ppcemb-softmmu/translate-common.o
CC or1k-softmmu/hw/openrisc/pic_cpu.o
CC nios2-softmmu/target/nios2/helper.o
CC ppcemb-softmmu/cpu-exec-common.o
CC ppc64-softmmu/qtest.o
CC or1k-softmmu/hw/openrisc/cputimer.o
CC ppcemb-softmmu/tcg/tcg.o
CC nios2-softmmu/target/nios2/cpu.o
CC or1k-softmmu/hw/openrisc/openrisc_sim.o
CC ppc64-softmmu/bootdevice.o
CC or1k-softmmu/target/openrisc/machine.o
CC nios2-softmmu/target/nios2/mmu.o
CC or1k-softmmu/target/openrisc/cpu.o
CC ppc64-softmmu/memory.o
CC nios2-softmmu/target/nios2/monitor.o
CC or1k-softmmu/target/openrisc/exception.o
CC or1k-softmmu/target/openrisc/interrupt.o
GEN trace/generated-helpers.c
CC nios2-softmmu/trace/control-target.o
CC ppcemb-softmmu/tcg/tcg-op.o
CC or1k-softmmu/target/openrisc/mmu.o
CC ppc64-softmmu/cputlb.o
CC nios2-softmmu/trace/generated-helpers.o
CC or1k-softmmu/target/openrisc/translate.o
LINK nios2-softmmu/qemu-system-nios2
CC or1k-softmmu/target/openrisc/exception_helper.o
CC ppc64-softmmu/memory_mapping.o
CC or1k-softmmu/target/openrisc/fpu_helper.o
CC or1k-softmmu/target/openrisc/interrupt_helper.o
CC ppc64-softmmu/dump.o
CC or1k-softmmu/target/openrisc/mmu_helper.o
CC ppc64-softmmu/migration/ram.o
CC or1k-softmmu/target/openrisc/sys_helper.o
CC ppcemb-softmmu/tcg/optimize.o
CC or1k-softmmu/target/openrisc/gdbstub.o
GEN trace/generated-helpers.c
GEN ppc-softmmu/hmp-commands.h
CC or1k-softmmu/trace/control-target.o
GEN ppc-softmmu/hmp-commands-info.h
GEN ppc-softmmu/config-target.h
CC ppc64-softmmu/migration/savevm.o
CC ppc-softmmu/exec.o
CC or1k-softmmu/trace/generated-helpers.o
CC ppcemb-softmmu/tcg/tcg-common.o
LINK or1k-softmmu/qemu-system-or1k
CC ppc64-softmmu/xen-common-stub.o
CC ppcemb-softmmu/fpu/softfloat.o
CC ppc64-softmmu/xen-hvm-stub.o
CC ppc64-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/translate-all.o
CC ppcemb-softmmu/disas.o
CC ppc64-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/cpu-exec.o
CC ppc64-softmmu/hw/char/spapr_vty.o
CC ppc-softmmu/translate-common.o
GEN s390x-softmmu/hmp-commands.h
CC ppc64-softmmu/hw/char/virtio-serial-bus.o
GEN s390x-softmmu/hmp-commands-info.h
CC s390x-softmmu/gen-features
CC ppcemb-softmmu/tcg-runtime.o
CC ppc-softmmu/cpu-exec-common.o
GEN s390x-softmmu/config-target.h
GEN s390x-softmmu/gen-features.h
CC s390x-softmmu/exec.o
CC ppc-softmmu/tcg/tcg.o
GEN ppcemb-softmmu/gdbstub-xml.c
CC ppc64-softmmu/hw/core/nmi.o
CC ppc64-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hax-stub.o
CC ppc64-softmmu/hw/core/null-machine.o
CC ppc-softmmu/tcg/tcg-op.o
CC ppcemb-softmmu/kvm-stub.o
CC ppc64-softmmu/hw/cpu/core.o
CC s390x-softmmu/translate-all.o
CC ppcemb-softmmu/libdecnumber/decContext.o
CC ppc64-softmmu/hw/display/vga.o
CC s390x-softmmu/cpu-exec.o
CC ppcemb-softmmu/libdecnumber/decNumber.o
CC s390x-softmmu/translate-common.o
CC s390x-softmmu/cpu-exec-common.o
CC s390x-softmmu/tcg/tcg.o
CC ppc64-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/display/virtio-gpu-3d.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal32.o
CC ppc-softmmu/tcg/optimize.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal64.o
CC s390x-softmmu/tcg/tcg-op.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal128.o
CC ppc64-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/arch_init.o
CC ppc64-softmmu/hw/display/virtio-vga.o
CC ppc-softmmu/tcg/tcg-common.o
CC ppcemb-softmmu/cpus.o
CC ppc64-softmmu/hw/intc/xics.o
CC ppc-softmmu/fpu/softfloat.o
CC ppc64-softmmu/hw/intc/xics_spapr.o
CC ppcemb-softmmu/monitor.o
CC ppc64-softmmu/hw/misc/ivshmem.o
CC ppc64-softmmu/hw/misc/edu.o
CC s390x-softmmu/tcg/optimize.o
CC ppc64-softmmu/hw/net/spapr_llan.o
CC ppcemb-softmmu/gdbstub.o
CC s390x-softmmu/tcg/tcg-common.o
CC ppc64-softmmu/hw/net/xilinx_ethlite.o
CC ppcemb-softmmu/balloon.o
CC s390x-softmmu/fpu/softfloat.o
CC ppc64-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/disas.o
CC ppcemb-softmmu/ioport.o
CC ppc-softmmu/tcg-runtime.o
CC ppcemb-softmmu/numa.o
GEN ppc-softmmu/gdbstub-xml.c
CC ppcemb-softmmu/qtest.o
CC ppc64-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/bootdevice.o
CC ppc64-softmmu/hw/net/fsl_etsec/etsec.o
CC ppc-softmmu/hax-stub.o
CC ppc64-softmmu/hw/net/fsl_etsec/registers.o
CC ppc-softmmu/kvm-stub.o
CC ppcemb-softmmu/memory.o
CC ppc-softmmu/libdecnumber/decContext.o
CC ppc64-softmmu/hw/net/fsl_etsec/rings.o
CC ppc-softmmu/libdecnumber/decNumber.o
CC ppc64-softmmu/hw/net/fsl_etsec/miim.o
CC s390x-softmmu/disas.o
CC ppc64-softmmu/hw/nvram/spapr_nvram.o
CC s390x-softmmu/tcg-runtime.o
CC ppcemb-softmmu/cputlb.o
CC ppc64-softmmu/hw/scsi/spapr_vscsi.o
GEN s390x-softmmu/gdbstub-xml.c
CC ppc64-softmmu/hw/scsi/virtio-scsi.o
CC ppc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/libdecnumber/dpd/decimal32.o
CC ppc64-softmmu/hw/scsi/vhost-scsi.o
CC s390x-softmmu/hax-stub.o
CC ppc-softmmu/libdecnumber/dpd/decimal64.o
CC ppc64-softmmu/hw/timer/mc146818rtc.o
CC s390x-softmmu/arch_init.o
CC ppcemb-softmmu/memory_mapping.o
CC ppc-softmmu/libdecnumber/dpd/decimal128.o
CC s390x-softmmu/cpus.o
CC ppc64-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/dump.o
CC ppc-softmmu/arch_init.o
CC ppc64-softmmu/hw/vfio/pci.o
CC s390x-softmmu/monitor.o
CC ppc-softmmu/cpus.o
CC ppcemb-softmmu/migration/ram.o
CC ppc-softmmu/monitor.o
CC ppc64-softmmu/hw/vfio/pci-quirks.o
CC ppcemb-softmmu/migration/savevm.o
CC s390x-softmmu/gdbstub.o
CC ppc64-softmmu/hw/vfio/platform.o
CC ppc-softmmu/gdbstub.o
CC ppc64-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/balloon.o
CC ppc64-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/xen-common-stub.o
CC s390x-softmmu/ioport.o
CC ppc-softmmu/balloon.o
CC s390x-softmmu/numa.o
CC ppcemb-softmmu/xen-hvm-stub.o
CC ppc-softmmu/ioport.o
CC s390x-softmmu/qtest.o
CC ppcemb-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc-softmmu/numa.o
CC ppc64-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/bootdevice.o
CC ppcemb-softmmu/hw/block/virtio-blk.o
CC s390x-softmmu/kvm-all.o
CC ppc-softmmu/qtest.o
CC ppc64-softmmu/hw/virtio/vhost.o
CC ppcemb-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/bootdevice.o
CC ppcemb-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/memory.o
CC ppc-softmmu/memory.o
CC ppc64-softmmu/hw/virtio/vhost-backend.o
CC ppcemb-softmmu/hw/core/nmi.o
CC ppc64-softmmu/hw/virtio/vhost-user.o
CC ppcemb-softmmu/hw/core/generic-loader.o
CC s390x-softmmu/cputlb.o
CC ppc64-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/cputlb.o
CC ppcemb-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/hw/virtio/virtio-crypto.o
CC ppcemb-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppcemb-softmmu/hw/display/vga.o
CC ppc64-softmmu/hw/ppc/ppc.o
CC ppc64-softmmu/hw/ppc/ppc_booke.o
CC ppcemb-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/ppc/fdt.o
CC s390x-softmmu/memory_mapping.o
CC ppc64-softmmu/hw/ppc/spapr.o
CC ppc-softmmu/memory_mapping.o
CC s390x-softmmu/dump.o
CC ppcemb-softmmu/hw/display/virtio-gpu-3d.o
CC ppc-softmmu/dump.o
CC ppc64-softmmu/hw/ppc/spapr_vio.o
CC s390x-softmmu/migration/ram.o
CC ppc-softmmu/migration/ram.o
CC ppcemb-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/ppc/spapr_events.o
CC ppcemb-softmmu/hw/misc/ivshmem.o
CC s390x-softmmu/migration/savevm.o
CC ppc64-softmmu/hw/ppc/spapr_hcall.o
CC ppc-softmmu/migration/savevm.o
CC ppcemb-softmmu/hw/misc/edu.o
CC ppc64-softmmu/hw/ppc/spapr_iommu.o
CC s390x-softmmu/xen-common-stub.o
CC ppcemb-softmmu/hw/net/xilinx_ethlite.o
CC ppc-softmmu/xen-common-stub.o
CC s390x-softmmu/xen-hvm-stub.o
CC ppc64-softmmu/hw/ppc/spapr_rtas.o
CC ppcemb-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/xen-hvm-stub.o
CC s390x-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/ppc/spapr_pci.o
CC s390x-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/hw/block/virtio-blk.o
CC ppcemb-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi.o
CC s390x-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc64-softmmu/hw/ppc/spapr_rtc.o
CC ppc-softmmu/hw/block/dataplane/virtio-blk.o
CC s390x-softmmu/hw/char/virtio-serial-bus.o
CC ppc64-softmmu/hw/ppc/spapr_drc.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/hw/core/nmi.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi.o
CC ppc64-softmmu/hw/ppc/spapr_rng.o
CC ppc-softmmu/hw/core/nmi.o
CC s390x-softmmu/hw/core/generic-loader.o
CC ppc-softmmu/hw/core/generic-loader.o
CC ppc64-softmmu/hw/ppc/spapr_cpu_core.o
CC s390x-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/core/null-machine.o
CC s390x-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/ppc/spapr_ovec.o
CC s390x-softmmu/hw/display/virtio-gpu.o
CC ppc-softmmu/hw/cpu/core.o
CC ppc64-softmmu/hw/ppc/pnv.o
CC ppc-softmmu/hw/display/vga.o
CC ppcemb-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/hw/ppc/pnv_xscom.o
CC s390x-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/ppc/pnv_core.o
CC ppc-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/ppc/pnv_lpc.o
CC ppcemb-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/ppc/spapr_pci_vfio.o
CC s390x-softmmu/hw/intc/s390_flic.o
CC ppc64-softmmu/hw/ppc/spapr_rtas_ddw.o
CC s390x-softmmu/hw/intc/s390_flic_kvm.o
CC ppcemb-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/ppc/ppc405_boards.o
CC s390x-softmmu/hw/net/virtio-net.o
CC ppcemb-softmmu/hw/vfio/spapr.o
CC ppc64-softmmu/hw/ppc/ppc4xx_devs.o
CC ppc-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/ppc/ppc405_uc.o
CC s390x-softmmu/hw/net/vhost_net.o
CC ppc-softmmu/hw/misc/ivshmem.o
CC s390x-softmmu/hw/net/rocker/qmp-norocker.o
CC ppc64-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/misc/edu.o
CC s390x-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/virtio/virtio-balloon.o
CC ppc-softmmu/hw/net/xilinx_ethlite.o
CC s390x-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc64-softmmu/hw/ppc/ppc4xx_pci.o
CC s390x-softmmu/hw/scsi/vhost-scsi.o
CC ppcemb-softmmu/hw/virtio/vhost.o
CC ppc-softmmu/hw/net/virtio-net.o
CC ppc64-softmmu/hw/ppc/prep.o
CC s390x-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/net/vhost_net.o
CC ppc64-softmmu/hw/ppc/prep_systemio.o
CC ppcemb-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/net/fsl_etsec/etsec.o
CC s390x-softmmu/hw/vfio/pci.o
CC ppcemb-softmmu/hw/virtio/vhost-user.o
CC ppc64-softmmu/hw/ppc/rs6000_mc.o
CC ppc-softmmu/hw/net/fsl_etsec/registers.o
CC ppcemb-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/hw/net/fsl_etsec/rings.o
CC ppc64-softmmu/hw/ppc/mac_oldworld.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/net/fsl_etsec/miim.o
CC s390x-softmmu/hw/vfio/pci-quirks.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc64-softmmu/hw/ppc/mac_newworld.o
CC ppc-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc.o
CC ppc64-softmmu/hw/ppc/e500.o
CC ppc-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC s390x-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/scsi/vhost-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc_booke.o
CC ppc64-softmmu/hw/ppc/mpc8544ds.o
CC s390x-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/ppc/e500plat.o
CC ppcemb-softmmu/hw/ppc/fdt.o
CC ppc-softmmu/hw/timer/mc146818rtc.o
CC ppc64-softmmu/hw/ppc/mpc8544_guts.o
CC ppcemb-softmmu/hw/ppc/ppc405_boards.o
CC ppc64-softmmu/hw/ppc/ppce500_spin.o
CC ppc-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/hw/virtio/virtio-balloon.o
CC ppc64-softmmu/hw/ppc/virtex_ml507.o
CC ppcemb-softmmu/hw/ppc/ppc405_uc.o
CC ppc-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/target/ppc/cpu-models.o
CC s390x-softmmu/hw/virtio/vhost.o
CC ppcemb-softmmu/hw/ppc/ppc440_bamboo.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_pci.o
CC s390x-softmmu/hw/virtio/vhost-backend.o
CC ppcemb-softmmu/hw/ppc/virtex_ml507.o
CC s390x-softmmu/hw/virtio/vhost-user.o
CC ppcemb-softmmu/target/ppc/cpu-models.o
CC ppc-softmmu/hw/vfio/pci-quirks.o
CC s390x-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/virtio/virtio-crypto.o
CC ppc64-softmmu/target/ppc/translate.o
CC ppc-softmmu/hw/vfio/platform.o
CC s390x-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/s390x/s390-virtio.o
CC ppc-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/target/ppc/translate.o
CC s390x-softmmu/hw/s390x/s390-virtio-hcall.o
CC s390x-softmmu/hw/s390x/sclp.o
CC s390x-softmmu/hw/s390x/event-facility.o
CC s390x-softmmu/hw/s390x/sclpquiesce.o
CC ppc-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/hw/s390x/sclpcpu.o
CC ppc-softmmu/hw/virtio/vhost.o
CC s390x-softmmu/hw/s390x/ipl.o
CC s390x-softmmu/hw/s390x/css.o
CC ppc-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/virtio/vhost-user.o
CC s390x-softmmu/hw/s390x/s390-virtio-ccw.o
CC ppc-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/s390x/virtio-ccw.o
CC ppc-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/virtio/virtio-crypto-pci.o
CC s390x-softmmu/hw/s390x/css-bridge.o
CC ppc-softmmu/hw/ppc/ppc.o
CC s390x-softmmu/hw/s390x/ccw-device.o
CC s390x-softmmu/hw/s390x/s390-pci-bus.o
CC ppc-softmmu/hw/ppc/ppc_booke.o
CC ppc-softmmu/hw/ppc/fdt.o
CC s390x-softmmu/hw/s390x/s390-pci-inst.o
CC ppc-softmmu/hw/ppc/ppc405_boards.o
CC s390x-softmmu/hw/s390x/s390-skeys.o
CC ppc-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/hw/s390x/s390-skeys-kvm.o
CC ppc-softmmu/hw/ppc/ppc405_uc.o
CC s390x-softmmu/target/s390x/translate.o
CC ppc-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc-softmmu/hw/ppc/prep.o
CC ppc-softmmu/hw/ppc/prep_systemio.o
CC ppc-softmmu/hw/ppc/rs6000_mc.o
CC s390x-softmmu/target/s390x/helper.o
CC ppc-softmmu/hw/ppc/mac_oldworld.o
CC s390x-softmmu/target/s390x/cpu.o
CC ppc-softmmu/hw/ppc/mac_newworld.o
CC ppcemb-softmmu/target/ppc/machine.o
CC s390x-softmmu/target/s390x/interrupt.o
CC ppc-softmmu/hw/ppc/e500.o
CC s390x-softmmu/target/s390x/int_helper.o
CC ppcemb-softmmu/target/ppc/mmu_helper.o
CC ppc64-softmmu/target/ppc/machine.o
CC s390x-softmmu/target/s390x/fpu_helper.o
CC ppc-softmmu/hw/ppc/mpc8544ds.o
CC ppc-softmmu/hw/ppc/e500plat.o
CC ppc64-softmmu/target/ppc/mmu_helper.o
CC ppc-softmmu/hw/ppc/mpc8544_guts.o
CC ppcemb-softmmu/target/ppc/mmu-hash32.o
CC s390x-softmmu/target/s390x/cc_helper.o
CC ppc-softmmu/hw/ppc/ppce500_spin.o
CC ppcemb-softmmu/target/ppc/monitor.o
CC s390x-softmmu/target/s390x/mem_helper.o
CC ppc-softmmu/hw/ppc/virtex_ml507.o
CC ppcemb-softmmu/target/ppc/kvm-stub.o
CC ppc64-softmmu/target/ppc/mmu-hash32.o
CC ppcemb-softmmu/target/ppc/dfp_helper.o
CC ppc-softmmu/target/ppc/cpu-models.o
CC ppc64-softmmu/target/ppc/monitor.o
CC s390x-softmmu/target/s390x/misc_helper.o
CC ppcemb-softmmu/target/ppc/excp_helper.o
CC ppc64-softmmu/target/ppc/mmu-hash64.o
CC s390x-softmmu/target/s390x/gdbstub.o
CC ppc64-softmmu/target/ppc/arch_dump.o
CC ppcemb-softmmu/target/ppc/fpu_helper.o
CC s390x-softmmu/target/s390x/cpu_models.o
CC ppc64-softmmu/target/ppc/compat.o
CC ppc-softmmu/target/ppc/translate.o
CC s390x-softmmu/target/s390x/cpu_features.o
CC ppc64-softmmu/target/ppc/kvm-stub.o
CC s390x-softmmu/target/s390x/machine.o
CC ppc64-softmmu/target/ppc/dfp_helper.o
CC s390x-softmmu/target/s390x/ioinst.o
CC s390x-softmmu/target/s390x/arch_dump.o
CC ppc64-softmmu/target/ppc/excp_helper.o
CC s390x-softmmu/target/s390x/mmu_helper.o
CC s390x-softmmu/target/s390x/kvm.o
CC ppc64-softmmu/target/ppc/fpu_helper.o
GEN trace/generated-helpers.c
CC s390x-softmmu/trace/control-target.o
CC s390x-softmmu/gdbstub-xml.o
CC ppcemb-softmmu/target/ppc/int_helper.o
CC s390x-softmmu/trace/generated-helpers.o
LINK s390x-softmmu/qemu-system-s390x
CC ppcemb-softmmu/target/ppc/timebase_helper.o
CC ppc-softmmu/target/ppc/machine.o
CC ppcemb-softmmu/target/ppc/misc_helper.o
CC ppc-softmmu/target/ppc/mmu_helper.o
CC ppcemb-softmmu/target/ppc/mem_helper.o
CC ppc64-softmmu/target/ppc/int_helper.o
CC ppc64-softmmu/target/ppc/timebase_helper.o
CC ppcemb-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppcemb-softmmu/trace/control-target.o
CC ppcemb-softmmu/gdbstub-xml.o
GEN sh4eb-softmmu/hmp-commands.h
GEN sh4eb-softmmu/hmp-commands-info.h
GEN sh4eb-softmmu/config-target.h
CC sh4eb-softmmu/exec.o
CC ppc64-softmmu/target/ppc/misc_helper.o
CC ppcemb-softmmu/trace/generated-helpers.o
CC ppc64-softmmu/target/ppc/mem_helper.o
LINK ppcemb-softmmu/qemu-system-ppcemb
CC ppc64-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/trace/control-target.o
CC sh4eb-softmmu/translate-all.o
CC ppc64-softmmu/gdbstub-xml.o
CC sh4eb-softmmu/cpu-exec.o
CC sh4eb-softmmu/translate-common.o
CC ppc64-softmmu/trace/generated-helpers.o
CC ppc-softmmu/target/ppc/mmu-hash32.o
CC ppc-softmmu/target/ppc/monitor.o
CC sh4eb-softmmu/cpu-exec-common.o
CC sh4eb-softmmu/tcg/tcg.o
LINK ppc64-softmmu/qemu-system-ppc64
CC ppc-softmmu/target/ppc/kvm-stub.o
CC ppc-softmmu/target/ppc/dfp_helper.o
CC sh4eb-softmmu/tcg/tcg-op.o
CC ppc-softmmu/target/ppc/excp_helper.o
CC ppc-softmmu/target/ppc/fpu_helper.o
CC sh4eb-softmmu/tcg/optimize.o
GEN sh4-softmmu/hmp-commands.h
GEN sh4-softmmu/hmp-commands-info.h
GEN sh4-softmmu/config-target.h
CC sh4-softmmu/exec.o
CC sh4eb-softmmu/tcg/tcg-common.o
GEN sparc64-softmmu/hmp-commands.h
CC sh4eb-softmmu/fpu/softfloat.o
GEN sparc64-softmmu/hmp-commands-info.h
GEN sparc64-softmmu/config-target.h
CC sparc64-softmmu/exec.o
CC sh4-softmmu/translate-all.o
CC sh4-softmmu/cpu-exec.o
CC sh4-softmmu/translate-common.o
CC ppc-softmmu/target/ppc/int_helper.o
CC sparc64-softmmu/translate-all.o
CC sh4-softmmu/cpu-exec-common.o
CC sh4eb-softmmu/disas.o
CC sh4-softmmu/tcg/tcg.o
CC sh4eb-softmmu/tcg-runtime.o
CC sparc64-softmmu/cpu-exec.o
CC sh4eb-softmmu/hax-stub.o
CC sparc64-softmmu/translate-common.o
CC sh4eb-softmmu/kvm-stub.o
CC ppc-softmmu/target/ppc/timebase_helper.o
CC sparc64-softmmu/cpu-exec-common.o
CC ppc-softmmu/target/ppc/misc_helper.o
CC sh4eb-softmmu/arch_init.o
CC sparc64-softmmu/tcg/tcg.o
CC sh4-softmmu/tcg/tcg-op.o
CC ppc-softmmu/target/ppc/mem_helper.o
CC sh4eb-softmmu/cpus.o
CC sh4eb-softmmu/monitor.o
CC ppc-softmmu/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC sparc64-softmmu/tcg/tcg-op.o
CC ppc-softmmu/trace/control-target.o
CC ppc-softmmu/gdbstub-xml.o
CC sh4-softmmu/tcg/optimize.o
CC sh4eb-softmmu/gdbstub.o
CC ppc-softmmu/trace/generated-helpers.o
LINK ppc-softmmu/qemu-system-ppc
CC sh4-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/balloon.o
CC sh4-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/ioport.o
CC sh4eb-softmmu/numa.o
CC sparc64-softmmu/tcg/optimize.o
CC sh4eb-softmmu/qtest.o
GEN sparc-softmmu/hmp-commands.h
GEN sparc-softmmu/hmp-commands-info.h
GEN sparc-softmmu/config-target.h
CC sparc-softmmu/exec.o
CC sparc64-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/bootdevice.o
CC sparc64-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/memory.o
CC sh4-softmmu/disas.o
CC sh4-softmmu/tcg-runtime.o
CC sh4-softmmu/hax-stub.o
CC sh4-softmmu/kvm-stub.o
CC sh4eb-softmmu/cputlb.o
CC sh4-softmmu/arch_init.o
CC sparc-softmmu/translate-all.o
CC sh4-softmmu/cpus.o
CC sparc-softmmu/cpu-exec.o
CC sparc-softmmu/translate-common.o
CC sh4-softmmu/monitor.o
CC sh4eb-softmmu/memory_mapping.o
CC sparc-softmmu/cpu-exec-common.o
CC sparc64-softmmu/disas.o
CC sh4eb-softmmu/dump.o
CC sparc-softmmu/tcg/tcg.o
CC sparc64-softmmu/tcg-runtime.o
CC sparc64-softmmu/hax-stub.o
CC sh4-softmmu/gdbstub.o
CC sh4eb-softmmu/migration/ram.o
CC sparc64-softmmu/kvm-stub.o
CC sh4-softmmu/balloon.o
CC sparc64-softmmu/arch_init.o
CC sh4-softmmu/ioport.o
CC sparc64-softmmu/cpus.o
CC sh4eb-softmmu/migration/savevm.o
CC sparc-softmmu/tcg/tcg-op.o
CC sh4-softmmu/numa.o
CC sh4-softmmu/qtest.o
CC sparc64-softmmu/monitor.o
CC sh4eb-softmmu/xen-common-stub.o
CC sh4-softmmu/bootdevice.o
CC sh4eb-softmmu/xen-hvm-stub.o
CC sh4-softmmu/memory.o
CC sh4eb-softmmu/hw/9pfs/virtio-9p-device.o
CC sh4eb-softmmu/hw/block/tc58128.o
CC sparc64-softmmu/gdbstub.o
CC sh4-softmmu/cputlb.o
CC sh4eb-softmmu/hw/block/virtio-blk.o
CC sparc-softmmu/tcg/optimize.o
CC sparc64-softmmu/balloon.o
CC sh4eb-softmmu/hw/block/dataplane/virtio-blk.o
CC sparc64-softmmu/ioport.o
CC sparc64-softmmu/numa.o
CC sparc-softmmu/tcg/tcg-common.o
CC sh4eb-softmmu/hw/char/sh_serial.o
CC sparc-softmmu/fpu/softfloat.o
CC sh4eb-softmmu/hw/char/virtio-serial-bus.o
CC sparc64-softmmu/qtest.o
CC sh4-softmmu/memory_mapping.o
CC sh4eb-softmmu/hw/core/nmi.o
CC sparc64-softmmu/bootdevice.o
CC sh4-softmmu/dump.o
CC sh4eb-softmmu/hw/core/generic-loader.o
CC sparc64-softmmu/memory.o
CC sh4eb-softmmu/hw/core/null-machine.o
CC sh4-softmmu/migration/ram.o
CC sh4eb-softmmu/hw/cpu/core.o
CC sh4eb-softmmu/hw/display/sm501.o
CC sparc64-softmmu/cputlb.o
CC sh4-softmmu/migration/savevm.o
CC sparc-softmmu/disas.o
CC sh4eb-softmmu/hw/display/vga.o
CC sparc-softmmu/tcg-runtime.o
CC sh4-softmmu/xen-common-stub.o
CC sparc-softmmu/hax-stub.o
CC sh4eb-softmmu/hw/display/virtio-gpu.o
CC sparc-softmmu/kvm-stub.o
CC sh4-softmmu/xen-hvm-stub.o
CC sparc64-softmmu/memory_mapping.o
CC sparc-softmmu/arch_init.o
CC sh4-softmmu/hw/9pfs/virtio-9p-device.o
CC sparc64-softmmu/dump.o
CC sparc-softmmu/cpus.o
CC sh4-softmmu/hw/block/tc58128.o
CC sh4eb-softmmu/hw/display/virtio-gpu-3d.o
CC sh4-softmmu/hw/block/virtio-blk.o
CC sparc-softmmu/monitor.o
CC sparc64-softmmu/migration/ram.o
CC sh4eb-softmmu/hw/display/virtio-gpu-pci.o
CC sh4-softmmu/hw/block/dataplane/virtio-blk.o
CC sparc64-softmmu/migration/savevm.o
CC sh4eb-softmmu/hw/intc/sh_intc.o
CC sh4-softmmu/hw/char/sh_serial.o
CC sh4-softmmu/hw/char/virtio-serial-bus.o
CC sparc-softmmu/gdbstub.o
CC sh4eb-softmmu/hw/misc/ivshmem.o
CC sparc64-softmmu/xen-common-stub.o
CC sh4-softmmu/hw/core/nmi.o
CC sh4eb-softmmu/hw/misc/edu.o
CC sparc-softmmu/balloon.o
CC sparc64-softmmu/xen-hvm-stub.o
CC sh4-softmmu/hw/core/generic-loader.o
CC sh4eb-softmmu/hw/net/virtio-net.o
CC sparc64-softmmu/hw/9pfs/virtio-9p-device.o
CC sparc-softmmu/ioport.o
CC sh4-softmmu/hw/core/null-machine.o
CC sparc-softmmu/numa.o
CC sparc64-softmmu/hw/block/virtio-blk.o
CC sh4-softmmu/hw/cpu/core.o
CC sh4-softmmu/hw/display/sm501.o
CC sparc-softmmu/qtest.o
CC sh4eb-softmmu/hw/net/vhost_net.o
CC sparc64-softmmu/hw/block/dataplane/virtio-blk.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi.o
CC sparc64-softmmu/hw/char/virtio-serial-bus.o
CC sparc-softmmu/bootdevice.o
CC sh4-softmmu/hw/display/vga.o
CC sparc-softmmu/memory.o
CC sh4eb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc64-softmmu/hw/core/nmi.o
CC sh4eb-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/core/generic-loader.o
CC sh4-softmmu/hw/display/virtio-gpu.o
CC sh4eb-softmmu/hw/timer/sh_timer.o
CC sparc-softmmu/cputlb.o
CC sparc64-softmmu/hw/core/null-machine.o
CC sh4eb-softmmu/hw/timer/mc146818rtc.o
CC sparc64-softmmu/hw/cpu/core.o
CC sh4-softmmu/hw/display/virtio-gpu-3d.o
CC sparc64-softmmu/hw/display/vga.o
CC sh4eb-softmmu/hw/vfio/common.o
CC sparc-softmmu/memory_mapping.o
CC sh4-softmmu/hw/display/virtio-gpu-pci.o
CC sparc-softmmu/dump.o
CC sh4-softmmu/hw/intc/sh_intc.o
CC sh4eb-softmmu/hw/vfio/pci.o
CC sparc64-softmmu/hw/display/virtio-gpu.o
CC sh4-softmmu/hw/misc/ivshmem.o
CC sparc-softmmu/migration/ram.o
CC sh4-softmmu/hw/misc/edu.o
CC sparc64-softmmu/hw/display/virtio-gpu-3d.o
CC sh4-softmmu/hw/net/virtio-net.o
CC sh4eb-softmmu/hw/vfio/pci-quirks.o
CC sparc-softmmu/migration/savevm.o
CC sparc64-softmmu/hw/display/virtio-gpu-pci.o
CC sh4eb-softmmu/hw/vfio/platform.o
CC sh4-softmmu/hw/net/vhost_net.o
CC sh4eb-softmmu/hw/vfio/spapr.o
CC sparc64-softmmu/hw/misc/ivshmem.o
CC sh4-softmmu/hw/scsi/virtio-scsi.o
CC sh4eb-softmmu/hw/virtio/virtio.o
CC sparc-softmmu/xen-common-stub.o
CC sparc64-softmmu/hw/misc/edu.o
CC sparc-softmmu/xen-hvm-stub.o
CC sh4-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc-softmmu/hw/core/nmi.o
CC sh4-softmmu/hw/scsi/vhost-scsi.o
CC sparc64-softmmu/hw/net/virtio-net.o
CC sparc-softmmu/hw/core/generic-loader.o
CC sh4eb-softmmu/hw/virtio/virtio-balloon.o
CC sh4-softmmu/hw/timer/sh_timer.o
CC sparc-softmmu/hw/core/null-machine.o
CC sh4-softmmu/hw/timer/mc146818rtc.o
CC sparc-softmmu/hw/cpu/core.o
CC sh4eb-softmmu/hw/virtio/vhost.o
CC sh4-softmmu/hw/vfio/common.o
CC sparc-softmmu/hw/display/tcx.o
CC sparc64-softmmu/hw/net/vhost_net.o
CC sparc64-softmmu/hw/scsi/virtio-scsi.o
CC sh4eb-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/vfio/pci.o
CC sh4eb-softmmu/hw/virtio/vhost-user.o
CC sparc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC sparc-softmmu/hw/display/cg3.o
CC sparc64-softmmu/hw/scsi/vhost-scsi.o
CC sh4eb-softmmu/hw/virtio/vhost-vsock.o
CC sparc64-softmmu/hw/timer/mc146818rtc.o
CC sparc-softmmu/hw/intc/grlib_irqmp.o
CC sparc64-softmmu/hw/vfio/common.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/hw/misc/eccmemctl.o
CC sh4-softmmu/hw/vfio/pci-quirks.o
CC sh4eb-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc64-softmmu/hw/vfio/pci.o
CC sparc-softmmu/hw/misc/slavio_misc.o
CC sh4-softmmu/hw/vfio/platform.o
CC sh4eb-softmmu/hw/sh4/shix.o
CC sh4-softmmu/hw/vfio/spapr.o
CC sparc-softmmu/hw/net/vhost_net.o
CC sh4-softmmu/hw/virtio/virtio.o
CC sparc64-softmmu/hw/vfio/pci-quirks.o
CC sh4eb-softmmu/hw/sh4/r2d.o
CC sparc-softmmu/hw/net/rocker/qmp-norocker.o
CC sparc-softmmu/hw/vfio/common.o
CC sh4eb-softmmu/hw/sh4/sh7750.o
CC sparc64-softmmu/hw/vfio/platform.o
CC sh4-softmmu/hw/virtio/virtio-balloon.o
CC sparc-softmmu/hw/vfio/platform.o
CC sh4eb-softmmu/hw/sh4/sh7750_regnames.o
CC sparc64-softmmu/hw/vfio/spapr.o
CC sh4-softmmu/hw/virtio/vhost.o
CC sparc-softmmu/hw/vfio/spapr.o
CC sh4eb-softmmu/hw/sh4/sh_pci.o
CC sparc64-softmmu/hw/virtio/virtio.o
CC sparc-softmmu/hw/sparc/sun4m.o
CC sh4eb-softmmu/target/sh4/translate.o
CC sh4-softmmu/hw/virtio/vhost-backend.o
CC sparc-softmmu/hw/sparc/leon3.o
CC sh4-softmmu/hw/virtio/vhost-user.o
CC sparc64-softmmu/hw/virtio/virtio-balloon.o
CC sh4-softmmu/hw/virtio/vhost-vsock.o
CC sparc-softmmu/target/sparc/machine.o
CC sparc64-softmmu/hw/virtio/vhost.o
CC sh4-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/target/sparc/monitor.o
CC sh4-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc-softmmu/target/sparc/translate.o
CC sparc64-softmmu/hw/virtio/vhost-backend.o
CC sh4-softmmu/hw/sh4/shix.o
CC sh4-softmmu/hw/sh4/r2d.o
CC sparc64-softmmu/hw/virtio/vhost-user.o
CC sh4eb-softmmu/target/sh4/op_helper.o
CC sh4-softmmu/hw/sh4/sh7750.o
CC sh4-softmmu/hw/sh4/sh7750_regnames.o
CC sparc64-softmmu/hw/virtio/vhost-vsock.o
CC sh4eb-softmmu/target/sh4/helper.o
CC sh4-softmmu/hw/sh4/sh_pci.o
CC sparc-softmmu/target/sparc/helper.o
CC sparc64-softmmu/hw/virtio/virtio-crypto.o
CC sparc-softmmu/target/sparc/cpu.o
CC sh4-softmmu/target/sh4/translate.o
CC sh4eb-softmmu/target/sh4/cpu.o
CC sparc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC sparc-softmmu/target/sparc/fop_helper.o
CC sh4eb-softmmu/target/sh4/monitor.o
CC sparc-softmmu/target/sparc/cc_helper.o
CC sh4eb-softmmu/target/sh4/gdbstub.o
CC sparc64-softmmu/hw/sparc64/sparc64.o
CC sparc-softmmu/target/sparc/win_helper.o
CC sparc64-softmmu/hw/sparc64/sun4u.o
GEN trace/generated-helpers.c
CC sh4eb-softmmu/trace/control-target.o
CC sparc-softmmu/target/sparc/mmu_helper.o
CC sparc-softmmu/target/sparc/ldst_helper.o
CC sh4eb-softmmu/trace/generated-helpers.o
CC sparc-softmmu/target/sparc/int32_helper.o
CC sparc64-softmmu/hw/sparc64/niagara.o
CC sparc-softmmu/target/sparc/gdbstub.o
LINK sh4eb-softmmu/qemu-system-sh4eb
CC sparc64-softmmu/target/sparc/machine.o
GEN trace/generated-helpers.c
CC sparc-softmmu/trace/control-target.o
CC sh4-softmmu/target/sh4/op_helper.o
CC sparc64-softmmu/target/sparc/monitor.o
CC sparc-softmmu/trace/generated-helpers.o
CC sh4-softmmu/target/sh4/helper.o
CC sparc64-softmmu/target/sparc/translate.o
LINK sparc-softmmu/qemu-system-sparc
CC sh4-softmmu/target/sh4/cpu.o
CC sh4-softmmu/target/sh4/monitor.o
CC sh4-softmmu/target/sh4/gdbstub.o
GEN trace/generated-helpers.c
CC sh4-softmmu/trace/control-target.o
GEN tricore-softmmu/hmp-commands.h
GEN tricore-softmmu/hmp-commands-info.h
GEN tricore-softmmu/config-target.h
CC tricore-softmmu/exec.o
CC sh4-softmmu/trace/generated-helpers.o
GEN unicore32-softmmu/hmp-commands.h
GEN unicore32-softmmu/hmp-commands-info.h
GEN unicore32-softmmu/config-target.h
CC unicore32-softmmu/exec.o
LINK sh4-softmmu/qemu-system-sh4
CC sparc64-softmmu/target/sparc/helper.o
CC sparc64-softmmu/target/sparc/cpu.o
CC sparc64-softmmu/target/sparc/fop_helper.o
CC sparc64-softmmu/target/sparc/cc_helper.o
CC tricore-softmmu/translate-all.o
CC sparc64-softmmu/target/sparc/win_helper.o
CC tricore-softmmu/cpu-exec.o
CC sparc64-softmmu/target/sparc/mmu_helper.o
CC unicore32-softmmu/translate-all.o
CC sparc64-softmmu/target/sparc/ldst_helper.o
CC tricore-softmmu/translate-common.o
GEN x86_64-softmmu/hmp-commands.h
CC sparc64-softmmu/target/sparc/int64_helper.o
GEN x86_64-softmmu/hmp-commands-info.h
CC unicore32-softmmu/cpu-exec.o
GEN x86_64-softmmu/config-target.h
CC tricore-softmmu/cpu-exec-common.o
CC sparc64-softmmu/target/sparc/vis_helper.o
CC x86_64-softmmu/exec.o
CC tricore-softmmu/tcg/tcg.o
CC unicore32-softmmu/translate-common.o
CC sparc64-softmmu/target/sparc/gdbstub.o
CC unicore32-softmmu/cpu-exec-common.o
GEN trace/generated-helpers.c
CC sparc64-softmmu/trace/control-target.o
CC unicore32-softmmu/tcg/tcg.o
CC sparc64-softmmu/trace/generated-helpers.o
LINK sparc64-softmmu/qemu-system-sparc64
CC x86_64-softmmu/translate-all.o
CC tricore-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/cpu-exec.o
CC unicore32-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/translate-common.o
CC x86_64-softmmu/cpu-exec-common.o
CC x86_64-softmmu/tcg/tcg.o
GEN xtensaeb-softmmu/hmp-commands.h
GEN xtensaeb-softmmu/hmp-commands-info.h
GEN xtensaeb-softmmu/config-target.h
CC xtensaeb-softmmu/exec.o
CC tricore-softmmu/tcg/optimize.o
CC unicore32-softmmu/tcg/optimize.o
CC tricore-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/tcg/tcg-op.o
CC tricore-softmmu/fpu/softfloat.o
CC xtensaeb-softmmu/translate-all.o
CC unicore32-softmmu/tcg/tcg-common.o
CC unicore32-softmmu/fpu/softfloat.o
CC xtensaeb-softmmu/cpu-exec.o
CC xtensaeb-softmmu/translate-common.o
CC xtensaeb-softmmu/cpu-exec-common.o
CC x86_64-softmmu/tcg/optimize.o
CC xtensaeb-softmmu/tcg/tcg.o
CC tricore-softmmu/disas.o
CC tricore-softmmu/tcg-runtime.o
CC tricore-softmmu/hax-stub.o
CC x86_64-softmmu/tcg/tcg-common.o
CC xtensaeb-softmmu/tcg/tcg-op.o
CC tricore-softmmu/kvm-stub.o
CC unicore32-softmmu/disas.o
CC x86_64-softmmu/fpu/softfloat.o
CC tricore-softmmu/arch_init.o
CC unicore32-softmmu/tcg-runtime.o
CC tricore-softmmu/cpus.o
CC unicore32-softmmu/hax-stub.o
CC unicore32-softmmu/kvm-stub.o
CC tricore-softmmu/monitor.o
CC unicore32-softmmu/arch_init.o
CC unicore32-softmmu/cpus.o
CC tricore-softmmu/gdbstub.o
CC xtensaeb-softmmu/tcg/optimize.o
CC unicore32-softmmu/monitor.o
CC x86_64-softmmu/disas.o
CC tricore-softmmu/balloon.o
CC x86_64-softmmu/tcg-runtime.o
CC tricore-softmmu/ioport.o
CC xtensaeb-softmmu/tcg/tcg-common.o
CC tricore-softmmu/numa.o
CC x86_64-softmmu/hax-stub.o
CC xtensaeb-softmmu/fpu/softfloat.o
CC x86_64-softmmu/kvm-stub.o
CC tricore-softmmu/qtest.o
CC x86_64-softmmu/arch_init.o
CC unicore32-softmmu/gdbstub.o
CC tricore-softmmu/bootdevice.o
CC x86_64-softmmu/cpus.o
CC unicore32-softmmu/balloon.o
CC tricore-softmmu/memory.o
CC unicore32-softmmu/ioport.o
CC x86_64-softmmu/monitor.o
CC unicore32-softmmu/numa.o
CC tricore-softmmu/cputlb.o
CC unicore32-softmmu/qtest.o
CC xtensaeb-softmmu/disas.o
CC xtensaeb-softmmu/tcg-runtime.o
CC unicore32-softmmu/bootdevice.o
CC x86_64-softmmu/gdbstub.o
CC xtensaeb-softmmu/hax-stub.o
CC unicore32-softmmu/memory.o
CC xtensaeb-softmmu/kvm-stub.o
CC tricore-softmmu/memory_mapping.o
CC xtensaeb-softmmu/arch_init.o
CC x86_64-softmmu/balloon.o
CC tricore-softmmu/dump.o
CC xtensaeb-softmmu/cpus.o
CC x86_64-softmmu/ioport.o
CC unicore32-softmmu/cputlb.o
CC x86_64-softmmu/numa.o
CC tricore-softmmu/migration/ram.o
CC xtensaeb-softmmu/monitor.o
CC x86_64-softmmu/qtest.o
CC x86_64-softmmu/bootdevice.o
CC tricore-softmmu/migration/savevm.o
CC unicore32-softmmu/memory_mapping.o
CC xtensaeb-softmmu/gdbstub.o
CC x86_64-softmmu/memory.o
CC unicore32-softmmu/dump.o
CC xtensaeb-softmmu/balloon.o
CC tricore-softmmu/xen-common-stub.o
CC tricore-softmmu/xen-hvm-stub.o
CC xtensaeb-softmmu/ioport.o
CC unicore32-softmmu/migration/ram.o
CC tricore-softmmu/hw/core/nmi.o
CC tricore-softmmu/hw/core/generic-loader.o
CC x86_64-softmmu/cputlb.o
CC xtensaeb-softmmu/numa.o
CC tricore-softmmu/hw/core/null-machine.o
CC unicore32-softmmu/migration/savevm.o
CC tricore-softmmu/hw/cpu/core.o
CC xtensaeb-softmmu/qtest.o
CC tricore-softmmu/hw/net/vhost_net.o
CC xtensaeb-softmmu/bootdevice.o
CC tricore-softmmu/hw/net/rocker/qmp-norocker.o
CC tricore-softmmu/hw/vfio/common.o
CC x86_64-softmmu/memory_mapping.o
CC xtensaeb-softmmu/memory.o
CC unicore32-softmmu/xen-common-stub.o
CC x86_64-softmmu/dump.o
CC tricore-softmmu/hw/vfio/platform.o
CC unicore32-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/hw/core/nmi.o
CC tricore-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/migration/ram.o
CC tricore-softmmu/hw/tricore/tricore_testboard.o
CC unicore32-softmmu/hw/core/generic-loader.o
CC xtensaeb-softmmu/cputlb.o
CC tricore-softmmu/target/tricore/translate.o
CC unicore32-softmmu/hw/core/null-machine.o
CC x86_64-softmmu/migration/savevm.o
CC unicore32-softmmu/hw/cpu/core.o
CC unicore32-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/xen-common-stub.o
CC unicore32-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensaeb-softmmu/memory_mapping.o
CC x86_64-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/hw/vfio/common.o
CC xtensaeb-softmmu/dump.o
CC x86_64-softmmu/hw/9pfs/virtio-9p-device.o
CC unicore32-softmmu/hw/vfio/platform.o
CC x86_64-softmmu/hw/block/virtio-blk.o
CC xtensaeb-softmmu/migration/ram.o
CC unicore32-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o
CC unicore32-softmmu/hw/unicore32/puv3.o
CC xtensaeb-softmmu/migration/savevm.o
CC x86_64-softmmu/hw/char/virtio-serial-bus.o
CC unicore32-softmmu/target/unicore32/translate.o
CC x86_64-softmmu/hw/core/nmi.o
CC x86_64-softmmu/hw/core/generic-loader.o
CC tricore-softmmu/target/tricore/helper.o
CC xtensaeb-softmmu/xen-common-stub.o
CC tricore-softmmu/target/tricore/cpu.o
CC x86_64-softmmu/hw/core/null-machine.o
CC xtensaeb-softmmu/xen-hvm-stub.o
CC unicore32-softmmu/target/unicore32/op_helper.o
CC tricore-softmmu/target/tricore/op_helper.o
CC x86_64-softmmu/hw/cpu/core.o
CC xtensaeb-softmmu/hw/core/nmi.o
CC unicore32-softmmu/target/unicore32/helper.o
CC x86_64-softmmu/hw/display/vga.o
CC xtensaeb-softmmu/hw/core/generic-loader.o
CC unicore32-softmmu/target/unicore32/cpu.o
CC xtensaeb-softmmu/hw/core/null-machine.o
CC unicore32-softmmu/target/unicore32/ucf64_helper.o
CC xtensaeb-softmmu/hw/cpu/core.o
CC tricore-softmmu/target/tricore/fpu_helper.o
CC unicore32-softmmu/target/unicore32/softmmu.o
CC xtensaeb-softmmu/hw/net/vhost_net.o
GEN trace/generated-helpers.c
CC tricore-softmmu/trace/control-target.o
CC x86_64-softmmu/hw/display/virtio-gpu.o
GEN trace/generated-helpers.c
CC unicore32-softmmu/trace/control-target.o
CC xtensaeb-softmmu/hw/net/rocker/qmp-norocker.o
CC tricore-softmmu/trace/generated-helpers.o
CC xtensaeb-softmmu/hw/vfio/common.o
LINK tricore-softmmu/qemu-system-tricore
CC unicore32-softmmu/trace/generated-helpers.o
CC x86_64-softmmu/hw/display/virtio-gpu-3d.o
LINK unicore32-softmmu/qemu-system-unicore32
CC xtensaeb-softmmu/hw/vfio/platform.o
CC xtensaeb-softmmu/hw/vfio/spapr.o
CC x86_64-softmmu/hw/display/virtio-gpu-pci.o
CC xtensaeb-softmmu/hw/xtensa/pic_cpu.o
CC xtensaeb-softmmu/hw/xtensa/sim.o
CC x86_64-softmmu/hw/display/virtio-vga.o
CC x86_64-softmmu/hw/intc/apic.o
CC xtensaeb-softmmu/hw/xtensa/xtfpga.o
GEN xtensa-softmmu/hmp-commands.h
GEN xtensa-softmmu/hmp-commands-info.h
GEN xtensa-softmmu/config-target.h
CC xtensaeb-softmmu/target/xtensa/xtensa-semi.o
CC x86_64-softmmu/hw/intc/apic_common.o
CC xtensa-softmmu/exec.o
CC xtensaeb-softmmu/target/xtensa/core-dc232b.o
CC x86_64-softmmu/hw/intc/ioapic.o
CC xtensaeb-softmmu/target/xtensa/core-dc233c.o
CC xtensa-softmmu/translate-all.o
CC x86_64-softmmu/hw/isa/lpc_ich9.o
CC xtensaeb-softmmu/target/xtensa/core-fsf.o
CC xtensa-softmmu/cpu-exec.o
CC x86_64-softmmu/hw/misc/vmport.o
CC xtensa-softmmu/translate-common.o
CC xtensaeb-softmmu/target/xtensa/monitor.o
CC x86_64-softmmu/hw/misc/ivshmem.o
CC xtensa-softmmu/cpu-exec-common.o
CC xtensaeb-softmmu/target/xtensa/translate.o
CC xtensa-softmmu/tcg/tcg.o
CC x86_64-softmmu/hw/misc/pvpanic.o
CC x86_64-softmmu/hw/misc/edu.o
GEN aarch64-linux-user/config-target.h
CC x86_64-softmmu/hw/net/virtio-net.o
CC aarch64-linux-user/exec.o
CC aarch64-linux-user/translate-all.o
CC x86_64-softmmu/hw/net/vhost_net.o
CC x86_64-softmmu/hw/scsi/virtio-scsi.o
CC xtensaeb-softmmu/target/xtensa/op_helper.o
CC aarch64-linux-user/cpu-exec.o
CC xtensa-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC x86_64-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-linux-user/translate-common.o
CC xtensaeb-softmmu/target/xtensa/helper.o
CC x86_64-softmmu/hw/timer/mc146818rtc.o
CC aarch64-linux-user/cpu-exec-common.o
CC xtensaeb-softmmu/target/xtensa/cpu.o
CC aarch64-linux-user/tcg/tcg.o
CC xtensaeb-softmmu/target/xtensa/gdbstub.o
CC x86_64-softmmu/hw/vfio/common.o
GEN trace/generated-helpers.c
CC xtensaeb-softmmu/trace/control-target.o
CC xtensa-softmmu/tcg/optimize.o
CC xtensaeb-softmmu/trace/generated-helpers.o
CC x86_64-softmmu/hw/vfio/pci.o
LINK xtensaeb-softmmu/qemu-system-xtensaeb
CC xtensa-softmmu/tcg/tcg-common.o
CC aarch64-linux-user/tcg/tcg-op.o
CC xtensa-softmmu/fpu/softfloat.o
CC x86_64-softmmu/hw/vfio/pci-quirks.o
CC x86_64-softmmu/hw/vfio/platform.o
GEN alpha-linux-user/config-target.h
CC alpha-linux-user/exec.o
CC x86_64-softmmu/hw/vfio/spapr.o
CC alpha-linux-user/translate-all.o
CC x86_64-softmmu/hw/virtio/virtio.o
CC alpha-linux-user/cpu-exec.o
CC aarch64-linux-user/tcg/optimize.o
CC alpha-linux-user/translate-common.o
CC xtensa-softmmu/disas.o
CC alpha-linux-user/cpu-exec-common.o
CC x86_64-softmmu/hw/virtio/virtio-balloon.o
CC xtensa-softmmu/tcg-runtime.o
CC alpha-linux-user/tcg/tcg.o
CC xtensa-softmmu/hax-stub.o
CC x86_64-softmmu/hw/virtio/vhost.o
CC aarch64-linux-user/tcg/tcg-common.o
CC xtensa-softmmu/kvm-stub.o
CC aarch64-linux-user/fpu/softfloat.o
CC xtensa-softmmu/arch_init.o
CC xtensa-softmmu/cpus.o
CC x86_64-softmmu/hw/virtio/vhost-backend.o
CC xtensa-softmmu/monitor.o
CC alpha-linux-user/tcg/tcg-op.o
CC x86_64-softmmu/hw/virtio/vhost-user.o
CC x86_64-softmmu/hw/virtio/vhost-vsock.o
CC x86_64-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-linux-user/disas.o
CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o
CC xtensa-softmmu/gdbstub.o
CC aarch64-linux-user/tcg-runtime.o
CC alpha-linux-user/tcg/optimize.o
CC x86_64-softmmu/hw/i386/multiboot.o
CC x86_64-softmmu/hw/i386/pc.o
CC xtensa-softmmu/balloon.o
GEN aarch64-linux-user/gdbstub-xml.c
CC xtensa-softmmu/ioport.o
CC alpha-linux-user/tcg/tcg-common.o
CC x86_64-softmmu/hw/i386/pc_piix.o
CC xtensa-softmmu/numa.o
CC aarch64-linux-user/hax-stub.o
CC alpha-linux-user/fpu/softfloat.o
CC aarch64-linux-user/kvm-stub.o
CC xtensa-softmmu/qtest.o
CC x86_64-softmmu/hw/i386/pc_q35.o
CC aarch64-linux-user/gdbstub.o
CC xtensa-softmmu/bootdevice.o
CC x86_64-softmmu/hw/i386/pc_sysfw.o
CC xtensa-softmmu/memory.o
CC aarch64-linux-user/thunk.o
CC x86_64-softmmu/hw/i386/x86-iommu.o
CC x86_64-softmmu/hw/i386/intel_iommu.o
CC aarch64-linux-user/user-exec.o
CC aarch64-linux-user/user-exec-stub.o
CC xtensa-softmmu/cputlb.o
CC alpha-linux-user/disas.o
CC aarch64-linux-user/linux-user/main.o
CC x86_64-softmmu/hw/i386/amd_iommu.o
CC alpha-linux-user/tcg-runtime.o
CC aarch64-linux-user/linux-user/syscall.o
CC x86_64-softmmu/hw/i386/kvmvapic.o
CC alpha-linux-user/hax-stub.o
CC xtensa-softmmu/memory_mapping.o
CC alpha-linux-user/kvm-stub.o
CC x86_64-softmmu/hw/i386/acpi-build.o
CC xtensa-softmmu/dump.o
CC alpha-linux-user/gdbstub.o
CC xtensa-softmmu/migration/ram.o
CC alpha-linux-user/thunk.o
CC x86_64-softmmu/hw/i386/pci-assign-load-rom.o
CC alpha-linux-user/user-exec.o
CC x86_64-softmmu/target/i386/translate.o
CC xtensa-softmmu/migration/savevm.o
CC alpha-linux-user/user-exec-stub.o
CC alpha-linux-user/linux-user/main.o
CC aarch64-linux-user/linux-user/strace.o
CC xtensa-softmmu/xen-common-stub.o
CC alpha-linux-user/linux-user/syscall.o
CC xtensa-softmmu/xen-hvm-stub.o
CC aarch64-linux-user/linux-user/mmap.o
CC xtensa-softmmu/hw/core/nmi.o
CC xtensa-softmmu/hw/core/generic-loader.o
CC aarch64-linux-user/linux-user/signal.o
CC xtensa-softmmu/hw/core/null-machine.o
CC aarch64-linux-user/linux-user/elfload.o
CC xtensa-softmmu/hw/cpu/core.o
CC xtensa-softmmu/hw/net/vhost_net.o
CC aarch64-linux-user/linux-user/linuxload.o
CC xtensa-softmmu/hw/net/rocker/qmp-norocker.o
CC xtensa-softmmu/hw/vfio/common.o
CC aarch64-linux-user/linux-user/uaccess.o
CC alpha-linux-user/linux-user/strace.o
CC aarch64-linux-user/linux-user/uname.o
CCAS aarch64-linux-user/linux-user/safe-syscall.o
CC xtensa-softmmu/hw/vfio/platform.o
CC aarch64-linux-user/linux-user/flatload.o
CC alpha-linux-user/linux-user/mmap.o
CC aarch64-linux-user/target/arm/arm-semi.o
CC xtensa-softmmu/hw/vfio/spapr.o
CC alpha-linux-user/linux-user/signal.o
CC x86_64-softmmu/target/i386/helper.o
CC aarch64-linux-user/target/arm/kvm-stub.o
CC xtensa-softmmu/hw/xtensa/pic_cpu.o
CC aarch64-linux-user/target/arm/translate.o
CC alpha-linux-user/linux-user/elfload.o
CC x86_64-softmmu/target/i386/cpu.o
CC xtensa-softmmu/hw/xtensa/sim.o
CC xtensa-softmmu/hw/xtensa/xtfpga.o
CC alpha-linux-user/linux-user/linuxload.o
CC xtensa-softmmu/target/xtensa/xtensa-semi.o
CC alpha-linux-user/linux-user/uaccess.o
CC x86_64-softmmu/target/i386/bpt_helper.o
CC alpha-linux-user/linux-user/uname.o
CC xtensa-softmmu/target/xtensa/core-dc232b.o
CC x86_64-softmmu/target/i386/excp_helper.o
CC xtensa-softmmu/target/xtensa/core-dc233c.o
CCAS alpha-linux-user/linux-user/safe-syscall.o
CC xtensa-softmmu/target/xtensa/core-fsf.o
CC x86_64-softmmu/target/i386/fpu_helper.o
CC alpha-linux-user/target/alpha/translate.o
CC xtensa-softmmu/target/xtensa/monitor.o
CC xtensa-softmmu/target/xtensa/translate.o
CC alpha-linux-user/target/alpha/helper.o
CC alpha-linux-user/target/alpha/cpu.o
CC alpha-linux-user/target/alpha/int_helper.o
CC xtensa-softmmu/target/xtensa/op_helper.o
CC alpha-linux-user/target/alpha/fpu_helper.o
CC x86_64-softmmu/target/i386/cc_helper.o
CC alpha-linux-user/target/alpha/vax_helper.o
CC xtensa-softmmu/target/xtensa/helper.o
CC x86_64-softmmu/target/i386/int_helper.o
CC aarch64-linux-user/target/arm/op_helper.o
CC alpha-linux-user/target/alpha/sys_helper.o
CC xtensa-softmmu/target/xtensa/cpu.o
CC alpha-linux-user/target/alpha/mem_helper.o
CC xtensa-softmmu/target/xtensa/gdbstub.o
CC x86_64-softmmu/target/i386/svm_helper.o
CC alpha-linux-user/target/alpha/gdbstub.o
CC aarch64-linux-user/target/arm/helper.o
GEN trace/generated-helpers.c
CC xtensa-softmmu/trace/control-target.o
GEN trace/generated-helpers.c
CC alpha-linux-user/trace/control-target.o
CC x86_64-softmmu/target/i386/smm_helper.o
CC xtensa-softmmu/trace/generated-helpers.o
CC alpha-linux-user/trace/generated-helpers.o
CC x86_64-softmmu/target/i386/misc_helper.o
LINK xtensa-softmmu/qemu-system-xtensa
LINK alpha-linux-user/qemu-alpha
CC x86_64-softmmu/target/i386/mem_helper.o
CC x86_64-softmmu/target/i386/seg_helper.o
GEN armeb-linux-user/config-target.h
CC armeb-linux-user/exec.o
CC aarch64-linux-user/target/arm/cpu.o
CC aarch64-linux-user/target/arm/neon_helper.o
GEN arm-linux-user/config-target.h
CC armeb-linux-user/translate-all.o
CC arm-linux-user/exec.o
CC arm-linux-user/translate-all.o
CC armeb-linux-user/cpu-exec.o
CC aarch64-linux-user/target/arm/iwmmxt_helper.o
CC arm-linux-user/cpu-exec.o
CC armeb-linux-user/translate-common.o
CC x86_64-softmmu/target/i386/mpx_helper.o
CC arm-linux-user/translate-common.o
CC armeb-linux-user/cpu-exec-common.o
CC aarch64-linux-user/target/arm/gdbstub.o
CC arm-linux-user/cpu-exec-common.o
CC x86_64-softmmu/target/i386/gdbstub.o
CC armeb-linux-user/tcg/tcg.o
CC aarch64-linux-user/target/arm/cpu64.o
CC arm-linux-user/tcg/tcg.o
CC x86_64-softmmu/target/i386/machine.o
CC aarch64-linux-user/target/arm/translate-a64.o
CC x86_64-softmmu/target/i386/arch_memory_mapping.o
CC x86_64-softmmu/target/i386/arch_dump.o
CC x86_64-softmmu/target/i386/monitor.o
CC armeb-linux-user/tcg/tcg-op.o
CC x86_64-softmmu/target/i386/kvm-stub.o
CC arm-linux-user/tcg/tcg-op.o
GEN trace/generated-helpers.c
CC x86_64-softmmu/trace/control-target.o
CC x86_64-softmmu/trace/generated-helpers.o
LINK x86_64-softmmu/qemu-system-x86_64
CC aarch64-linux-user/target/arm/helper-a64.o
CC armeb-linux-user/tcg/optimize.o
CC arm-linux-user/tcg/optimize.o
CC aarch64-linux-user/target/arm/gdbstub64.o
CC aarch64-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC aarch64-linux-user/trace/control-target.o
CC arm-linux-user/tcg/tcg-common.o
CC arm-linux-user/fpu/softfloat.o
CC armeb-linux-user/tcg/tcg-common.o
CC aarch64-linux-user/gdbstub-xml.o
CC arm-linux-user/disas.o
CC armeb-linux-user/fpu/softfloat.o
CC aarch64-linux-user/trace/generated-helpers.o
CC arm-linux-user/tcg-runtime.o
LINK aarch64-linux-user/qemu-aarch64
GEN arm-linux-user/gdbstub-xml.c
GEN cris-linux-user/config-target.h
CC cris-linux-user/exec.o
CC arm-linux-user/hax-stub.o
CC cris-linux-user/translate-all.o
CC cris-linux-user/cpu-exec.o
CC arm-linux-user/kvm-stub.o
CC armeb-linux-user/disas.o
CC arm-linux-user/gdbstub.o
CC armeb-linux-user/tcg-runtime.o
CC cris-linux-user/translate-common.o
CC cris-linux-user/cpu-exec-common.o
GEN armeb-linux-user/gdbstub-xml.c
CC armeb-linux-user/hax-stub.o
CC arm-linux-user/thunk.o
CC cris-linux-user/tcg/tcg.o
CC armeb-linux-user/kvm-stub.o
CC arm-linux-user/user-exec.o
CC cris-linux-user/tcg/tcg-op.o
CC arm-linux-user/user-exec-stub.o
CC armeb-linux-user/gdbstub.o
CC arm-linux-user/linux-user/main.o
CC armeb-linux-user/thunk.o
CC arm-linux-user/linux-user/syscall.o
CC armeb-linux-user/user-exec.o
CC armeb-linux-user/user-exec-stub.o
CC armeb-linux-user/linux-user/main.o
CC cris-linux-user/tcg/optimize.o
GEN hppa-linux-user/config-target.h
CC hppa-linux-user/exec.o
CC armeb-linux-user/linux-user/syscall.o
CC cris-linux-user/tcg/tcg-common.o
CC hppa-linux-user/translate-all.o
CC cris-linux-user/fpu/softfloat.o
CC hppa-linux-user/cpu-exec.o
CC hppa-linux-user/translate-common.o
CC hppa-linux-user/cpu-exec-common.o
CC hppa-linux-user/tcg/tcg.o
CC arm-linux-user/linux-user/strace.o
CC cris-linux-user/disas.o
CC arm-linux-user/linux-user/mmap.o
CC cris-linux-user/tcg-runtime.o
CC hppa-linux-user/tcg/tcg-op.o
CC arm-linux-user/linux-user/signal.o
CC armeb-linux-user/linux-user/strace.o
CC cris-linux-user/hax-stub.o
CC arm-linux-user/linux-user/elfload.o
CC cris-linux-user/kvm-stub.o
CC armeb-linux-user/linux-user/mmap.o
CC cris-linux-user/gdbstub.o
CC arm-linux-user/linux-user/linuxload.o
CC armeb-linux-user/linux-user/signal.o
CC cris-linux-user/thunk.o
CC arm-linux-user/linux-user/uaccess.o
CC armeb-linux-user/linux-user/elfload.o
CC cris-linux-user/user-exec.o
CC cris-linux-user/user-exec-stub.o
CC arm-linux-user/linux-user/uname.o
CC hppa-linux-user/tcg/optimize.o
CC cris-linux-user/linux-user/main.o
CCAS arm-linux-user/linux-user/safe-syscall.o
CC arm-linux-user/linux-user/flatload.o
CC armeb-linux-user/linux-user/linuxload.o
CC cris-linux-user/linux-user/syscall.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11.o
CC armeb-linux-user/linux-user/uaccess.o
CC hppa-linux-user/tcg/tcg-common.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC armeb-linux-user/linux-user/uname.o
CC hppa-linux-user/fpu/softfloat.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CCAS armeb-linux-user/linux-user/safe-syscall.o
CC armeb-linux-user/linux-user/flatload.o
CC arm-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11.o
CC arm-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cpdt.o
CC arm-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC hppa-linux-user/disas.o
CC arm-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpa11_cprt.o
CC hppa-linux-user/tcg-runtime.o
CC arm-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC armeb-linux-user/linux-user/arm/nwfpe/fpopcode.o
CC arm-linux-user/target/arm/arm-semi.o
CC armeb-linux-user/linux-user/arm/nwfpe/single_cpdo.o
CC hppa-linux-user/hax-stub.o
CC cris-linux-user/linux-user/strace.o
CC armeb-linux-user/linux-user/arm/nwfpe/double_cpdo.o
CC hppa-linux-user/kvm-stub.o
CC arm-linux-user/target/arm/kvm-stub.o
CC armeb-linux-user/linux-user/arm/nwfpe/extended_cpdo.o
CC hppa-linux-user/gdbstub.o
CC arm-linux-user/target/arm/translate.o
CC cris-linux-user/linux-user/mmap.o
CC armeb-linux-user/target/arm/arm-semi.o
CC hppa-linux-user/thunk.o
CC cris-linux-user/linux-user/signal.o
CC armeb-linux-user/target/arm/kvm-stub.o
CC hppa-linux-user/user-exec.o
CC cris-linux-user/linux-user/elfload.o
CC armeb-linux-user/target/arm/translate.o
CC hppa-linux-user/user-exec-stub.o
CC hppa-linux-user/linux-user/main.o
CC cris-linux-user/linux-user/linuxload.o
CC hppa-linux-user/linux-user/syscall.o
CC cris-linux-user/linux-user/uaccess.o
CC cris-linux-user/linux-user/uname.o
CCAS cris-linux-user/linux-user/safe-syscall.o
CC cris-linux-user/target/cris/translate.o
CC arm-linux-user/target/arm/op_helper.o
CC cris-linux-user/target/cris/op_helper.o
CC hppa-linux-user/linux-user/strace.o
CC arm-linux-user/target/arm/helper.o
CC cris-linux-user/target/cris/helper.o
CC cris-linux-user/target/cris/cpu.o
CC hppa-linux-user/linux-user/mmap.o
CC cris-linux-user/target/cris/gdbstub.o
CC armeb-linux-user/target/arm/op_helper.o
GEN trace/generated-helpers.c
CC cris-linux-user/trace/control-target.o
CC hppa-linux-user/linux-user/signal.o
CC arm-linux-user/target/arm/cpu.o
CC hppa-linux-user/linux-user/elfload.o
CC cris-linux-user/trace/generated-helpers.o
CC armeb-linux-user/target/arm/helper.o
CC arm-linux-user/target/arm/neon_helper.o
LINK cris-linux-user/qemu-cris
CC hppa-linux-user/linux-user/linuxload.o
CC hppa-linux-user/linux-user/uaccess.o
CC armeb-linux-user/target/arm/cpu.o
CC hppa-linux-user/linux-user/uname.o
CCAS hppa-linux-user/linux-user/safe-syscall.o
CC armeb-linux-user/target/arm/neon_helper.o
CC arm-linux-user/target/arm/iwmmxt_helper.o
CC hppa-linux-user/target/hppa/translate.o
CC hppa-linux-user/target/hppa/helper.o
CC arm-linux-user/target/arm/gdbstub.o
GEN i386-linux-user/config-target.h
CC armeb-linux-user/target/arm/iwmmxt_helper.o
CC i386-linux-user/exec.o
CC arm-linux-user/target/arm/crypto_helper.o
CC hppa-linux-user/target/hppa/cpu.o
CC hppa-linux-user/target/hppa/op_helper.o
GEN trace/generated-helpers.c
CC arm-linux-user/trace/control-target.o
CC i386-linux-user/translate-all.o
CC hppa-linux-user/target/hppa/gdbstub.o
CC armeb-linux-user/target/arm/gdbstub.o
CC arm-linux-user/gdbstub-xml.o
CC armeb-linux-user/target/arm/crypto_helper.o
GEN trace/generated-helpers.c
CC arm-linux-user/trace/generated-helpers.o
CC hppa-linux-user/trace/control-target.o
CC i386-linux-user/cpu-exec.o
LINK arm-linux-user/qemu-arm
GEN trace/generated-helpers.c
CC armeb-linux-user/trace/control-target.o
CC hppa-linux-user/trace/generated-helpers.o
CC i386-linux-user/translate-common.o
CC armeb-linux-user/gdbstub-xml.o
LINK hppa-linux-user/qemu-hppa
CC i386-linux-user/cpu-exec-common.o
GEN m68k-linux-user/config-target.h
CC armeb-linux-user/trace/generated-helpers.o
CC i386-linux-user/tcg/tcg.o
CC m68k-linux-user/exec.o
LINK armeb-linux-user/qemu-armeb
GEN microblazeel-linux-user/config-target.h
CC m68k-linux-user/translate-all.o
CC microblazeel-linux-user/exec.o
CC microblazeel-linux-user/translate-all.o
CC microblazeel-linux-user/cpu-exec.o
CC m68k-linux-user/cpu-exec.o
CC microblazeel-linux-user/translate-common.o
CC microblazeel-linux-user/cpu-exec-common.o
CC microblazeel-linux-user/tcg/tcg.o
CC m68k-linux-user/translate-common.o
CC i386-linux-user/tcg/tcg-op.o
CC microblazeel-linux-user/tcg/tcg-op.o
CC m68k-linux-user/cpu-exec-common.o
CC m68k-linux-user/tcg/tcg.o
CC i386-linux-user/tcg/optimize.o
CC i386-linux-user/tcg/tcg-common.o
CC microblazeel-linux-user/tcg/optimize.o
CC i386-linux-user/fpu/softfloat.o
CC m68k-linux-user/tcg/tcg-op.o
CC i386-linux-user/disas.o
GEN microblaze-linux-user/config-target.h
CC microblazeel-linux-user/tcg/tcg-common.o
CC microblazeel-linux-user/fpu/softfloat.o
CC microblaze-linux-user/exec.o
CC microblaze-linux-user/translate-all.o
CC m68k-linux-user/tcg/optimize.o
CC microblaze-linux-user/cpu-exec.o
CC microblaze-linux-user/translate-common.o
CC m68k-linux-user/tcg/tcg-common.o
CC i386-linux-user/tcg-runtime.o
CC microblaze-linux-user/cpu-exec-common.o
CC m68k-linux-user/fpu/softfloat.o
CC microblaze-linux-user/tcg/tcg.o
CC i386-linux-user/hax-stub.o
CC microblazeel-linux-user/disas.o
CC i386-linux-user/kvm-stub.o
CC microblazeel-linux-user/tcg-runtime.o
CC i386-linux-user/gdbstub.o
CC microblazeel-linux-user/hax-stub.o
CC microblazeel-linux-user/kvm-stub.o
CC i386-linux-user/thunk.o
CC i386-linux-user/user-exec.o
CC microblazeel-linux-user/gdbstub.o
CC i386-linux-user/user-exec-stub.o
CC microblaze-linux-user/tcg/tcg-op.o
CC microblazeel-linux-user/thunk.o
CC i386-linux-user/linux-user/main.o
CC microblazeel-linux-user/user-exec.o
CC i386-linux-user/linux-user/syscall.o
CC microblazeel-linux-user/user-exec-stub.o
CC m68k-linux-user/disas.o
CC microblazeel-linux-user/linux-user/main.o
CC m68k-linux-user/tcg-runtime.o
CC microblazeel-linux-user/linux-user/syscall.o
GEN m68k-linux-user/gdbstub-xml.c
CC m68k-linux-user/hax-stub.o
CC microblaze-linux-user/tcg/optimize.o
CC m68k-linux-user/kvm-stub.o
CC m68k-linux-user/gdbstub.o
CC m68k-linux-user/thunk.o
CC microblaze-linux-user/tcg/tcg-common.o
CC microblaze-linux-user/fpu/softfloat.o
CC m68k-linux-user/user-exec.o
CC m68k-linux-user/user-exec-stub.o
CC m68k-linux-user/linux-user/main.o
CC m68k-linux-user/linux-user/syscall.o
CC microblazeel-linux-user/linux-user/strace.o
CC i386-linux-user/linux-user/strace.o
CC microblaze-linux-user/disas.o
CC microblaze-linux-user/tcg-runtime.o
CC microblazeel-linux-user/linux-user/mmap.o
CC i386-linux-user/linux-user/mmap.o
CC microblazeel-linux-user/linux-user/signal.o
CC microblaze-linux-user/hax-stub.o
CC i386-linux-user/linux-user/signal.o
CC microblaze-linux-user/kvm-stub.o
CC microblaze-linux-user/gdbstub.o
CC microblazeel-linux-user/linux-user/elfload.o
CC i386-linux-user/linux-user/elfload.o
CC microblaze-linux-user/thunk.o
CC microblazeel-linux-user/linux-user/linuxload.o
CC microblaze-linux-user/user-exec.o
CC i386-linux-user/linux-user/linuxload.o
CC microblazeel-linux-user/linux-user/uaccess.o
CC microblaze-linux-user/user-exec-stub.o
CC i386-linux-user/linux-user/uaccess.o
CC m68k-linux-user/linux-user/strace.o
CC microblazeel-linux-user/linux-user/uname.o
CC i386-linux-user/linux-user/uname.o
CC microblaze-linux-user/linux-user/main.o
CCAS microblazeel-linux-user/linux-user/safe-syscall.o
CC microblazeel-linux-user/linux-user/flatload.o
CCAS i386-linux-user/linux-user/safe-syscall.o
CC i386-linux-user/linux-user/vm86.o
CC microblaze-linux-user/linux-user/syscall.o
CC m68k-linux-user/linux-user/mmap.o
CC i386-linux-user/target/i386/translate.o
CC microblazeel-linux-user/target/microblaze/translate.o
CC m68k-linux-user/linux-user/signal.o
CC m68k-linux-user/linux-user/elfload.o
CC microblazeel-linux-user/target/microblaze/op_helper.o
CC microblazeel-linux-user/target/microblaze/helper.o
CC microblazeel-linux-user/target/microblaze/cpu.o
CC m68k-linux-user/linux-user/linuxload.o
CC microblazeel-linux-user/target/microblaze/gdbstub.o
CC m68k-linux-user/linux-user/uaccess.o
GEN trace/generated-helpers.c
CC microblazeel-linux-user/trace/control-target.o
CC m68k-linux-user/linux-user/uname.o
CCAS m68k-linux-user/linux-user/safe-syscall.o
CC m68k-linux-user/linux-user/flatload.o
CC microblazeel-linux-user/trace/generated-helpers.o
CC m68k-linux-user/linux-user/m68k-sim.o
CC m68k-linux-user/target/m68k/m68k-semi.o
LINK microblazeel-linux-user/qemu-microblazeel
CC m68k-linux-user/target/m68k/translate.o
CC microblaze-linux-user/linux-user/strace.o
GEN mips64el-linux-user/config-target.h
CC mips64el-linux-user/exec.o
CC microblaze-linux-user/linux-user/mmap.o
CC mips64el-linux-user/translate-all.o
CC microblaze-linux-user/linux-user/signal.o
CC i386-linux-user/target/i386/helper.o
CC mips64el-linux-user/cpu-exec.o
CC m68k-linux-user/target/m68k/op_helper.o
CC i386-linux-user/target/i386/cpu.o
CC microblaze-linux-user/linux-user/elfload.o
CC mips64el-linux-user/translate-common.o
CC m68k-linux-user/target/m68k/helper.o
CC mips64el-linux-user/cpu-exec-common.o
CC m68k-linux-user/target/m68k/cpu.o
CC i386-linux-user/target/i386/bpt_helper.o
CC microblaze-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/tcg/tcg.o
CC m68k-linux-user/target/m68k/gdbstub.o
CC i386-linux-user/target/i386/excp_helper.o
CC microblaze-linux-user/linux-user/uaccess.o
GEN trace/generated-helpers.c
CC m68k-linux-user/trace/control-target.o
CC i386-linux-user/target/i386/fpu_helper.o
CC microblaze-linux-user/linux-user/uname.o
CC m68k-linux-user/gdbstub-xml.o
CCAS microblaze-linux-user/linux-user/safe-syscall.o
CC microblaze-linux-user/linux-user/flatload.o
CC m68k-linux-user/trace/generated-helpers.o
LINK m68k-linux-user/qemu-m68k
CC microblaze-linux-user/target/microblaze/translate.o
CC i386-linux-user/target/i386/cc_helper.o
CC mips64el-linux-user/tcg/tcg-op.o
CC mips64el-linux-user/tcg/optimize.o
CC i386-linux-user/target/i386/int_helper.o
CC microblaze-linux-user/target/microblaze/op_helper.o
CC i386-linux-user/target/i386/svm_helper.o
CC microblaze-linux-user/target/microblaze/helper.o
CC i386-linux-user/target/i386/smm_helper.o
CC i386-linux-user/target/i386/misc_helper.o
CC microblaze-linux-user/target/microblaze/cpu.o
CC microblaze-linux-user/target/microblaze/gdbstub.o
CC i386-linux-user/target/i386/mem_helper.o
GEN trace/generated-helpers.c
CC microblaze-linux-user/trace/control-target.o
CC i386-linux-user/target/i386/seg_helper.o
GEN mips64-linux-user/config-target.h
CC mips64el-linux-user/tcg/tcg-common.o
CC mips64-linux-user/exec.o
CC microblaze-linux-user/trace/generated-helpers.o
LINK microblaze-linux-user/qemu-microblaze
CC mips64el-linux-user/fpu/softfloat.o
CC mips64-linux-user/translate-all.o
CC mips64-linux-user/cpu-exec.o
GEN mipsel-linux-user/config-target.h
CC mipsel-linux-user/exec.o
CC mips64-linux-user/translate-common.o
CC mipsel-linux-user/translate-all.o
CC mips64-linux-user/cpu-exec-common.o
CC i386-linux-user/target/i386/mpx_helper.o
CC mipsel-linux-user/cpu-exec.o
CC mips64-linux-user/tcg/tcg.o
CC mipsel-linux-user/translate-common.o
CC mipsel-linux-user/cpu-exec-common.o
CC i386-linux-user/target/i386/gdbstub.o
CC mipsel-linux-user/tcg/tcg.o
CC i386-linux-user/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC i386-linux-user/trace/control-target.o
CC mips64el-linux-user/disas.o
CC i386-linux-user/trace/generated-helpers.o
CC mips64el-linux-user/tcg-runtime.o
LINK i386-linux-user/qemu-i386
CC mips64-linux-user/tcg/tcg-op.o
CC mipsel-linux-user/tcg/tcg-op.o
CC mipsel-linux-user/tcg/optimize.o
CC mips64el-linux-user/hax-stub.o
CC mips64el-linux-user/kvm-stub.o
CC mips64el-linux-user/gdbstub.o
CC mips64-linux-user/tcg/optimize.o
CC mips64el-linux-user/thunk.o
CC mipsel-linux-user/tcg/tcg-common.o
CC mips64-linux-user/tcg/tcg-common.o
CC mips64el-linux-user/user-exec.o
CC mipsel-linux-user/fpu/softfloat.o
CC mips64el-linux-user/user-exec-stub.o
CC mipsel-linux-user/disas.o
CC mips64el-linux-user/linux-user/main.o
CC mips64-linux-user/fpu/softfloat.o
CC mips64-linux-user/disas.o
CC mips64el-linux-user/linux-user/syscall.o
CC mipsel-linux-user/tcg-runtime.o
CC mips64-linux-user/tcg-runtime.o
CC mipsel-linux-user/hax-stub.o
CC mips64el-linux-user/linux-user/strace.o
CC mipsel-linux-user/kvm-stub.o
CC mipsel-linux-user/gdbstub.o
GEN mips-linux-user/config-target.h
CC mips64-linux-user/hax-stub.o
CC mips-linux-user/exec.o
CC mipsel-linux-user/thunk.o
CC mips64-linux-user/kvm-stub.o
CC mips-linux-user/translate-all.o
CC mipsel-linux-user/user-exec.o
CC mips64el-linux-user/linux-user/mmap.o
CC mips64-linux-user/gdbstub.o
CC mipsel-linux-user/user-exec-stub.o
CC mips-linux-user/cpu-exec.o
CC mips64-linux-user/thunk.o
CC mips64el-linux-user/linux-user/signal.o
CC mipsel-linux-user/linux-user/main.o
CC mips-linux-user/translate-common.o
CC mips64-linux-user/user-exec.o
CC mips-linux-user/cpu-exec-common.o
CC mips64-linux-user/user-exec-stub.o
CC mipsel-linux-user/linux-user/syscall.o
CC mips64el-linux-user/linux-user/elfload.o
CC mips-linux-user/tcg/tcg.o
CC mips64-linux-user/linux-user/main.o
CC mips64-linux-user/linux-user/syscall.o
CC mips64el-linux-user/linux-user/linuxload.o
CC mips64el-linux-user/linux-user/uaccess.o
CC mips64el-linux-user/linux-user/uname.o
CC mips-linux-user/tcg/tcg-op.o
CCAS mips64el-linux-user/linux-user/safe-syscall.o
CC mips64el-linux-user/target/mips/translate.o
CC mips64-linux-user/linux-user/strace.o
CC mipsel-linux-user/linux-user/strace.o
CC mips64-linux-user/linux-user/mmap.o
CC mips-linux-user/tcg/optimize.o
CC mips64-linux-user/linux-user/signal.o
CC mipsel-linux-user/linux-user/mmap.o
CC mips64-linux-user/linux-user/elfload.o
CC mips-linux-user/tcg/tcg-common.o
CC mipsel-linux-user/linux-user/signal.o
CC mips-linux-user/fpu/softfloat.o
CC mips64-linux-user/linux-user/linuxload.o
CC mipsel-linux-user/linux-user/elfload.o
CC mips64-linux-user/linux-user/uaccess.o
CC mips64-linux-user/linux-user/uname.o
CC mipsel-linux-user/linux-user/linuxload.o
CCAS mips64-linux-user/linux-user/safe-syscall.o
CC mips64-linux-user/target/mips/translate.o
CC mips64el-linux-user/target/mips/dsp_helper.o
CC mipsel-linux-user/linux-user/uaccess.o
CC mipsel-linux-user/linux-user/uname.o
CC mips-linux-user/disas.o
CCAS mipsel-linux-user/linux-user/safe-syscall.o
CC mipsel-linux-user/target/mips/translate.o
CC mips-linux-user/tcg-runtime.o
CC mips64el-linux-user/target/mips/op_helper.o
CC mips-linux-user/hax-stub.o
CC mips-linux-user/kvm-stub.o
CC mips-linux-user/gdbstub.o
CC mips-linux-user/thunk.o
CC mips-linux-user/user-exec.o
CC mips64el-linux-user/target/mips/lmi_helper.o
CC mips-linux-user/user-exec-stub.o
CC mips64el-linux-user/target/mips/helper.o
CC mips-linux-user/linux-user/main.o
CC mips64el-linux-user/target/mips/cpu.o
CC mips-linux-user/linux-user/syscall.o
CC mips64-linux-user/target/mips/dsp_helper.o
CC mips64el-linux-user/target/mips/gdbstub.o
CC mips64el-linux-user/target/mips/msa_helper.o
CC mipsel-linux-user/target/mips/dsp_helper.o
CC mips64-linux-user/target/mips/op_helper.o
CC mipsel-linux-user/target/mips/op_helper.o
CC mips-linux-user/linux-user/strace.o
CC mips-linux-user/linux-user/mmap.o
CC mips64-linux-user/target/mips/lmi_helper.o
CC mips64el-linux-user/target/mips/mips-semi.o
CC mips-linux-user/linux-user/signal.o
GEN trace/generated-helpers.c
CC mips64el-linux-user/trace/control-target.o
CC mips64el-linux-user/trace/generated-helpers.o
CC mips64-linux-user/target/mips/helper.o
LINK mips64el-linux-user/qemu-mips64el
CC mips64-linux-user/target/mips/cpu.o
CC mips-linux-user/linux-user/elfload.o
CC mipsel-linux-user/target/mips/lmi_helper.o
CC mips-linux-user/linux-user/linuxload.o
CC mips64-linux-user/target/mips/gdbstub.o
CC mipsel-linux-user/target/mips/helper.o
CC mips64-linux-user/target/mips/msa_helper.o
CC mips-linux-user/linux-user/uaccess.o
CC mipsel-linux-user/target/mips/cpu.o
GEN mipsn32el-linux-user/config-target.h
CC mipsn32el-linux-user/exec.o
CC mips-linux-user/linux-user/uname.o
CC mipsel-linux-user/target/mips/gdbstub.o
CC mipsn32el-linux-user/translate-all.o
CCAS mips-linux-user/linux-user/safe-syscall.o
CC mips-linux-user/target/mips/translate.o
CC mipsel-linux-user/target/mips/msa_helper.o
CC mipsn32el-linux-user/cpu-exec.o
CC mipsn32el-linux-user/translate-common.o
CC mipsn32el-linux-user/cpu-exec-common.o
CC mipsn32el-linux-user/tcg/tcg.o
CC mips64-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mips64-linux-user/trace/control-target.o
CC mips64-linux-user/trace/generated-helpers.o
LINK mips64-linux-user/qemu-mips64
CC mipsel-linux-user/target/mips/mips-semi.o
CC mipsn32el-linux-user/tcg/tcg-op.o
GEN trace/generated-helpers.c
GEN mipsn32-linux-user/config-target.h
CC mipsel-linux-user/trace/control-target.o
CC mipsn32-linux-user/exec.o
CC mipsel-linux-user/trace/generated-helpers.o
CC mipsn32-linux-user/translate-all.o
LINK mipsel-linux-user/qemu-mipsel
CC mips-linux-user/target/mips/dsp_helper.o
CC mips-linux-user/target/mips/op_helper.o
CC mipsn32-linux-user/cpu-exec.o
CC mipsn32-linux-user/translate-common.o
GEN nios2-linux-user/config-target.h
CC mipsn32-linux-user/cpu-exec-common.o
CC nios2-linux-user/exec.o
CC mipsn32el-linux-user/tcg/optimize.o
CC mipsn32-linux-user/tcg/tcg.o
CC nios2-linux-user/translate-all.o
CC nios2-linux-user/cpu-exec.o
CC mips-linux-user/target/mips/lmi_helper.o
CC mipsn32el-linux-user/tcg/tcg-common.o
CC nios2-linux-user/translate-common.o
CC mips-linux-user/target/mips/helper.o
CC mipsn32el-linux-user/fpu/softfloat.o
CC nios2-linux-user/cpu-exec-common.o
CC mips-linux-user/target/mips/cpu.o
CC mipsn32-linux-user/tcg/tcg-op.o
CC nios2-linux-user/tcg/tcg.o
CC mips-linux-user/target/mips/gdbstub.o
CC mips-linux-user/target/mips/msa_helper.o
CC nios2-linux-user/tcg/tcg-op.o
CC mipsn32-linux-user/tcg/optimize.o
CC mipsn32el-linux-user/disas.o
CC mipsn32el-linux-user/tcg-runtime.o
CC mipsn32el-linux-user/hax-stub.o
CC mipsn32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/fpu/softfloat.o
CC mipsn32el-linux-user/kvm-stub.o
CC mipsn32el-linux-user/gdbstub.o
CC nios2-linux-user/tcg/optimize.o
CC mips-linux-user/target/mips/mips-semi.o
GEN trace/generated-helpers.c
CC mipsn32el-linux-user/thunk.o
CC mips-linux-user/trace/control-target.o
CC nios2-linux-user/tcg/tcg-common.o
CC mips-linux-user/trace/generated-helpers.o
CC mipsn32el-linux-user/user-exec.o
CC nios2-linux-user/fpu/softfloat.o
CC mipsn32el-linux-user/user-exec-stub.o
LINK mips-linux-user/qemu-mips
CC mipsn32el-linux-user/linux-user/main.o
CC nios2-linux-user/disas.o
CC mipsn32-linux-user/disas.o
CC nios2-linux-user/tcg-runtime.o
CC mipsn32el-linux-user/linux-user/syscall.o
CC mipsn32-linux-user/tcg-runtime.o
CC mipsn32-linux-user/hax-stub.o
GEN or1k-linux-user/config-target.h
CC or1k-linux-user/exec.o
CC mipsn32-linux-user/kvm-stub.o
CC nios2-linux-user/hax-stub.o
CC nios2-linux-user/kvm-stub.o
CC or1k-linux-user/translate-all.o
CC mipsn32-linux-user/gdbstub.o
CC nios2-linux-user/gdbstub.o
CC or1k-linux-user/cpu-exec.o
CC or1k-linux-user/translate-common.o
CC nios2-linux-user/thunk.o
CC mipsn32-linux-user/thunk.o
CC or1k-linux-user/cpu-exec-common.o
CC or1k-linux-user/tcg/tcg.o
CC nios2-linux-user/user-exec.o
CC mipsn32-linux-user/user-exec.o
CC nios2-linux-user/user-exec-stub.o
CC mipsn32-linux-user/user-exec-stub.o
CC mipsn32el-linux-user/linux-user/strace.o
CC nios2-linux-user/linux-user/main.o
CC mipsn32-linux-user/linux-user/main.o
CC mipsn32el-linux-user/linux-user/mmap.o
CC nios2-linux-user/linux-user/syscall.o
CC or1k-linux-user/tcg/tcg-op.o
CC mipsn32-linux-user/linux-user/syscall.o
CC mipsn32el-linux-user/linux-user/signal.o
CC mipsn32el-linux-user/linux-user/elfload.o
CC mipsn32el-linux-user/linux-user/linuxload.o
CC mipsn32el-linux-user/linux-user/uaccess.o
CC mipsn32el-linux-user/linux-user/uname.o
CC or1k-linux-user/tcg/optimize.o
CC nios2-linux-user/linux-user/strace.o
CCAS mipsn32el-linux-user/linux-user/safe-syscall.o
CC mipsn32el-linux-user/target/mips/translate.o
CC nios2-linux-user/linux-user/mmap.o
CC or1k-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/linux-user/strace.o
CC nios2-linux-user/linux-user/signal.o
CC or1k-linux-user/fpu/softfloat.o
CC nios2-linux-user/linux-user/elfload.o
CC mipsn32-linux-user/linux-user/mmap.o
CC mipsn32-linux-user/linux-user/signal.o
CC nios2-linux-user/linux-user/linuxload.o
CC mipsn32-linux-user/linux-user/elfload.o
CC nios2-linux-user/linux-user/uaccess.o
CC nios2-linux-user/linux-user/uname.o
CC mipsn32-linux-user/linux-user/linuxload.o
CC or1k-linux-user/disas.o
CCAS nios2-linux-user/linux-user/safe-syscall.o
CC nios2-linux-user/target/nios2/translate.o
CC or1k-linux-user/tcg-runtime.o
CC mipsn32-linux-user/linux-user/uaccess.o
CC nios2-linux-user/target/nios2/op_helper.o
CC mipsn32-linux-user/linux-user/uname.o
CC nios2-linux-user/target/nios2/helper.o
CC or1k-linux-user/hax-stub.o
CCAS mipsn32-linux-user/linux-user/safe-syscall.o
CC mipsn32-linux-user/target/mips/translate.o
CC nios2-linux-user/target/nios2/cpu.o
CC or1k-linux-user/kvm-stub.o
CC mipsn32el-linux-user/target/mips/dsp_helper.o
CC or1k-linux-user/gdbstub.o
CC nios2-linux-user/target/nios2/mmu.o
GEN trace/generated-helpers.c
CC nios2-linux-user/trace/control-target.o
CC or1k-linux-user/thunk.o
CC nios2-linux-user/trace/generated-helpers.o
CC mipsn32el-linux-user/target/mips/op_helper.o
LINK nios2-linux-user/qemu-nios2
CC or1k-linux-user/user-exec.o
CC or1k-linux-user/user-exec-stub.o
GEN ppc64abi32-linux-user/config-target.h
CC ppc64abi32-linux-user/exec.o
CC or1k-linux-user/linux-user/main.o
CC or1k-linux-user/linux-user/syscall.o
CC ppc64abi32-linux-user/translate-all.o
CC ppc64abi32-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/translate-common.o
CC mipsn32el-linux-user/target/mips/lmi_helper.o
CC ppc64abi32-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/tcg/tcg.o
CC mipsn32el-linux-user/target/mips/helper.o
CC mipsn32el-linux-user/target/mips/cpu.o
CC mipsn32el-linux-user/target/mips/gdbstub.o
CC mipsn32-linux-user/target/mips/dsp_helper.o
CC or1k-linux-user/linux-user/strace.o
CC mipsn32el-linux-user/target/mips/msa_helper.o
CC ppc64abi32-linux-user/tcg/tcg-op.o
CC or1k-linux-user/linux-user/mmap.o
CC mipsn32-linux-user/target/mips/op_helper.o
CC or1k-linux-user/linux-user/signal.o
CC or1k-linux-user/linux-user/elfload.o
CC or1k-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/tcg/optimize.o
CC or1k-linux-user/linux-user/uaccess.o
CC or1k-linux-user/linux-user/uname.o
CCAS or1k-linux-user/linux-user/safe-syscall.o
CC mipsn32-linux-user/target/mips/lmi_helper.o
CC or1k-linux-user/target/openrisc/cpu.o
CC or1k-linux-user/target/openrisc/exception.o
CC ppc64abi32-linux-user/tcg/tcg-common.o
CC mipsn32-linux-user/target/mips/helper.o
CC ppc64abi32-linux-user/fpu/softfloat.o
CC or1k-linux-user/target/openrisc/interrupt.o
CC mipsn32-linux-user/target/mips/cpu.o
CC or1k-linux-user/target/openrisc/mmu.o
CC mipsn32el-linux-user/target/mips/mips-semi.o
CC mipsn32-linux-user/target/mips/gdbstub.o
CC or1k-linux-user/target/openrisc/translate.o
GEN trace/generated-helpers.c
CC mipsn32el-linux-user/trace/control-target.o
CC mipsn32-linux-user/target/mips/msa_helper.o
CC mipsn32el-linux-user/trace/generated-helpers.o
CC or1k-linux-user/target/openrisc/exception_helper.o
LINK mipsn32el-linux-user/qemu-mipsn32el
CC or1k-linux-user/target/openrisc/fpu_helper.o
CC mipsn32-linux-user/target/mips/mips-semi.o
CC or1k-linux-user/target/openrisc/interrupt_helper.o
CC ppc64abi32-linux-user/disas.o
CC or1k-linux-user/target/openrisc/mmu_helper.o
GEN ppc64le-linux-user/config-target.h
CC ppc64abi32-linux-user/tcg-runtime.o
CC or1k-linux-user/target/openrisc/sys_helper.o
CC ppc64le-linux-user/exec.o
CC or1k-linux-user/target/openrisc/gdbstub.o
GEN ppc64abi32-linux-user/gdbstub-xml.c
CC ppc64le-linux-user/translate-all.o
GEN trace/generated-helpers.c
CC or1k-linux-user/trace/control-target.o
CC or1k-linux-user/trace/generated-helpers.o
CC ppc64le-linux-user/cpu-exec.o
LINK or1k-linux-user/qemu-or1k
CC ppc64abi32-linux-user/hax-stub.o
CC ppc64le-linux-user/translate-common.o
GEN trace/generated-helpers.c
CC mipsn32-linux-user/trace/control-target.o
CC ppc64abi32-linux-user/kvm-stub.o
CC ppc64abi32-linux-user/libdecnumber/decContext.o
CC ppc64le-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/libdecnumber/decNumber.o
CC mipsn32-linux-user/trace/generated-helpers.o
CC ppc64le-linux-user/tcg/tcg.o
LINK mipsn32-linux-user/qemu-mipsn32
GEN ppc64-linux-user/config-target.h
CC ppc64-linux-user/exec.o
CC ppc64-linux-user/translate-all.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal32.o
CC ppc64-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal64.o
GEN ppc-linux-user/config-target.h
CC ppc64-linux-user/translate-common.o
CC ppc-linux-user/exec.o
CC ppc64abi32-linux-user/libdecnumber/dpd/decimal128.o
CC ppc-linux-user/translate-all.o
CC ppc64le-linux-user/tcg/tcg-op.o
CC ppc64-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/gdbstub.o
CC ppc64-linux-user/tcg/tcg.o
CC ppc-linux-user/cpu-exec.o
CC ppc64abi32-linux-user/thunk.o
CC ppc-linux-user/translate-common.o
CC ppc64abi32-linux-user/user-exec.o
CC ppc-linux-user/cpu-exec-common.o
CC ppc64abi32-linux-user/user-exec-stub.o
CC ppc-linux-user/tcg/tcg.o
CC ppc64abi32-linux-user/linux-user/main.o
CC ppc64abi32-linux-user/linux-user/syscall.o
CC ppc64le-linux-user/tcg/optimize.o
CC ppc64-linux-user/tcg/tcg-op.o
CC ppc-linux-user/tcg/tcg-op.o
CC ppc64le-linux-user/tcg/tcg-common.o
CC ppc64le-linux-user/fpu/softfloat.o
CC ppc64-linux-user/tcg/optimize.o
CC ppc-linux-user/tcg/optimize.o
CC ppc64abi32-linux-user/linux-user/strace.o
CC ppc64-linux-user/tcg/tcg-common.o
CC ppc64abi32-linux-user/linux-user/mmap.o
CC ppc-linux-user/tcg/tcg-common.o
CC ppc64le-linux-user/disas.o
CC ppc64-linux-user/fpu/softfloat.o
CC ppc-linux-user/fpu/softfloat.o
CC ppc64abi32-linux-user/linux-user/signal.o
CC ppc64le-linux-user/tcg-runtime.o
CC ppc64abi32-linux-user/linux-user/elfload.o
GEN ppc64le-linux-user/gdbstub-xml.c
CC ppc64abi32-linux-user/linux-user/linuxload.o
CC ppc64le-linux-user/hax-stub.o
CC ppc64abi32-linux-user/linux-user/uaccess.o
CC ppc64abi32-linux-user/linux-user/uname.o
CC ppc64le-linux-user/kvm-stub.o
CC ppc-linux-user/disas.o
CCAS ppc64abi32-linux-user/linux-user/safe-syscall.o
CC ppc64le-linux-user/libdecnumber/decContext.o
CC ppc64abi32-linux-user/target/ppc/cpu-models.o
CC ppc-linux-user/tcg-runtime.o
CC ppc64-linux-user/disas.o
CC ppc64le-linux-user/libdecnumber/decNumber.o
CC ppc64-linux-user/tcg-runtime.o
GEN ppc-linux-user/gdbstub-xml.c
GEN ppc64-linux-user/gdbstub-xml.c
CC ppc64abi32-linux-user/target/ppc/translate.o
CC ppc-linux-user/hax-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal32.o
CC ppc-linux-user/kvm-stub.o
CC ppc-linux-user/libdecnumber/decContext.o
CC ppc-linux-user/libdecnumber/decNumber.o
CC ppc64-linux-user/hax-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal64.o
CC ppc64-linux-user/kvm-stub.o
CC ppc64le-linux-user/libdecnumber/dpd/decimal128.o
CC ppc64-linux-user/libdecnumber/decContext.o
CC ppc64le-linux-user/gdbstub.o
CC ppc64-linux-user/libdecnumber/decNumber.o
CC ppc-linux-user/libdecnumber/dpd/decimal32.o
CC ppc-linux-user/libdecnumber/dpd/decimal64.o
CC ppc64le-linux-user/thunk.o
CC ppc-linux-user/libdecnumber/dpd/decimal128.o
CC ppc64le-linux-user/user-exec.o
CC ppc-linux-user/gdbstub.o
CC ppc64-linux-user/libdecnumber/dpd/decimal32.o
CC ppc64le-linux-user/user-exec-stub.o
CC ppc64-linux-user/libdecnumber/dpd/decimal64.o
CC ppc-linux-user/thunk.o
CC ppc64le-linux-user/linux-user/main.o
CC ppc-linux-user/user-exec.o
CC ppc64-linux-user/libdecnumber/dpd/decimal128.o
CC ppc-linux-user/user-exec-stub.o
CC ppc64-linux-user/gdbstub.o
CC ppc64le-linux-user/linux-user/syscall.o
CC ppc-linux-user/linux-user/main.o
CC ppc64-linux-user/thunk.o
CC ppc-linux-user/linux-user/syscall.o
CC ppc64-linux-user/user-exec.o
CC ppc64-linux-user/user-exec-stub.o
CC ppc64-linux-user/linux-user/main.o
CC ppc64-linux-user/linux-user/syscall.o
CC ppc64le-linux-user/linux-user/strace.o
CC ppc64le-linux-user/linux-user/mmap.o
CC ppc-linux-user/linux-user/strace.o
CC ppc64le-linux-user/linux-user/signal.o
CC ppc64-linux-user/linux-user/strace.o
CC ppc-linux-user/linux-user/mmap.o
CC ppc64le-linux-user/linux-user/elfload.o
CC ppc-linux-user/linux-user/signal.o
CC ppc64-linux-user/linux-user/mmap.o
CC ppc64le-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/target/ppc/kvm-stub.o
CC ppc64-linux-user/linux-user/signal.o
CC ppc64abi32-linux-user/target/ppc/dfp_helper.o
CC ppc-linux-user/linux-user/elfload.o
CC ppc64le-linux-user/linux-user/uaccess.o
CC ppc64-linux-user/linux-user/elfload.o
CC ppc64le-linux-user/linux-user/uname.o
CCAS ppc64le-linux-user/linux-user/safe-syscall.o
CC ppc64le-linux-user/target/ppc/cpu-models.o
CC ppc64-linux-user/linux-user/linuxload.o
CC ppc-linux-user/linux-user/linuxload.o
CC ppc64abi32-linux-user/target/ppc/excp_helper.o
CC ppc64-linux-user/linux-user/uaccess.o
CC ppc-linux-user/linux-user/uaccess.o
CC ppc64abi32-linux-user/target/ppc/fpu_helper.o
CC ppc-linux-user/linux-user/uname.o
CC ppc64-linux-user/linux-user/uname.o
CCAS ppc-linux-user/linux-user/safe-syscall.o
CCAS ppc64-linux-user/linux-user/safe-syscall.o
CC ppc-linux-user/target/ppc/cpu-models.o
CC ppc64-linux-user/target/ppc/cpu-models.o
CC ppc64le-linux-user/target/ppc/translate.o
CC ppc-linux-user/target/ppc/translate.o
CC ppc64-linux-user/target/ppc/translate.o
CC ppc64abi32-linux-user/target/ppc/int_helper.o
CC ppc64abi32-linux-user/target/ppc/timebase_helper.o
CC ppc64abi32-linux-user/target/ppc/misc_helper.o
CC ppc64abi32-linux-user/target/ppc/mem_helper.o
CC ppc64abi32-linux-user/target/ppc/user_only_helper.o
CC ppc64abi32-linux-user/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc64abi32-linux-user/trace/control-target.o
CC ppc64abi32-linux-user/gdbstub-xml.o
CC ppc64abi32-linux-user/trace/generated-helpers.o
LINK ppc64abi32-linux-user/qemu-ppc64abi32
CC ppc-linux-user/target/ppc/kvm-stub.o
CC ppc-linux-user/target/ppc/dfp_helper.o
CC ppc64-linux-user/target/ppc/kvm-stub.o
CC ppc64-linux-user/target/ppc/dfp_helper.o
CC ppc64le-linux-user/target/ppc/kvm-stub.o
CC ppc-linux-user/target/ppc/excp_helper.o
CC ppc64le-linux-user/target/ppc/dfp_helper.o
CC ppc-linux-user/target/ppc/fpu_helper.o
CC ppc-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/target/ppc/excp_helper.o
CC ppc64le-linux-user/target/ppc/fpu_helper.o
CC ppc64-linux-user/target/ppc/excp_helper.o
CC ppc-linux-user/target/ppc/timebase_helper.o
CC ppc64-linux-user/target/ppc/fpu_helper.o
CC ppc64le-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/target/ppc/timebase_helper.o
CC ppc64le-linux-user/target/ppc/misc_helper.o
CC ppc-linux-user/target/ppc/misc_helper.o
CC ppc64le-linux-user/target/ppc/mem_helper.o
CC ppc-linux-user/target/ppc/mem_helper.o
CC ppc64le-linux-user/target/ppc/user_only_helper.o
CC ppc64le-linux-user/target/ppc/gdbstub.o
GEN trace/generated-helpers.c
CC ppc-linux-user/target/ppc/user_only_helper.o
CC ppc64le-linux-user/trace/control-target.o
CC ppc-linux-user/target/ppc/gdbstub.o
CC ppc64-linux-user/target/ppc/int_helper.o
CC ppc64le-linux-user/gdbstub-xml.o
GEN trace/generated-helpers.c
CC ppc-linux-user/trace/control-target.o
CC ppc64le-linux-user/trace/generated-helpers.o
CC ppc-linux-user/gdbstub-xml.o
LINK ppc64le-linux-user/qemu-ppc64le
CC ppc-linux-user/trace/generated-helpers.o
CC s390x-linux-user/gen-features
GEN s390x-linux-user/config-target.h
GEN s390x-linux-user/gen-features.h
CC s390x-linux-user/exec.o
LINK ppc-linux-user/qemu-ppc
CC ppc64-linux-user/target/ppc/timebase_helper.o
CC s390x-linux-user/translate-all.o
CC ppc64-linux-user/target/ppc/misc_helper.o
CC ppc64-linux-user/target/ppc/mem_helper.o
GEN sh4eb-linux-user/config-target.h
CC s390x-linux-user/cpu-exec.o
CC sh4eb-linux-user/exec.o
CC ppc64-linux-user/target/ppc/user_only_helper.o
GEN sh4-linux-user/config-target.h
CC sh4-linux-user/exec.o
CC ppc64-linux-user/target/ppc/gdbstub.o
CC s390x-linux-user/translate-common.o
CC sh4eb-linux-user/translate-all.o
CC sh4-linux-user/translate-all.o
CC s390x-linux-user/cpu-exec-common.o
GEN trace/generated-helpers.c
CC ppc64-linux-user/trace/control-target.o
CC s390x-linux-user/tcg/tcg.o
CC sh4eb-linux-user/cpu-exec.o
CC ppc64-linux-user/gdbstub-xml.o
CC sh4eb-linux-user/translate-common.o
CC sh4-linux-user/cpu-exec.o
CC sh4eb-linux-user/cpu-exec-common.o
CC ppc64-linux-user/trace/generated-helpers.o
CC sh4eb-linux-user/tcg/tcg.o
CC sh4-linux-user/translate-common.o
LINK ppc64-linux-user/qemu-ppc64
CC sh4-linux-user/cpu-exec-common.o
CC s390x-linux-user/tcg/tcg-op.o
CC sh4-linux-user/tcg/tcg.o
CC s390x-linux-user/tcg/optimize.o
CC s390x-linux-user/tcg/tcg-common.o
CC sh4eb-linux-user/tcg/tcg-op.o
CC s390x-linux-user/fpu/softfloat.o
CC sh4-linux-user/tcg/tcg-op.o
CC s390x-linux-user/disas.o
CC s390x-linux-user/tcg-runtime.o
GEN s390x-linux-user/gdbstub-xml.c
CC sh4eb-linux-user/tcg/optimize.o
CC sh4-linux-user/tcg/optimize.o
CC s390x-linux-user/hax-stub.o
CC s390x-linux-user/kvm-stub.o
CC s390x-linux-user/gdbstub.o
CC sh4eb-linux-user/tcg/tcg-common.o
CC s390x-linux-user/thunk.o
CC s390x-linux-user/user-exec.o
CC sh4eb-linux-user/fpu/softfloat.o
CC sh4-linux-user/tcg/tcg-common.o
CC s390x-linux-user/user-exec-stub.o
CC sh4-linux-user/fpu/softfloat.o
CC s390x-linux-user/linux-user/main.o
CC sh4-linux-user/disas.o
CC sh4-linux-user/tcg-runtime.o
CC s390x-linux-user/linux-user/syscall.o
CC sh4-linux-user/hax-stub.o
CC sh4-linux-user/kvm-stub.o
CC sh4-linux-user/gdbstub.o
CC sh4eb-linux-user/disas.o
CC sh4-linux-user/thunk.o
CC sh4eb-linux-user/tcg-runtime.o
CC sh4-linux-user/user-exec.o
CC sh4-linux-user/user-exec-stub.o
CC s390x-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/main.o
CC sh4eb-linux-user/hax-stub.o
CC sh4eb-linux-user/kvm-stub.o
CC sh4-linux-user/linux-user/syscall.o
CC s390x-linux-user/linux-user/mmap.o
CC s390x-linux-user/linux-user/signal.o
CC sh4eb-linux-user/gdbstub.o
CC sh4eb-linux-user/thunk.o
CC s390x-linux-user/linux-user/elfload.o
CC s390x-linux-user/linux-user/linuxload.o
CC sh4eb-linux-user/user-exec.o
CC sh4eb-linux-user/user-exec-stub.o
GEN sparc32plus-linux-user/config-target.h
CC sh4eb-linux-user/linux-user/main.o
CC sparc32plus-linux-user/exec.o
CC s390x-linux-user/linux-user/uaccess.o
CC sh4eb-linux-user/linux-user/syscall.o
CC sparc32plus-linux-user/translate-all.o
CC s390x-linux-user/linux-user/uname.o
CC sparc32plus-linux-user/cpu-exec.o
CCAS s390x-linux-user/linux-user/safe-syscall.o
CC s390x-linux-user/target/s390x/translate.o
CC sparc32plus-linux-user/translate-common.o
CC sparc32plus-linux-user/cpu-exec-common.o
CC sparc32plus-linux-user/tcg/tcg.o
CC sh4-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/mmap.o
CC sparc32plus-linux-user/tcg/tcg-op.o
CC s390x-linux-user/target/s390x/helper.o
CC sh4-linux-user/linux-user/signal.o
CC s390x-linux-user/target/s390x/cpu.o
CC s390x-linux-user/target/s390x/interrupt.o
CC sh4eb-linux-user/linux-user/strace.o
CC sh4-linux-user/linux-user/elfload.o
CC s390x-linux-user/target/s390x/int_helper.o
CC s390x-linux-user/target/s390x/fpu_helper.o
CC sh4-linux-user/linux-user/linuxload.o
CC sh4eb-linux-user/linux-user/mmap.o
CC sh4-linux-user/linux-user/uaccess.o
CC s390x-linux-user/target/s390x/cc_helper.o
CC sh4-linux-user/linux-user/uname.o
CC sh4eb-linux-user/linux-user/signal.o
CC s390x-linux-user/target/s390x/mem_helper.o
CC sparc32plus-linux-user/tcg/optimize.o
CCAS sh4-linux-user/linux-user/safe-syscall.o
CC sh4-linux-user/linux-user/flatload.o
CC sh4eb-linux-user/linux-user/elfload.o
CC s390x-linux-user/target/s390x/misc_helper.o
CC sh4-linux-user/target/sh4/translate.o
CC sparc32plus-linux-user/tcg/tcg-common.o
CC s390x-linux-user/target/s390x/gdbstub.o
CC sparc32plus-linux-user/fpu/softfloat.o
CC sh4eb-linux-user/linux-user/linuxload.o
CC s390x-linux-user/target/s390x/cpu_models.o
CC sh4eb-linux-user/linux-user/uaccess.o
CC s390x-linux-user/target/s390x/cpu_features.o
CC sh4eb-linux-user/linux-user/uname.o
GEN trace/generated-helpers.c
CC s390x-linux-user/trace/control-target.o
CCAS sh4eb-linux-user/linux-user/safe-syscall.o
CC s390x-linux-user/gdbstub-xml.o
CC sh4eb-linux-user/linux-user/flatload.o
CC s390x-linux-user/trace/generated-helpers.o
CC sh4-linux-user/target/sh4/op_helper.o
CC sh4eb-linux-user/target/sh4/translate.o
LINK s390x-linux-user/qemu-s390x
CC sh4-linux-user/target/sh4/helper.o
CC sparc32plus-linux-user/disas.o
CC sh4-linux-user/target/sh4/cpu.o
CC sh4-linux-user/target/sh4/gdbstub.o
GEN sparc64-linux-user/config-target.h
CC sparc32plus-linux-user/tcg-runtime.o
GEN trace/generated-helpers.c
CC sparc64-linux-user/exec.o
CC sh4-linux-user/trace/control-target.o
CC sparc64-linux-user/translate-all.o
CC sh4-linux-user/trace/generated-helpers.o
CC sparc32plus-linux-user/hax-stub.o
CC sparc64-linux-user/cpu-exec.o
LINK sh4-linux-user/qemu-sh4
CC sparc32plus-linux-user/kvm-stub.o
CC sh4eb-linux-user/target/sh4/op_helper.o
CC sparc32plus-linux-user/gdbstub.o
CC sh4eb-linux-user/target/sh4/helper.o
CC sparc64-linux-user/translate-common.o
CC sh4eb-linux-user/target/sh4/cpu.o
CC sh4eb-linux-user/target/sh4/gdbstub.o
CC sparc64-linux-user/cpu-exec-common.o
GEN sparc-linux-user/config-target.h
CC sparc-linux-user/exec.o
GEN trace/generated-helpers.c
CC sparc32plus-linux-user/thunk.o
CC sh4eb-linux-user/trace/control-target.o
CC sparc64-linux-user/tcg/tcg.o
CC sparc32plus-linux-user/user-exec.o
CC sh4eb-linux-user/trace/generated-helpers.o
CC sparc-linux-user/translate-all.o
LINK sh4eb-linux-user/qemu-sh4eb
CC sparc32plus-linux-user/user-exec-stub.o
CC sparc-linux-user/cpu-exec.o
CC sparc32plus-linux-user/linux-user/main.o
GEN tilegx-linux-user/config-target.h
CC tilegx-linux-user/exec.o
CC sparc-linux-user/translate-common.o
CC sparc-linux-user/cpu-exec-common.o
CC tilegx-linux-user/translate-all.o
CC sparc32plus-linux-user/linux-user/syscall.o
CC sparc64-linux-user/tcg/tcg-op.o
CC sparc-linux-user/tcg/tcg.o
CC tilegx-linux-user/cpu-exec.o
CC tilegx-linux-user/translate-common.o
CC tilegx-linux-user/cpu-exec-common.o
CC tilegx-linux-user/tcg/tcg.o
CC sparc64-linux-user/tcg/optimize.o
CC sparc-linux-user/tcg/tcg-op.o
CC sparc64-linux-user/tcg/tcg-common.o
CC sparc64-linux-user/fpu/softfloat.o
CC tilegx-linux-user/tcg/tcg-op.o
CC sparc32plus-linux-user/linux-user/strace.o
CC sparc32plus-linux-user/linux-user/mmap.o
CC sparc-linux-user/tcg/optimize.o
CC sparc32plus-linux-user/linux-user/signal.o
CC sparc-linux-user/tcg/tcg-common.o
CC sparc32plus-linux-user/linux-user/elfload.o
CC sparc-linux-user/fpu/softfloat.o
CC tilegx-linux-user/tcg/optimize.o
CC sparc32plus-linux-user/linux-user/linuxload.o
CC sparc64-linux-user/disas.o
CC sparc32plus-linux-user/linux-user/uaccess.o
CC tilegx-linux-user/tcg/tcg-common.o
CC sparc32plus-linux-user/linux-user/uname.o
CC sparc64-linux-user/tcg-runtime.o
CC tilegx-linux-user/fpu/softfloat.o
CCAS sparc32plus-linux-user/linux-user/safe-syscall.o
CC sparc32plus-linux-user/target/sparc/translate.o
CC sparc64-linux-user/hax-stub.o
CC sparc64-linux-user/kvm-stub.o
CC sparc64-linux-user/gdbstub.o
CC sparc-linux-user/disas.o
CC sparc-linux-user/tcg-runtime.o
CC sparc64-linux-user/thunk.o
CC tilegx-linux-user/disas.o
CC sparc64-linux-user/user-exec.o
CC tilegx-linux-user/tcg-runtime.o
CC sparc-linux-user/hax-stub.o
CC sparc32plus-linux-user/target/sparc/helper.o
CC sparc64-linux-user/user-exec-stub.o
CC sparc32plus-linux-user/target/sparc/cpu.o
CC sparc-linux-user/kvm-stub.o
CC tilegx-linux-user/hax-stub.o
CC sparc-linux-user/gdbstub.o
CC sparc64-linux-user/linux-user/main.o
CC tilegx-linux-user/kvm-stub.o
CC sparc32plus-linux-user/target/sparc/fop_helper.o
CC sparc64-linux-user/linux-user/syscall.o
CC sparc-linux-user/thunk.o
CC tilegx-linux-user/gdbstub.o
CC sparc32plus-linux-user/target/sparc/cc_helper.o
CC sparc-linux-user/user-exec.o
CC sparc32plus-linux-user/target/sparc/win_helper.o
CC sparc-linux-user/user-exec-stub.o
CC tilegx-linux-user/thunk.o
CC sparc-linux-user/linux-user/main.o
CC sparc32plus-linux-user/target/sparc/mmu_helper.o
CC sparc-linux-user/linux-user/syscall.o
CC tilegx-linux-user/user-exec.o
CC sparc32plus-linux-user/target/sparc/ldst_helper.o
CC tilegx-linux-user/user-exec-stub.o
CC sparc32plus-linux-user/target/sparc/int64_helper.o
CC tilegx-linux-user/linux-user/main.o
CC sparc32plus-linux-user/target/sparc/vis_helper.o
CC tilegx-linux-user/linux-user/syscall.o
CC sparc32plus-linux-user/target/sparc/gdbstub.o
GEN trace/generated-helpers.c
CC sparc32plus-linux-user/trace/control-target.o
CC sparc64-linux-user/linux-user/strace.o
CC sparc32plus-linux-user/trace/generated-helpers.o
CC sparc64-linux-user/linux-user/mmap.o
LINK sparc32plus-linux-user/qemu-sparc32plus
CC sparc64-linux-user/linux-user/signal.o
CC tilegx-linux-user/linux-user/strace.o
CC sparc-linux-user/linux-user/strace.o
CC sparc64-linux-user/linux-user/elfload.o
CC sparc-linux-user/linux-user/mmap.o
CC tilegx-linux-user/linux-user/mmap.o
CC sparc-linux-user/linux-user/signal.o
CC sparc64-linux-user/linux-user/linuxload.o
CC sparc-linux-user/linux-user/elfload.o
CC sparc64-linux-user/linux-user/uaccess.o
CC tilegx-linux-user/linux-user/signal.o
CC sparc-linux-user/linux-user/linuxload.o
CC sparc64-linux-user/linux-user/uname.o
CC tilegx-linux-user/linux-user/elfload.o
CC sparc-linux-user/linux-user/uaccess.o
CCAS sparc64-linux-user/linux-user/safe-syscall.o
CC sparc-linux-user/linux-user/uname.o
CC sparc64-linux-user/target/sparc/translate.o
CC tilegx-linux-user/linux-user/linuxload.o
CCAS sparc-linux-user/linux-user/safe-syscall.o
CC tilegx-linux-user/linux-user/uaccess.o
CC sparc-linux-user/target/sparc/translate.o
CC sparc-linux-user/target/sparc/helper.o
CC tilegx-linux-user/linux-user/uname.o
CCAS tilegx-linux-user/linux-user/safe-syscall.o
CC tilegx-linux-user/target/tilegx/cpu.o
CC sparc-linux-user/target/sparc/cpu.o
CC tilegx-linux-user/target/tilegx/translate.o
CC tilegx-linux-user/target/tilegx/helper.o
CC sparc-linux-user/target/sparc/fop_helper.o
CC sparc-linux-user/target/sparc/cc_helper.o
CC sparc64-linux-user/target/sparc/helper.o
CC tilegx-linux-user/target/tilegx/simd_helper.o
CC sparc-linux-user/target/sparc/win_helper.o
CC sparc-linux-user/target/sparc/mmu_helper.o
CC sparc64-linux-user/target/sparc/cpu.o
GEN trace/generated-helpers.c
CC tilegx-linux-user/trace/control-target.o
CC sparc-linux-user/target/sparc/ldst_helper.o
CC sparc64-linux-user/target/sparc/fop_helper.o
CC tilegx-linux-user/trace/generated-helpers.o
GEN x86_64-linux-user/config-target.h
CC x86_64-linux-user/exec.o
CC sparc-linux-user/target/sparc/int32_helper.o
CC sparc64-linux-user/target/sparc/cc_helper.o
LINK tilegx-linux-user/qemu-tilegx
CC sparc-linux-user/target/sparc/gdbstub.o
CC x86_64-linux-user/translate-all.o
CC sparc64-linux-user/target/sparc/win_helper.o
GEN trace/generated-helpers.c
CC sparc-linux-user/trace/control-target.o
CC x86_64-linux-user/cpu-exec.o
CC sparc64-linux-user/target/sparc/mmu_helper.o
CC sparc-linux-user/trace/generated-helpers.o
CC x86_64-linux-user/translate-common.o
CC sparc64-linux-user/target/sparc/ldst_helper.o
CC x86_64-linux-user/cpu-exec-common.o
LINK sparc-linux-user/qemu-sparc
CC sparc64-linux-user/target/sparc/int64_helper.o
CC sparc64-linux-user/target/sparc/vis_helper.o
CC x86_64-linux-user/tcg/tcg.o
CC sparc64-linux-user/target/sparc/gdbstub.o
CC x86_64-linux-user/tcg/tcg-op.o
CC x86_64-linux-user/tcg/optimize.o
GEN trace/generated-helpers.c
CC sparc64-linux-user/trace/control-target.o
CC sparc64-linux-user/trace/generated-helpers.o
CC x86_64-linux-user/tcg/tcg-common.o
LINK sparc64-linux-user/qemu-sparc64
CC x86_64-linux-user/fpu/softfloat.o
CC x86_64-linux-user/disas.o
CC x86_64-linux-user/tcg-runtime.o
CC x86_64-linux-user/hax-stub.o
CC x86_64-linux-user/kvm-stub.o
CC x86_64-linux-user/gdbstub.o
CC x86_64-linux-user/thunk.o
CC x86_64-linux-user/user-exec.o
CC x86_64-linux-user/user-exec-stub.o
CC x86_64-linux-user/linux-user/main.o
CC x86_64-linux-user/linux-user/syscall.o
CC x86_64-linux-user/linux-user/strace.o
CC x86_64-linux-user/linux-user/mmap.o
CC x86_64-linux-user/linux-user/signal.o
CC x86_64-linux-user/linux-user/elfload.o
CC x86_64-linux-user/linux-user/linuxload.o
CC x86_64-linux-user/linux-user/uaccess.o
CC x86_64-linux-user/linux-user/uname.o
CCAS x86_64-linux-user/linux-user/safe-syscall.o
CC x86_64-linux-user/target/i386/translate.o
CC x86_64-linux-user/target/i386/helper.o
CC x86_64-linux-user/target/i386/cpu.o
CC x86_64-linux-user/target/i386/bpt_helper.o
CC x86_64-linux-user/target/i386/excp_helper.o
CC x86_64-linux-user/target/i386/fpu_helper.o
CC x86_64-linux-user/target/i386/cc_helper.o
CC x86_64-linux-user/target/i386/int_helper.o
CC x86_64-linux-user/target/i386/svm_helper.o
CC x86_64-linux-user/target/i386/smm_helper.o
CC x86_64-linux-user/target/i386/misc_helper.o
CC x86_64-linux-user/target/i386/mem_helper.o
CC x86_64-linux-user/target/i386/seg_helper.o
CC x86_64-linux-user/target/i386/mpx_helper.o
CC x86_64-linux-user/target/i386/gdbstub.o
CC x86_64-linux-user/target/i386/kvm-stub.o
GEN trace/generated-helpers.c
CC x86_64-linux-user/trace/control-target.o
CC x86_64-linux-user/trace/generated-helpers.o
LINK x86_64-linux-user/qemu-x86_64
TEST tests/qapi-schema/alternate-array.out
TEST tests/qapi-schema/alternate-clash.out
TEST tests/qapi-schema/alternate-base.out
TEST tests/qapi-schema/alternate-any.out
TEST tests/qapi-schema/alternate-conflict-dict.out
TEST tests/qapi-schema/alternate-empty.out
TEST tests/qapi-schema/alternate-nested.out
TEST tests/qapi-schema/alternate-conflict-string.out
TEST tests/qapi-schema/alternate-unknown.out
TEST tests/qapi-schema/args-alternate.out
TEST tests/qapi-schema/args-any.out
TEST tests/qapi-schema/args-array-empty.out
TEST tests/qapi-schema/args-array-unknown.out
TEST tests/qapi-schema/args-bad-boxed.out
TEST tests/qapi-schema/args-boxed-anon.out
TEST tests/qapi-schema/args-boxed-empty.out
TEST tests/qapi-schema/args-boxed-string.out
TEST tests/qapi-schema/args-int.out
TEST tests/qapi-schema/args-invalid.out
TEST tests/qapi-schema/args-member-array-bad.out
TEST tests/qapi-schema/args-member-case.out
TEST tests/qapi-schema/args-member-unknown.out
TEST tests/qapi-schema/args-union.out
TEST tests/qapi-schema/args-name-clash.out
TEST tests/qapi-schema/args-unknown.out
TEST tests/qapi-schema/bad-base.out
TEST tests/qapi-schema/bad-data.out
TEST tests/qapi-schema/bad-ident.out
TEST tests/qapi-schema/bad-type-bool.out
TEST tests/qapi-schema/bad-type-dict.out
TEST tests/qapi-schema/bad-type-int.out
TEST tests/qapi-schema/base-cycle-direct.out
TEST tests/qapi-schema/base-cycle-indirect.out
TEST tests/qapi-schema/command-int.out
TEST tests/qapi-schema/doc-bad-args.out
TEST tests/qapi-schema/comments.out
TEST tests/qapi-schema/doc-bad-symbol.out
TEST tests/qapi-schema/doc-duplicated-arg.out
TEST tests/qapi-schema/doc-duplicated-return.out
TEST tests/qapi-schema/doc-duplicated-since.out
TEST tests/qapi-schema/doc-empty-arg.out
TEST tests/qapi-schema/doc-empty-section.out
TEST tests/qapi-schema/doc-empty-symbol.out
TEST tests/qapi-schema/doc-interleaved-section.out
TEST tests/qapi-schema/doc-invalid-end.out
TEST tests/qapi-schema/doc-invalid-end2.out
TEST tests/qapi-schema/doc-invalid-return.out
TEST tests/qapi-schema/doc-invalid-section.out
TEST tests/qapi-schema/doc-invalid-start.out
TEST tests/qapi-schema/doc-missing-colon.out
TEST tests/qapi-schema/doc-missing-expr.out
TEST tests/qapi-schema/doc-missing-space.out
TEST tests/qapi-schema/doc-optional.out
TEST tests/qapi-schema/double-data.out
TEST tests/qapi-schema/double-type.out
TEST tests/qapi-schema/duplicate-key.out
TEST tests/qapi-schema/empty.out
TEST tests/qapi-schema/enum-bad-name.out
TEST tests/qapi-schema/enum-bad-prefix.out
TEST tests/qapi-schema/enum-clash-member.out
TEST tests/qapi-schema/enum-dict-member.out
TEST tests/qapi-schema/enum-int-member.out
TEST tests/qapi-schema/enum-member-case.out
TEST tests/qapi-schema/enum-missing-data.out
TEST tests/qapi-schema/enum-wrong-data.out
TEST tests/qapi-schema/escape-outside-string.out
TEST tests/qapi-schema/escape-too-big.out
TEST tests/qapi-schema/escape-too-short.out
TEST tests/qapi-schema/event-boxed-empty.out
TEST tests/qapi-schema/event-case.out
TEST tests/qapi-schema/event-nest-struct.out
TEST tests/qapi-schema/flat-union-array-branch.out
TEST tests/qapi-schema/flat-union-bad-base.out
TEST tests/qapi-schema/flat-union-bad-discriminator.out
TEST tests/qapi-schema/flat-union-base-any.out
TEST tests/qapi-schema/flat-union-base-union.out
TEST tests/qapi-schema/flat-union-clash-member.out
TEST tests/qapi-schema/flat-union-empty.out
TEST tests/qapi-schema/flat-union-incomplete-branch.out
TEST tests/qapi-schema/flat-union-inline.out
TEST tests/qapi-schema/flat-union-int-branch.out
TEST tests/qapi-schema/flat-union-invalid-branch-key.out
TEST tests/qapi-schema/flat-union-invalid-discriminator.out
TEST tests/qapi-schema/flat-union-no-base.out
TEST tests/qapi-schema/flat-union-optional-discriminator.out
TEST tests/qapi-schema/flat-union-string-discriminator.out
TEST tests/qapi-schema/funny-char.out
TEST tests/qapi-schema/ident-with-escape.out
TEST tests/qapi-schema/include-before-err.out
TEST tests/qapi-schema/include-cycle.out
TEST tests/qapi-schema/include-format-err.out
TEST tests/qapi-schema/include-nested-err.out
TEST tests/qapi-schema/include-no-file.out
TEST tests/qapi-schema/include-non-file.out
TEST tests/qapi-schema/include-relpath.out
TEST tests/qapi-schema/include-repetition.out
TEST tests/qapi-schema/include-self-cycle.out
TEST tests/qapi-schema/include-simple.out
TEST tests/qapi-schema/indented-expr.out
TEST tests/qapi-schema/leading-comma-list.out
TEST tests/qapi-schema/leading-comma-object.out
TEST tests/qapi-schema/missing-colon.out
TEST tests/qapi-schema/missing-comma-list.out
TEST tests/qapi-schema/missing-comma-object.out
TEST tests/qapi-schema/missing-type.out
TEST tests/qapi-schema/non-objects.out
TEST tests/qapi-schema/nested-struct-data.out
TEST tests/qapi-schema/qapi-schema-test.out
TEST tests/qapi-schema/quoted-structural-chars.out
TEST tests/qapi-schema/redefined-builtin.out
TEST tests/qapi-schema/redefined-command.out
TEST tests/qapi-schema/redefined-event.out
TEST tests/qapi-schema/redefined-type.out
TEST tests/qapi-schema/reserved-command-q.out
TEST tests/qapi-schema/reserved-enum-q.out
TEST tests/qapi-schema/reserved-member-has.out
TEST tests/qapi-schema/reserved-member-q.out
TEST tests/qapi-schema/reserved-member-u.out
TEST tests/qapi-schema/reserved-member-underscore.out
TEST tests/qapi-schema/reserved-type-kind.out
TEST tests/qapi-schema/reserved-type-list.out
TEST tests/qapi-schema/returns-alternate.out
TEST tests/qapi-schema/returns-array-bad.out
TEST tests/qapi-schema/returns-dict.out
TEST tests/qapi-schema/returns-unknown.out
TEST tests/qapi-schema/returns-whitelist.out
TEST tests/qapi-schema/struct-base-clash-deep.out
TEST tests/qapi-schema/struct-base-clash.out
TEST tests/qapi-schema/struct-data-invalid.out
TEST tests/qapi-schema/struct-member-invalid.out
TEST tests/qapi-schema/trailing-comma-list.out
TEST tests/qapi-schema/trailing-comma-object.out
TEST tests/qapi-schema/type-bypass-bad-gen.out
TEST tests/qapi-schema/unclosed-list.out
TEST tests/qapi-schema/unclosed-object.out
TEST tests/qapi-schema/unclosed-string.out
TEST tests/qapi-schema/unicode-str.out
TEST tests/qapi-schema/union-base-no-discriminator.out
TEST tests/qapi-schema/union-branch-case.out
TEST tests/qapi-schema/union-clash-branches.out
TEST tests/qapi-schema/union-empty.out
TEST tests/qapi-schema/union-invalid-base.out
TEST tests/qapi-schema/union-optional-branch.out
TEST tests/qapi-schema/union-unknown.out
TEST tests/qapi-schema/unknown-escape.out
CC tests/check-qdict.o
TEST tests/qapi-schema/unknown-expr-key.out
CC tests/test-char.o
CC tests/check-qfloat.o
CC tests/check-qint.o
CC tests/check-qstring.o
CC tests/check-qlist.o
CC tests/check-qnull.o
CC tests/check-qjson.o
CC tests/test-qobject-output-visitor.o
GEN tests/test-qapi-visit.c
GEN tests/test-qapi-types.c
GEN tests/test-qapi-event.c
GEN tests/test-qmp-introspect.c
CC tests/test-clone-visitor.o
CC tests/test-qobject-input-visitor.o
CC tests/test-qobject-input-strict.o
CC tests/test-qmp-commands.o
GEN tests/test-qmp-marshal.c
CC tests/test-string-input-visitor.o
CC tests/test-string-output-visitor.o
CC tests/test-qmp-event.o
CC tests/test-opts-visitor.o
CC tests/test-coroutine.o
CC tests/iothread.o
CC tests/test-visitor-serialization.o
CC tests/test-iov.o
CC tests/test-aio.o
CC tests/test-aio-multithread.o
CC tests/test-throttle.o
CC tests/test-thread-pool.o
CC tests/test-hbitmap.o
CC tests/test-blockjob.o
CC tests/test-blockjob-txn.o
CC tests/test-x86-cpuid.o
CC tests/test-xbzrle.o
CC tests/test-vmstate.o
CC tests/test-cutils.o
CC tests/test-shift128.o
CC tests/test-mul64.o
CC tests/test-int128.o
CC tests/rcutorture.o
CC tests/test-rcu-list.o
CC tests/test-qdist.o
CC tests/test-qht.o
CC tests/test-qht-par.o
CC tests/qht-bench.o
CC tests/test-bitops.o
CC tests/test-bitcnt.o
CC tests/test-qdev-global-props.o
CC tests/check-qom-interface.o
CC tests/check-qom-proplist.o
CC tests/test-qemu-opts.o
CC tests/test-write-threshold.o
CC tests/test-crypto-hmac.o
CC tests/test-crypto-hash.o
CC tests/test-crypto-cipher.o
CC tests/test-crypto-secret.o
CC tests/test-crypto-tlscredsx509.o
CC tests/crypto-tls-x509-helpers.o
CC tests/pkix_asn1_tab.o
CC tests/test-crypto-tlssession.o
CC tests/test-qga.o
CC tests/libqtest.o
CC tests/test-timed-average.o
CC tests/test-io-task.o
CC tests/test-io-channel-socket.o
CC tests/io-channel-helpers.o
CC tests/test-io-channel-file.o
CC tests/test-io-channel-tls.o
CC tests/test-io-channel-command.o
CC tests/test-io-channel-buffer.o
CC tests/test-base64.o
CC tests/test-crypto-pbkdf.o
CC tests/test-crypto-ivgen.o
CC tests/test-crypto-afsplit.o
CC tests/test-crypto-xts.o
CC tests/test-crypto-block.o
CC tests/test-logging.o
CC tests/test-replication.o
CC tests/test-bufferiszero.o
CC tests/test-uuid.o
CC tests/ptimer-test.o
CC tests/ptimer-test-stubs.o
CC tests/boot-serial-test.o
CC tests/libqos/pci.o
CC tests/libqos/fw_cfg.o
CC tests/libqos/malloc.o
CC tests/libqos/i2c.o
CC tests/libqos/libqos.o
CC tests/tmp105-test.o
CC tests/libqos/i2c-omap.o
CC tests/ds1338-test.o
CC tests/libqos/i2c-imx.o
CC tests/m25p80-test.o
CC tests/virtio-blk-test.o
CC tests/libqos/malloc-spapr.o
CC tests/libqos/libqos-spapr.o
CC tests/libqos/rtas.o
CC tests/libqos/pci-spapr.o
CC tests/libqos/malloc-pc.o
CC tests/libqos/pci-pc.o
CC tests/libqos/libqos-pc.o
CC tests/libqos/ahci.o
CC tests/libqos/virtio.o
CC tests/libqos/virtio-mmio.o
CC tests/libqos/virtio-pci.o
CC tests/libqos/malloc-generic.o
CC tests/test-arm-mptimer.o
CC tests/endianness-test.o
CC tests/fdc-test.o
CC tests/ide-test.o
CC tests/ahci-test.o
CC tests/boot-order-test.o
CC tests/hd-geo-test.o
CC tests/bios-tables-test.o
CC tests/boot-sector.o
CC tests/pxe-test.o
CC tests/rtc-test.o
CC tests/ipmi-kcs-test.o
CC tests/ipmi-bt-test.o
CC tests/i440fx-test.o
CC tests/fw_cfg-test.o
CC tests/drive_del-test.o
CC tests/wdt_ib700-test.o
CC tests/tco-test.o
CC tests/e1000-test.o
CC tests/e1000e-test.o
CC tests/rtl8139-test.o
CC tests/pcnet-test.o
CC tests/eepro100-test.o
CC tests/ne2000-test.o
CC tests/nvme-test.o
CC tests/ac97-test.o
CC tests/es1370-test.o
CC tests/virtio-net-test.o
CC tests/virtio-balloon-test.o
CC tests/virtio-rng-test.o
CC tests/virtio-scsi-test.o
CC tests/virtio-9p-test.o
CC tests/virtio-console-test.o
CC tests/virtio-serial-test.o
CC tests/tpci200-test.o
CC tests/ipoctal232-test.o
CC tests/display-vga-test.o
CC tests/intel-hda-test.o
CC tests/ivshmem-test.o
CC tests/vmxnet3-test.o
CC tests/i82801b11-test.o
CC tests/pvpanic-test.o
CC tests/ioh3420-test.o
CC tests/usb-hcd-ohci-test.o
CC tests/libqos/usb.o
CC tests/usb-hcd-uhci-test.o
CC tests/usb-hcd-ehci-test.o
CC tests/usb-hcd-xhci-test.o
CC tests/pc-cpu-test.o
CC tests/test-netfilter.o
CC tests/q35-test.o
CC tests/test-filter-mirror.o
CC tests/test-filter-redirector.o
CC tests/postcopy-test.o
CC tests/test-x86-cpuid-compat.o
CC tests/spapr-phb-test.o
CC tests/prom-env-test.o
CC tests/pnv-xscom-test.o
CC tests/rtas-test.o
CC tests/device-introspect-test.o
CC tests/qom-test.o
LINK tests/check-qdict
LINK tests/test-char
LINK tests/check-qfloat
LINK tests/check-qint
LINK tests/check-qstring
LINK tests/check-qlist
LINK tests/check-qnull
LINK tests/check-qjson
CC tests/test-qapi-visit.o
CC tests/test-qapi-types.o
CC tests/test-qapi-event.o
CC tests/test-qmp-introspect.o
CC tests/test-qmp-marshal.o
LINK tests/test-coroutine
LINK tests/test-iov
LINK tests/test-aio
LINK tests/test-aio-multithread
LINK tests/test-throttle
LINK tests/test-thread-pool
LINK tests/test-hbitmap
LINK tests/test-blockjob
LINK tests/test-x86-cpuid
LINK tests/test-blockjob-txn
LINK tests/test-xbzrle
LINK tests/test-vmstate
LINK tests/test-cutils
LINK tests/test-shift128
LINK tests/test-int128
LINK tests/test-mul64
LINK tests/rcutorture
LINK tests/test-rcu-list
LINK tests/test-qdist
LINK tests/test-qht
LINK tests/qht-bench
LINK tests/test-bitops
LINK tests/test-bitcnt
LINK tests/test-qdev-global-props
LINK tests/check-qom-interface
LINK tests/check-qom-proplist
LINK tests/test-qemu-opts
LINK tests/test-write-threshold
LINK tests/test-crypto-hash
LINK tests/test-crypto-hmac
LINK tests/test-crypto-cipher
LINK tests/test-crypto-secret
LINK tests/test-crypto-tlscredsx509
LINK tests/test-crypto-tlssession
LINK tests/test-qga
LINK tests/test-timed-average
LINK tests/test-io-task
LINK tests/test-io-channel-socket
LINK tests/test-io-channel-file
LINK tests/test-io-channel-tls
LINK tests/test-io-channel-command
LINK tests/test-io-channel-buffer
LINK tests/test-base64
LINK tests/test-crypto-pbkdf
LINK tests/test-crypto-ivgen
LINK tests/test-crypto-afsplit
LINK tests/test-crypto-xts
LINK tests/test-crypto-block
LINK tests/test-logging
LINK tests/test-replication
LINK tests/test-bufferiszero
LINK tests/test-uuid
LINK tests/ptimer-test
LINK tests/boot-serial-test
LINK tests/tmp105-test
LINK tests/ds1338-test
LINK tests/m25p80-test
LINK tests/virtio-blk-test
LINK tests/test-arm-mptimer
LINK tests/endianness-test
LINK tests/fdc-test
LINK tests/ide-test
LINK tests/ahci-test
LINK tests/hd-geo-test
LINK tests/boot-order-test
LINK tests/bios-tables-test
LINK tests/pxe-test
LINK tests/rtc-test
LINK tests/ipmi-kcs-test
LINK tests/ipmi-bt-test
LINK tests/i440fx-test
LINK tests/fw_cfg-test
LINK tests/drive_del-test
LINK tests/wdt_ib700-test
LINK tests/tco-test
LINK tests/e1000-test
LINK tests/e1000e-test
LINK tests/rtl8139-test
LINK tests/pcnet-test
LINK tests/eepro100-test
LINK tests/ne2000-test
LINK tests/nvme-test
LINK tests/ac97-test
LINK tests/es1370-test
LINK tests/virtio-net-test
LINK tests/virtio-balloon-test
LINK tests/virtio-rng-test
LINK tests/virtio-scsi-test
LINK tests/virtio-9p-test
LINK tests/virtio-serial-test
LINK tests/virtio-console-test
LINK tests/tpci200-test
LINK tests/display-vga-test
LINK tests/ipoctal232-test
LINK tests/ivshmem-test
LINK tests/intel-hda-test
LINK tests/vmxnet3-test
LINK tests/pvpanic-test
LINK tests/i82801b11-test
LINK tests/ioh3420-test
LINK tests/usb-hcd-ohci-test
LINK tests/usb-hcd-ehci-test
LINK tests/usb-hcd-uhci-test
LINK tests/usb-hcd-xhci-test
LINK tests/pc-cpu-test
LINK tests/q35-test
LINK tests/test-netfilter
LINK tests/test-filter-mirror
LINK tests/test-filter-redirector
LINK tests/postcopy-test
LINK tests/test-x86-cpuid-compat
LINK tests/spapr-phb-test
LINK tests/prom-env-test
LINK tests/pnv-xscom-test
LINK tests/rtas-test
LINK tests/qom-test
LINK tests/device-introspect-test
GTESTER tests/test-char
GTESTER tests/check-qdict
GTESTER tests/check-qfloat
GTESTER tests/check-qint
GTESTER tests/check-qstring
GTESTER tests/check-qlist
GTESTER tests/check-qnull
GTESTER tests/check-qjson
LINK tests/test-qobject-output-visitor
LINK tests/test-qobject-input-visitor
LINK tests/test-clone-visitor
LINK tests/test-qobject-input-strict
LINK tests/test-qmp-commands
LINK tests/test-string-input-visitor
LINK tests/test-string-output-visitor
LINK tests/test-qmp-event
LINK tests/test-opts-visitor
GTESTER tests/test-coroutine
LINK tests/test-visitor-serialization
GTESTER tests/test-iov
GTESTER tests/test-aio
GTESTER tests/test-aio-multithread
GTESTER tests/test-throttle
GTESTER tests/test-thread-pool
GTESTER tests/test-hbitmap
GTESTER tests/test-blockjob
GTESTER tests/test-blockjob-txn
GTESTER tests/test-x86-cpuid
GTESTER tests/test-xbzrle
GTESTER tests/test-vmstate
GTESTER tests/test-cutils
GTESTER tests/test-shift128
GTESTER tests/test-mul64
GTESTER tests/test-int128
GTESTER tests/rcutorture
GTESTER tests/test-rcu-list
GTESTER tests/test-qdist
GTESTER tests/test-qht
LINK tests/test-qht-par
GTESTER tests/test-bitops
GTESTER tests/test-bitcnt
GTESTER tests/test-qdev-global-props
GTESTER tests/check-qom-interface
GTESTER tests/check-qom-proplist
GTESTER tests/test-qemu-opts
GTESTER tests/test-write-threshold
GTESTER tests/test-crypto-hash
GTESTER tests/test-crypto-hmac
GTESTER tests/test-crypto-cipher
GTESTER tests/test-crypto-secret
GTESTER tests/test-crypto-tlscredsx509
GTESTER tests/test-crypto-tlssession
GTESTER tests/test-qga
GTESTER tests/test-timed-average
GTESTER tests/test-io-task
GTESTER tests/test-io-channel-socket
GTESTER tests/test-io-channel-file
GTESTER tests/test-io-channel-tls
GTESTER tests/test-io-channel-command
GTESTER tests/test-io-channel-buffer
GTESTER tests/test-base64
GTESTER tests/test-crypto-pbkdf
GTESTER tests/test-crypto-ivgen
GTESTER tests/test-crypto-afsplit
GTESTER tests/test-crypto-xts
GTESTER tests/test-crypto-block
GTESTER tests/test-logging
GTESTER tests/test-replication
GTESTER tests/test-bufferiszero
GTESTER tests/test-uuid
GTESTER tests/ptimer-test
GTESTER check-qtest-aarch64
GTESTER check-qtest-alpha
GTESTER check-qtest-arm
GTESTER check-qtest-cris
GTESTER check-qtest-i386
GTESTER check-qtest-lm32
GTESTER check-qtest-m68k
GTESTER check-qtest-microblazeel
GTESTER check-qtest-microblaze
GTESTER check-qtest-mips64el
GTESTER check-qtest-mips64
GTESTER check-qtest-mipsel
GTESTER check-qtest-mips
GTESTER check-qtest-moxie
GTESTER check-qtest-nios2
GTESTER check-qtest-or1k
GTESTER check-qtest-ppc64
GTESTER check-qtest-ppcemb
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
GTESTER check-qtest-ppc
GTESTER check-qtest-s390x
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
GTester: last random seed: R02S67b79687214a158c46bc466678067fdb
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
/var/tmp/patchew-tester-tmp-_t3ms3un/src/tests/Makefile.include:793: recipe for target 'check-qtest-s390x' failed
make: *** [check-qtest-s390x] Error 1
make: *** Waiting for unfinished jobs....
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
Warning! iasl couldn't parse the expected aml
"kvm" accelerator not found.
"kvm" accelerator not found.
=== OUTPUT END ===
Test command exited with code: 2
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
@ 2017-02-28 12:07 ` Peter Maydell
1 sibling, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2017-02-28 12:07 UTC (permalink / raw)
To: QEMU Developers
On 27 February 2017 at 18:04, Peter Maydell <peter.maydell@linaro.org> wrote:
> ARM queu; includes all the NVIC rewrite patches.
> The QOMify-armv7m patchset hasn't got enough review just
> yet but I may be able to sneak it in before freeze
> tomorrow if it gets review. Didn't want to hold this lot
> up waiting, anyway.
>
> thanks
> -- PMM
>
>
> The following changes since commit 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51:
>
> Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2017-02-27-1' into staging (2017-02-27 15:33:21 +0000)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170227
>
> for you to fetch changes up to 94d5bcf5a7f3799660b62098a5183f161aad0601:
>
> hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-27 17:23:16 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * raspi2: implement RNG module, GPIO and new SD card controller
> (sufficient to boot new raspbian kernels)
> * sdhci: bugfixes for block transfers
> * virt: fix cpu object reference leak
> * Add missing fp_access_check() to aarch64 crypto instructions
> * cputlb: Don't assume do_unassigned_access() never returns
> * virt: Add a user option to disallow ITS instantiation
> * i.MX timers: fix reset handling
> * ARMv7M NVIC: rewrite to fix broken priority handling and masking
> * exynos: Fix proper mapping of CPUs by providing real cluster ID
> * exynos: Fix Linux kernel division by zero for PLLs
>
Unfortunately I see crashes or assert failures on the raspi2
model on OSX hosts. Not sure why OSX only, probably just that
the malloc/free has different patterns of reusing freed memory.
In any case we clearly didn't get the reparent-the-sdcard code
right, so I'm going to have to drop those patches for the moment :-(
thanks
-- PMM
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-02-09 11:02 Peter Maydell
2018-02-09 14:38 ` Peter Maydell
0 siblings, 1 reply; 42+ messages in thread
From: Peter Maydell @ 2018-02-09 11:02 UTC (permalink / raw)
To: qemu-devel
Another lump of target-arm patches. I still have some patches in
my to-review queue, but this is a big enough set that I wanted
to send it out.
thanks
-- PMM
The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000)
are available in the Git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209
for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec:
hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000)
----------------------------------------------------------------
target-arm queue:
* Support M profile derived exceptions on exception entry and exit
* Implement AArch64 v8.2 crypto insns (SHA-512, SHA-3, SM3, SM4)
* Implement working i.MX6 SD controller
* Various devices preparatory to i.MX7 support
* Preparatory patches for SVE emulation
* v8M: Fix bug in implementation of 'TT' insn
* Give useful error if user tries to use userspace GICv3 with KVM
----------------------------------------------------------------
Andrey Smirnov (10):
sdhci: Add i.MX specific subtype of SDHCI
hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC
i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks
i.MX: Add code to emulate i.MX2 watchdog IP block
i.MX: Add code to emulate i.MX7 SNVS IP-block
i.MX: Add code to emulate GPCv2 IP block
i.MX: Add i.MX7 GPT variant
i.MX: Add implementation of i.MX7 GPR IP block
usb: Add basic code to emulate Chipidea USB IP
hw/arm: Move virt's PSCI DT fixup code to arm/boot.c
Ard Biesheuvel (5):
target/arm: implement SHA-512 instructions
target/arm: implement SHA-3 instructions
target/arm: implement SM3 instructions
target/arm: implement SM4 instructions
target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support
Christoffer Dall (1):
target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM
Peter Maydell (9):
target/arm: Add armv7m_nvic_set_pending_derived()
target/arm: Split "get pending exception info" from "acknowledge it"
target/arm: Add ignore_stackfaults argument to v7m_exception_taken()
target/arm: Make v7M exception entry stack push check MPU
target/arm: Make v7m_push_callee_stack() honour MPU
target/arm: Make exception vector loads honour the SAU
target/arm: Handle exceptions during exception stack pop
target/arm/translate.c: Fix missing 'break' for TT insns
hw/core/generic-loader: Allow PC to be set on command line
Richard Henderson (5):
target/arm: Expand vector registers for SVE
target/arm: Add predicate registers for SVE
target/arm: Add SVE to migration state
target/arm: Add ZCR_ELx
target/arm: Add SVE state to TB->FLAGS
hw/intc/Makefile.objs | 2 +-
hw/misc/Makefile.objs | 4 +
hw/usb/Makefile.objs | 1 +
hw/sd/sdhci-internal.h | 23 ++
include/hw/intc/imx_gpcv2.h | 22 ++
include/hw/misc/imx2_wdt.h | 33 +++
include/hw/misc/imx7_ccm.h | 139 +++++++++++
include/hw/misc/imx7_gpr.h | 28 +++
include/hw/misc/imx7_snvs.h | 35 +++
include/hw/sd/sdhci.h | 13 ++
include/hw/timer/imx_gpt.h | 1 +
include/hw/usb/chipidea.h | 16 ++
target/arm/cpu.h | 120 ++++++++--
target/arm/helper.h | 12 +
target/arm/kvm_arm.h | 4 +
target/arm/translate.h | 2 +
hw/arm/boot.c | 65 ++++++
hw/arm/fsl-imx6.c | 2 +-
hw/arm/virt.c | 61 -----
hw/core/generic-loader.c | 2 +-
hw/intc/armv7m_nvic.c | 98 +++++++-
hw/intc/imx_gpcv2.c | 125 ++++++++++
hw/misc/imx2_wdt.c | 89 +++++++
hw/misc/imx7_ccm.c | 277 ++++++++++++++++++++++
hw/misc/imx7_gpr.c | 124 ++++++++++
hw/misc/imx7_snvs.c | 83 +++++++
hw/sd/sdhci.c | 230 ++++++++++++++++++-
hw/timer/imx_gpt.c | 25 ++
hw/usb/chipidea.c | 176 ++++++++++++++
linux-user/elfload.c | 19 ++
target/arm/cpu64.c | 4 +
target/arm/crypto_helper.c | 277 +++++++++++++++++++++-
target/arm/helper.c | 548 +++++++++++++++++++++++++++++++++++++-------
target/arm/machine.c | 88 ++++++-
target/arm/translate-a64.c | 350 +++++++++++++++++++++++++++-
target/arm/translate.c | 8 +-
hw/intc/trace-events | 5 +-
hw/misc/trace-events | 4 +
38 files changed, 2928 insertions(+), 187 deletions(-)
create mode 100644 include/hw/intc/imx_gpcv2.h
create mode 100644 include/hw/misc/imx2_wdt.h
create mode 100644 include/hw/misc/imx7_ccm.h
create mode 100644 include/hw/misc/imx7_gpr.h
create mode 100644 include/hw/misc/imx7_snvs.h
create mode 100644 include/hw/usb/chipidea.h
create mode 100644 hw/intc/imx_gpcv2.c
create mode 100644 hw/misc/imx2_wdt.c
create mode 100644 hw/misc/imx7_ccm.c
create mode 100644 hw/misc/imx7_gpr.c
create mode 100644 hw/misc/imx7_snvs.c
create mode 100644 hw/usb/chipidea.c
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2018-02-09 11:02 Peter Maydell
@ 2018-02-09 14:38 ` Peter Maydell
0 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2018-02-09 14:38 UTC (permalink / raw)
To: QEMU Developers
On 9 February 2018 at 11:02, Peter Maydell <peter.maydell@linaro.org> wrote:
> Another lump of target-arm patches. I still have some patches in
> my to-review queue, but this is a big enough set that I wanted
> to send it out.
>
> thanks
> -- PMM
>
> The following changes since commit 04bb7fe2bf55bdf66d5b7a5a719b40bbb4048178:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180208' into staging (2018-02-08 17:41:15 +0000)
>
> are available in the Git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180209
>
> for you to fetch changes up to bbba7757bacc9f890a3f028d328b4b429dbe78ec:
>
> hw/core/generic-loader: Allow PC to be set on command line (2018-02-09 10:55:40 +0000)
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 42+ messages in thread
* [Qemu-devel] [PULL 00/30] target-arm queue
@ 2018-08-16 13:34 Peter Maydell
2018-08-16 16:18 ` Peter Maydell
0 siblings, 1 reply; 42+ messages in thread
From: Peter Maydell @ 2018-08-16 13:34 UTC (permalink / raw)
To: qemu-devel
Less than a day of post-3.0 code review and already enough
patches for another pullreq :-)
thanks
-- PMM
The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:
Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816
for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb:
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100)
----------------------------------------------------------------
target-arm queue:
* Fixes for various bugs in SVE instructions
* Add model of Freescale i.MX6 UltraLite 14x14 EVK Board
* hw/arm: make bitbanded IO optional on ARMv7-M
* Add model of Cortex-M0 CPU
* Add support for loading Intel HEX files to the generic loader
* imx_spi: Unset XCH when TX FIFO becomes empty
* aspeed_sdmc: fix various bugs
* Fix bugs in Arm FP16 instruction support
* Fix aa64 FCADD and FCMLA decode
* softfloat: Fix missing inexact for floating-point add
* hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
----------------------------------------------------------------
Cédric Le Goater (1):
aspeed: add a max_ram_size property to the memory controller
Jean-Christophe Dubois (3):
i.MX6UL: Add i.MX6UL specific CCM device
i.MX6UL: Add i.MX6UL SOC
i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board
Joel Stanley (5):
aspeed_sdmc: Extend number of valid registers
aspeed_sdmc: Fix saved values
aspeed_sdmc: Set 'cache initial sequence' always true
aspeed_sdmc: Init status always idle
aspeed_sdmc: Handle ECC training
Richard Henderson (13):
target/arm: Fix typo in helper_sve_ld1hss_r
target/arm: Fix sign-extension in sve do_ldr/do_str
target/arm: Fix offset for LD1R instructions
target/arm: Fix offset scaling for LD_zprr and ST_zprr
target/arm: Reformat integer register dump
target/arm: Dump SVE state if enabled
target/arm: Add sve-max-vq cpu property to -cpu max
target/arm: Adjust FPCR_MASK for FZ16
target/arm: Ignore float_flag_input_denormal from fp_status_f16
target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h
target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half
target/arm: Fix aa64 FCADD and FCMLA decode
softfloat: Fix missing inexact for floating-point add
Stefan Hajnoczi (4):
hw/arm: make bitbanded IO optional on ARMv7-M
target/arm: add "cortex-m0" CPU model
loader: extract rom_free() function
loader: add rom transaction API
Su Hang (2):
loader: Implement .hex file loader
Add QTest testcase for the Intel Hexadecimal
Thomas Huth (1):
hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
Trent Piepho (1):
imx_spi: Unset XCH when TX FIFO becomes empty
configure | 4 +
hw/arm/Makefile.objs | 1 +
hw/misc/Makefile.objs | 1 +
tests/Makefile.include | 2 +
include/hw/arm/armv7m.h | 2 +
include/hw/arm/fsl-imx6ul.h | 339 ++++++++++++++
include/hw/loader.h | 31 ++
include/hw/misc/aspeed_sdmc.h | 4 +-
include/hw/misc/imx6ul_ccm.h | 226 +++++++++
target/arm/cpu.h | 5 +-
fpu/softfloat.c | 2 +-
hw/arm/armv7m.c | 37 +-
hw/arm/aspeed.c | 31 ++
hw/arm/aspeed_soc.c | 2 +
hw/arm/fsl-imx6ul.c | 617 ++++++++++++++++++++++++
hw/arm/mcimx6ul-evk.c | 85 ++++
hw/arm/mps2-tz.c | 32 +-
hw/arm/mps2.c | 1 +
hw/arm/msf2-soc.c | 1 +
hw/arm/stellaris.c | 1 +
hw/arm/stm32f205_soc.c | 1 +
hw/core/generic-loader.c | 4 +
hw/core/loader.c | 302 +++++++++++-
hw/misc/aspeed_sdmc.c | 55 ++-
hw/misc/imx6ul_ccm.c | 886 +++++++++++++++++++++++++++++++++++
hw/ssi/imx_spi.c | 3 +-
linux-user/syscall.c | 19 +-
target/arm/cpu.c | 17 +-
target/arm/cpu64.c | 29 ++
target/arm/helper.c | 18 +-
target/arm/sve_helper.c | 4 +-
target/arm/translate-a64.c | 120 ++++-
target/arm/translate-sve.c | 30 +-
tests/hexloader-test.c | 45 ++
MAINTAINERS | 6 +
default-configs/arm-softmmu.mak | 1 +
hw/misc/trace-events | 7 +
tests/hex-loader-check-data/test.hex | 18 +
38 files changed, 2863 insertions(+), 126 deletions(-)
create mode 100644 include/hw/arm/fsl-imx6ul.h
create mode 100644 include/hw/misc/imx6ul_ccm.h
create mode 100644 hw/arm/fsl-imx6ul.c
create mode 100644 hw/arm/mcimx6ul-evk.c
create mode 100644 hw/misc/imx6ul_ccm.c
create mode 100644 tests/hexloader-test.c
create mode 100644 tests/hex-loader-check-data/test.hex
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [Qemu-devel] [PULL 00/30] target-arm queue
2018-08-16 13:34 Peter Maydell
@ 2018-08-16 16:18 ` Peter Maydell
0 siblings, 0 replies; 42+ messages in thread
From: Peter Maydell @ 2018-08-16 16:18 UTC (permalink / raw)
To: QEMU Developers
On 16 August 2018 at 14:34, Peter Maydell <peter.maydell@linaro.org> wrote:
> Less than a day of post-3.0 code review and already enough
> patches for another pullreq :-)
>
> thanks
> -- PMM
>
> The following changes since commit c542a9f9794ec8e0bc3fcf5956d3cc8bce667789:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-tests-2018-08-16' into staging (2018-08-16 09:50:54 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180816
>
> for you to fetch changes up to fcf13ca556f462b52956059bf8fa622bc8575edb:
>
> hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj() (2018-08-16 14:29:58 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * Fixes for various bugs in SVE instructions
> * Add model of Freescale i.MX6 UltraLite 14x14 EVK Board
> * hw/arm: make bitbanded IO optional on ARMv7-M
> * Add model of Cortex-M0 CPU
> * Add support for loading Intel HEX files to the generic loader
> * imx_spi: Unset XCH when TX FIFO becomes empty
> * aspeed_sdmc: fix various bugs
> * Fix bugs in Arm FP16 instruction support
> * Fix aa64 FCADD and FCMLA decode
> * softfloat: Fix missing inexact for floating-point add
> * hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2018-08-16 16:18 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-03-04 11:41 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 01/30] target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 02/30] virt: Lift the maximum RAM limit from 30GB to 255GB Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 03/30] sd.c: Handle NULL block backend in sd_get_inserted() Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 04/30] sdhci: Implement DeviceClass reset Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 05/30] hw/arm/virt: Provide a secure-only RAM if booting in Secure mode Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 06/30] loader: Add load_image_mr() to load ROM image to a MemoryRegion Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: Load bios image to MemoryRegion, not physaddr Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 08/30] hw/arm/virt: Make first flash device Secure-only if booting secure Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 09/30] hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is provided Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 10/30] bcm2835_mbox/property: replace ldl_phys/stl_phys with endian-specific accesses Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 11/30] linux-user: arm: fix coding style for some linux-user signal functions Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 12/30] linux-user: arm: pass env to get_user_code_* Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 13/30] target-arm: implement SCTLR.B, drop bswap_code Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 14/30] target-arm: cpu: Move cpu_is_big_endian to header Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 16/30] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 17/30] linux-user: arm: handle CPSR.E correctly in strex emulation Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 18/30] target-arm: implement SCTLR.EE Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 19/30] target-arm: pass DisasContext to gen_aa32_ld*/st* Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 20/30] target-arm: introduce disas flag for endianness Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 21/30] target-arm: a64: Add endianness support Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 22/30] target-arm: introduce tbflag for endianness Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 23/30] target-arm: implement setend Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 24/30] target-arm: implement BE32 mode in system emulation Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 25/30] loader: add API to load elf header Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 26/30] loader: load_elf(): Add doc comment Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 27/30] loader: Add data swap option to load-elf Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 28/30] arm: boot: Support big-endian elfs Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 29/30] hw/intc/arm_gic.c: Implement GICv2 GICC_DIR Peter Maydell
2016-03-04 11:41 ` [Qemu-devel] [PULL 30/30] target-arm: Only trap SRS from S-EL1 if specified mode is MON Peter Maydell
2016-03-04 14:05 ` [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2018-08-16 13:34 Peter Maydell
2018-08-16 16:18 ` Peter Maydell
2018-02-09 11:02 Peter Maydell
2018-02-09 14:38 ` Peter Maydell
2017-02-27 18:04 Peter Maydell
2017-02-27 19:14 ` no-reply
2017-02-28 12:07 ` Peter Maydell
2016-06-14 14:13 Peter Maydell
2014-02-20 11:17 Peter Maydell
2014-02-21 16:01 ` Peter Maydell
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