From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40877) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1abo7Q-00050f-7X for qemu-devel@nongnu.org; Fri, 04 Mar 2016 06:42:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1abo7P-000180-BP for qemu-devel@nongnu.org; Fri, 04 Mar 2016 06:42:04 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:56101) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1abo7P-00017t-5Q for qemu-devel@nongnu.org; Fri, 04 Mar 2016 06:42:03 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84) (envelope-from ) id 1abo7O-0001vs-Lf for qemu-devel@nongnu.org; Fri, 04 Mar 2016 11:42:02 +0000 From: Peter Maydell Date: Fri, 4 Mar 2016 11:41:38 +0000 Message-Id: <1457091713-10138-16-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1457091713-10138-1-git-send-email-peter.maydell@linaro.org> References: <1457091713-10138-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 15/30] arm: cpu: handle BE32 user-mode as BE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Peter Crosthwaite endian with address manipulations on subword accesses (to give the illusion of BE). But user-mode cannot tell the difference and is already implemented as straight BE. So handle the difference in the endianess query, where USER mode is BE and system is not. Signed-off-by: Peter Crosthwaite Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/cpu.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 75e5ea0..ab0ea92 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1915,7 +1915,22 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) /* In 32bit endianness is determined by looking at CPSR's E bit */ if (!is_a64(env)) { - return (env->uncached_cpsr & CPSR_E) ? 1 : 0; + return +#ifdef CONFIG_USER_ONLY + /* In system mode, BE32 is modelled in line with the + * architecture (as word-invariant big-endianness), where loads + * and stores are done little endian but from addresses which + * are adjusted by XORing with the appropriate constant. So the + * endianness to use for the raw data access is not affected by + * SCTLR.B. + * In user mode, however, we model BE32 as byte-invariant + * big-endianness (because user-only code cannot tell the + * difference), and so we need to use a data access endianness + * that depends on SCTLR.B. + */ + arm_sctlr_b(env) || +#endif + ((env->uncached_cpsr & CPSR_E) ? 1 : 0); } cur_el = arm_current_el(env); -- 1.9.1