From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40550) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aea8y-0000yL-CY for qemu-devel@nongnu.org; Fri, 11 Mar 2016 22:23:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aea8u-0001EI-Ad for qemu-devel@nongnu.org; Fri, 11 Mar 2016 22:23:08 -0500 Received: from mail-lb0-x236.google.com ([2a00:1450:4010:c04::236]:33161) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aea8t-0001DO-T6 for qemu-devel@nongnu.org; Fri, 11 Mar 2016 22:23:04 -0500 Received: by mail-lb0-x236.google.com with SMTP id k15so180452771lbg.0 for ; Fri, 11 Mar 2016 19:23:03 -0800 (PST) From: Max Filippov Date: Sat, 12 Mar 2016 06:22:43 +0300 Message-Id: <1457752963-4565-1-git-send-email-jcmvbkbc@gmail.com> Subject: [Qemu-devel] [PATCH] target-xtensa: use global registers for the register window List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson Signed-off-by: Max Filippov --- target-xtensa/cpu.c | 1 + target-xtensa/cpu.h | 5 +++-- target-xtensa/op_helper.c | 48 ++++++++++++----------------------------------- target-xtensa/translate.c | 7 +++++-- 4 files changed, 21 insertions(+), 40 deletions(-) diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index d572d56..2b9575f 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -69,6 +69,7 @@ static void xtensa_cpu_reset(CPUState *s) XTENSA_OPTION_ATOMCTL) ? 0x28 : 0x15; env->sregs[CONFIGID0] = env->config->configid[0]; env->sregs[CONFIGID1] = env->config->configid[1]; + rotate_window_abs(env, env->sregs[WINDOW_BASE]); env->pending_irq_level = 0; reset_mmu(env); diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index d0bd9da..5bace52 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -350,11 +350,11 @@ enum { typedef struct CPUXtensaState { const XtensaConfig *config; - uint32_t regs[16]; + uint32_t *regs; uint32_t pc; uint32_t sregs[256]; uint32_t uregs[256]; - uint32_t phys_regs[MAX_NAREG]; + uint32_t phys_regs[MAX_NAREG + 12]; union { float32 f32[2]; float64 f64; @@ -408,6 +408,7 @@ void xtensa_timer_irq(CPUXtensaState *env, uint32_t id, uint32_t active); void xtensa_rearm_ccompare_timer(CPUXtensaState *env); int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc); void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void rotate_window_abs(CPUXtensaState *env, uint32_t position); void xtensa_sync_window_from_phys(CPUXtensaState *env); void xtensa_sync_phys_from_window(CPUXtensaState *env); uint32_t xtensa_tlb_get_addr_mask(const CPUXtensaState *env, bool dtlb, uint32_t way); diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index 62fa33d..7f69f4b 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -172,39 +172,6 @@ uint32_t HELPER(nsau)(uint32_t v) return v ? clz32(v) : 32; } -static void copy_window_from_phys(CPUXtensaState *env, - uint32_t window, uint32_t phys, uint32_t n) -{ - assert(phys < env->config->nareg); - if (phys + n <= env->config->nareg) { - memcpy(env->regs + window, env->phys_regs + phys, - n * sizeof(uint32_t)); - } else { - uint32_t n1 = env->config->nareg - phys; - memcpy(env->regs + window, env->phys_regs + phys, - n1 * sizeof(uint32_t)); - memcpy(env->regs + window + n1, env->phys_regs, - (n - n1) * sizeof(uint32_t)); - } -} - -static void copy_phys_from_window(CPUXtensaState *env, - uint32_t phys, uint32_t window, uint32_t n) -{ - assert(phys < env->config->nareg); - if (phys + n <= env->config->nareg) { - memcpy(env->phys_regs + phys, env->regs + window, - n * sizeof(uint32_t)); - } else { - uint32_t n1 = env->config->nareg - phys; - memcpy(env->phys_regs + phys, env->regs + window, - n1 * sizeof(uint32_t)); - memcpy(env->phys_regs, env->regs + window + n1, - (n - n1) * sizeof(uint32_t)); - } -} - - static inline unsigned windowbase_bound(unsigned a, const CPUXtensaState *env) { return a & (env->config->nareg / 4 - 1); @@ -217,18 +184,27 @@ static inline unsigned windowstart_bit(unsigned a, const CPUXtensaState *env) void xtensa_sync_window_from_phys(CPUXtensaState *env) { - copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16); + if (env->sregs[WINDOW_BASE] * 4 + 16 > env->config->nareg) { + memcpy(env->phys_regs + env->config->nareg, env->phys_regs, + (env->sregs[WINDOW_BASE] * 4 + 16 - env->config->nareg) * + sizeof(uint32_t)); + } } void xtensa_sync_phys_from_window(CPUXtensaState *env) { - copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16); + if (env->sregs[WINDOW_BASE] * 4 + 16 > env->config->nareg) { + memcpy(env->phys_regs, env->phys_regs + env->config->nareg, + (env->sregs[WINDOW_BASE] * 4 + 16 - env->config->nareg) * + sizeof(uint32_t)); + } } -static void rotate_window_abs(CPUXtensaState *env, uint32_t position) +void rotate_window_abs(CPUXtensaState *env, uint32_t position) { xtensa_sync_phys_from_window(env); env->sregs[WINDOW_BASE] = windowbase_bound(position, env); + env->regs = env->phys_regs + env->sregs[WINDOW_BASE] * 4; xtensa_sync_window_from_phys(env); } diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 9894488..c988511 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -75,6 +75,7 @@ typedef struct DisasContext { } DisasContext; static TCGv_env cpu_env; +static TCGv_ptr cpu_regs; static TCGv_i32 cpu_pc; static TCGv_i32 cpu_R[16]; static TCGv_i32 cpu_FR[16]; @@ -218,12 +219,14 @@ void xtensa_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + cpu_regs = tcg_global_mem_new_ptr(cpu_env, + offsetof(CPUXtensaState, regs), "regs"); cpu_pc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUXtensaState, pc), "pc"); for (i = 0; i < 16; i++) { - cpu_R[i] = tcg_global_mem_new_i32(cpu_env, - offsetof(CPUXtensaState, regs[i]), + cpu_R[i] = tcg_global_mem_new_i32(cpu_regs, + i * sizeof(uint32_t), regnames[i]); } -- 2.1.4