From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44152) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afJtV-0002B0-LX for qemu-devel@nongnu.org; Mon, 14 Mar 2016 00:14:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1afJtU-0000Vj-J5 for qemu-devel@nongnu.org; Mon, 14 Mar 2016 00:14:13 -0400 From: Andrew Jeffery Date: Mon, 14 Mar 2016 14:43:48 +1030 Message-Id: <1457928832-31026-1-git-send-email-andrew@aj.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v4 0/4] Add ASPEED AST2400 SoC and OpenPower BMC machine List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Alexey Kardashevskiy , qemu-devel@nongnu.org, qemu-arm@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Jeremy Kerr This patch series models enough of the ASPEED AST2400 ARM9 SoC[0] to boot= an aspeed_defconfig Linux kernel[1][2]. Specifically, the series implements = the ASPEED timer and VIC devices, integrates them into an AST2400 SoC and exp= oses it all through a new opbmc2400 machine. The device model patches only par= tially implement the hardware features of the timer and VIC, again mostly just e= nough to boot Linux. Unfortunately the datasheet describing the devices is not generally avail= able, but I'll try to add comments to any unclear areas. The addition of the AST2400 to QEMU is motivated by use of the SoC as a B= MC in OpenPOWER[2][3] machines and the ongoing development of OpenBMC[4]. The presence of a machine model utilising the AST2400 will help with developm= ent and testing of the OpenBMC stack. Cheers, Andrew [0] http://www.aspeedtech.com/products.php?fPath=3D20&rId=3D376 [1] https://github.com/openbmc/linux/tree/dev-4.3 [2] git fetch git@github.com:openbmc/linux.git dev-4.3 [3] http://openpowerfoundation.org/ [4] https://github.com/open-power/ [5] https://github.com/openbmc/openbmc Changes since v3: Address comments from Peter Maydell, splitting the machine model from hw/arm/ast2400.c into hw/arm/opbmc2400.c amongst other minor cleanups t= o the timer and VIC. Changes since v2: This re-roll is a reasonable rework of the patches in the series, which= may make it difficult to compare v1 to v2. Addressed reviews/comments from: * Peter Maydell * Alexey Kardashevskiy * Joel Stanley Changes since v1: Addressed reviews/comments from: * C=C3=A9dric Le Goater Andrew Jeffery (4): hw/timer: Add ASPEED timer device model hw/intc: Add (new) ASPEED VIC device model hw/arm: Add an ASPEED AST2400 SoC hw/arm: Add opbmc2400, an AST2400-based OpenPOWER BMC machine default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/ast2400.c | 137 ++++++++++++ hw/arm/opbmc2400.c | 66 ++++++ hw/intc/Makefile.objs | 1 + hw/intc/aspeed_vic.c | 339 ++++++++++++++++++++++++++++++ hw/timer/Makefile.objs | 1 + hw/timer/aspeed_timer.c | 451 ++++++++++++++++++++++++++++++++++= ++++++ include/hw/arm/ast2400.h | 35 ++++ include/hw/intc/aspeed_vic.h | 48 +++++ include/hw/timer/aspeed_timer.h | 59 ++++++ trace-events | 16 ++ 12 files changed, 1155 insertions(+) create mode 100644 hw/arm/ast2400.c create mode 100644 hw/arm/opbmc2400.c create mode 100644 hw/intc/aspeed_vic.c create mode 100644 hw/timer/aspeed_timer.c create mode 100644 include/hw/arm/ast2400.h create mode 100644 include/hw/intc/aspeed_vic.h create mode 100644 include/hw/timer/aspeed_timer.h --=20 2.5.0