From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50230) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afUqr-0005Se-8r for qemu-devel@nongnu.org; Mon, 14 Mar 2016 11:56:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1afUqn-0005Jz-3c for qemu-devel@nongnu.org; Mon, 14 Mar 2016 11:56:13 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:36361) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afUqm-0005Js-Ti for qemu-devel@nongnu.org; Mon, 14 Mar 2016 11:56:09 -0400 Received: by mail-wm0-x242.google.com with SMTP id l68so16039171wml.3 for ; Mon, 14 Mar 2016 08:56:08 -0700 (PDT) From: Nikos Filippakis Date: Mon, 14 Mar 2016 17:56:00 +0200 Message-Id: <1457970960-25883-1-git-send-email-aesmade@gmail.com> Subject: [Qemu-devel] [PATCH 2/4] omap1: Change qemu_system_reset_request to watchdog_perform_action where appropriate List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Nikos Filippakis , peter.maydell@linaro.org Instead of using qemu_system_reset_request() to reset when a watchdog triggers, let watchdog_perform_action() decide what to do, as stated in the BiteSizedTasks wiki page. Signed-off-by: Nikos Filippakis --- hw/arm/omap1.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 6f68130..4c719f8 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -28,6 +28,7 @@ #include "sysemu/blockdev.h" #include "qemu/range.h" #include "hw/sysbus.h" +#include "sysemu/watchdog.h" /* Should signal the TCMI/GPMC */ uint32_t omap_badwidth_read8(void *opaque, hwaddr addr) @@ -349,7 +350,7 @@ static void omap_wd_timer_write(void *opaque, hwaddr addr, /* XXX: on T|E hardware somehow this has no effect, * on Zire 71 it works as specified. */ s->reset = 1; - qemu_system_reset_request(); + watchdog_perform_action(); } } s->last_wr = value & 0xff; -- 1.9.1