From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39992) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afVnu-0000AX-Qv for qemu-devel@nongnu.org; Mon, 14 Mar 2016 12:57:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1afVnq-0004wg-RK for qemu-devel@nongnu.org; Mon, 14 Mar 2016 12:57:14 -0400 Received: from e06smtp11.uk.ibm.com ([195.75.94.107]:42982) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afVnq-0004vA-JZ for qemu-devel@nongnu.org; Mon, 14 Mar 2016 12:57:10 -0400 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 14 Mar 2016 16:57:08 -0000 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 14 Mar 2016 17:56:28 +0100 Message-Id: <1457974600-13828-6-git-send-email-clg@fr.ibm.com> In-Reply-To: <1457974600-13828-1-git-send-email-clg@fr.ibm.com> References: <1457974600-13828-1-git-send-email-clg@fr.ibm.com> Subject: [Qemu-devel] [PATCH 05/17] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: Thomas Huth , qemu-ppc@nongnu.org, qemu-devel@nongnu.org From: Benjamin Herrenschmidt This helper is only used by the various instructions that can alter MSR and not interrupts. Add a comment to that effect to the interrupt code as well in case somebody wants to change this Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson --- target-ppc/excp_helper.c | 8 ++++++-- target-ppc/helper_regs.h | 4 ++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index c890853d861b..37d4721db63b 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -666,8 +666,12 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } } #endif - /* XXX: we don't use hreg_store_msr here as already have treated - * any special case that could occur. Just store MSR and update hflags + /* We don't use hreg_store_msr here as already have treated + * any special case that could occur. Just store MSR and update hflags + * + * Note: We *MUST* not use hreg_store_msr() as-is anyway because it + * will prevent setting of the HV bit which some exceptions might need + * to do. */ env->msr = new_msr & env->msr_mask; hreg_compute_hflags(env); diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h index 271fddf17f0a..844240d1a755 100644 --- a/target-ppc/helper_regs.h +++ b/target-ppc/helper_regs.h @@ -75,8 +75,8 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, excp = 0; value &= env->msr_mask; #if !defined(CONFIG_USER_ONLY) - if (!alter_hv) { - /* mtmsr cannot alter the hypervisor state */ + /* Neither mtmsr nor guest state can alter HV */ + if (!alter_hv || !(env->msr & MSR_HVB)) { value &= ~MSR_HVB; value |= env->msr & MSR_HVB; } -- 2.1.4