From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43728) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afto9-0006eu-FI for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1afto8-0001qJ-30 for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47132) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afto7-0001pt-Rx for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:03 -0400 From: Markus Armbruster Date: Tue, 15 Mar 2016 19:34:33 +0100 Message-Id: <1458066895-20632-19-git-send-email-armbru@redhat.com> In-Reply-To: <1458066895-20632-1-git-send-email-armbru@redhat.com> References: <1458066895-20632-1-git-send-email-armbru@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 18/40] ivshmem: Clean up register callbacks List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: claudio.fontana@huawei.com, cam@cs.ualberta.ca, mlureau@redhat.com, david.marchand@6wind.com, pbonzini@redhat.com Signed-off-by: Markus Armbruster Reviewed-by: Marc-Andr=C3=A9 Lureau --- hw/misc/ivshmem.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 51ad255..1debce3 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -121,12 +121,10 @@ static inline uint32_t ivshmem_has_feature(IVShmemS= tate *ivs, return (ivs->features & (1 << feature)); } =20 -/* accessing registers - based on rtl8139 */ static void ivshmem_update_irq(IVShmemState *s) { PCIDevice *d =3D PCI_DEVICE(s); - int isr; - isr =3D (s->intrstatus & s->intrmask) & 0xffffffff; + uint32_t isr =3D s->intrstatus & s->intrmask; =20 /* don't print ISR resets */ if (isr) { @@ -134,7 +132,7 @@ static void ivshmem_update_irq(IVShmemState *s) isr ? 1 : 0, s->intrstatus, s->intrmask); } =20 - pci_set_irq(d, (isr !=3D 0)); + pci_set_irq(d, isr !=3D 0); } =20 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) @@ -142,7 +140,6 @@ static void ivshmem_IntrMask_write(IVShmemState *s, u= int32_t val) IVSHMEM_DPRINTF("IntrMask write(w) val =3D 0x%04x\n", val); =20 s->intrmask =3D val; - ivshmem_update_irq(s); } =20 @@ -151,7 +148,6 @@ static uint32_t ivshmem_IntrMask_read(IVShmemState *s= ) uint32_t ret =3D s->intrmask; =20 IVSHMEM_DPRINTF("intrmask read(w) val =3D 0x%04x\n", ret); - return ret; } =20 @@ -160,7 +156,6 @@ static void ivshmem_IntrStatus_write(IVShmemState *s,= uint32_t val) IVSHMEM_DPRINTF("IntrStatus write(w) val =3D 0x%04x\n", val); =20 s->intrstatus =3D val; - ivshmem_update_irq(s); } =20 @@ -170,9 +165,7 @@ static uint32_t ivshmem_IntrStatus_read(IVShmemState = *s) =20 /* reading ISR clears all interrupts */ s->intrstatus =3D 0; - ivshmem_update_irq(s); - return ret; } =20 --=20 2.4.3