From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43739) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afto9-0006fr-Pv for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1afto8-0001qT-4Q for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49167) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1afto7-0001q1-V2 for qemu-devel@nongnu.org; Tue, 15 Mar 2016 14:35:04 -0400 From: Markus Armbruster Date: Tue, 15 Mar 2016 19:34:35 +0100 Message-Id: <1458066895-20632-21-git-send-email-armbru@redhat.com> In-Reply-To: <1458066895-20632-1-git-send-email-armbru@redhat.com> References: <1458066895-20632-1-git-send-email-armbru@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 20/40] ivshmem: Leave INTx alone when using MSI-X List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: claudio.fontana@huawei.com, cam@cs.ualberta.ca, mlureau@redhat.com, david.marchand@6wind.com, pbonzini@redhat.com The ivshmem device can either use MSI-X or legacy INTx for interrupts. With MSI-X enabled, peer interrupt events trigger an MSI as they should. But software can still raise INTx via interrupt status and mask register in BAR 0. This is explicitly prohibited by PCI Local Bus Specification Revision 3.0, section 6.8.3.3: While enabled for MSI or MSI-X operation, a function is prohibited from using its INTx# pin (if implemented) to request service (MSI, MSI-X, and INTx# are mutually exclusive). Fix the device model to leave INTx alone when using MSI-X. Document that we claim to use INTx in config space even when we don't. Unlike other devices, ivshmem does *not* use INTx when configured for MSI-X and MSI-X isn't enabled by software. Signed-off-by: Markus Armbruster Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Paolo Bonzini --- hw/misc/ivshmem.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index abcb1c1..65e3a76 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -126,6 +126,11 @@ static void ivshmem_update_irq(IVShmemState *s) PCIDevice *d =3D PCI_DEVICE(s); uint32_t isr =3D s->intrstatus & s->intrmask; =20 + /* No INTx with msi=3Don, whether the guest enabled MSI-X or not */ + if (ivshmem_has_feature(s, IVSHMEM_MSI)) { + return; + } + /* don't print ISR resets */ if (isr) { IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n", @@ -873,6 +878,10 @@ static void pci_ivshmem_realize(PCIDevice *dev, Erro= r **errp) pci_conf =3D dev->config; pci_conf[PCI_COMMAND] =3D PCI_COMMAND_IO | PCI_COMMAND_MEMORY; =20 + /* + * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a + * bald-faced lie then. But it's a backwards compatible lie. + */ pci_config_set_interrupt_pin(pci_conf, 1); =20 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops= , s, --=20 2.4.3