From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 26/49] ppc: use PowerPCCPU instead of CPUPPCState
Date: Wed, 16 Mar 2016 11:46:36 +0100 [thread overview]
Message-ID: <1458125219-131698-27-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1458125219-131698-1-git-send-email-pbonzini@redhat.com>
This changes a cpu.h dependency for hw/ppc/ppc.h into a cpu-qom.h
dependency. For it to compile we also need to clean up a few unused
definitions.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/ppc/ppc.c | 20 +++++-----
include/hw/ppc/ppc.h | 24 +++++++-----
target-ppc/translate_init.c | 92 +++++++++++++++++++--------------------------
3 files changed, 63 insertions(+), 73 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index d2167bb..69289b7 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -164,9 +164,9 @@ static void ppc6xx_set_irq(void *opaque, int pin, int level)
}
}
-void ppc6xx_irq_init(CPUPPCState *env)
+void ppc6xx_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc6xx_set_irq, cpu,
PPC6xx_INPUT_NB);
@@ -251,9 +251,9 @@ static void ppc970_set_irq(void *opaque, int pin, int level)
}
}
-void ppc970_irq_init(CPUPPCState *env)
+void ppc970_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc970_set_irq, cpu,
PPC970_INPUT_NB);
@@ -287,9 +287,9 @@ static void power7_set_irq(void *opaque, int pin, int level)
}
}
-void ppcPOWER7_irq_init(CPUPPCState *env)
+void ppcPOWER7_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
POWER7_INPUT_NB);
@@ -372,9 +372,9 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
}
}
-void ppc40x_irq_init(CPUPPCState *env)
+void ppc40x_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppc40x_set_irq,
cpu, PPC40x_INPUT_NB);
@@ -436,9 +436,9 @@ static void ppce500_set_irq(void *opaque, int pin, int level)
}
}
-void ppce500_irq_init(CPUPPCState *env)
+void ppce500_irq_init(PowerPCCPU *cpu)
{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
+ CPUPPCState *env = &cpu->env;
env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
cpu, PPCE500_INPUT_NB);
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index 14efd0c..5617dc4 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -1,6 +1,8 @@
#ifndef HW_PPC_H
#define HW_PPC_H 1
+#include "target-ppc/cpu-qom.h"
+
void ppc_set_irq(PowerPCCPU *cpu, int n_IRQ, int level);
/* PowerPC hardware exceptions management helpers */
@@ -64,17 +66,21 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,
void ppc40x_core_reset(PowerPCCPU *cpu);
void ppc40x_chip_reset(PowerPCCPU *cpu);
void ppc40x_system_reset(PowerPCCPU *cpu);
-void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
-
-extern CPUWriteMemoryFunc * const PPC_io_write[];
-extern CPUReadMemoryFunc * const PPC_io_read[];
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
-void ppc40x_irq_init (CPUPPCState *env);
-void ppce500_irq_init (CPUPPCState *env);
-void ppc6xx_irq_init (CPUPPCState *env);
-void ppc970_irq_init (CPUPPCState *env);
-void ppcPOWER7_irq_init (CPUPPCState *env);
+#if defined(CONFIG_USER_ONLY)
+static inline void ppc40x_irq_init(PowerPCCPU *cpu) {}
+static inline void ppc6xx_irq_init(PowerPCCPU *cpu) {}
+static inline void ppc970_irq_init(PowerPCCPU *cpu) {}
+static inline void ppcPOWER7_irq_init(PowerPCCPU *cpu) {}
+static inline void ppce500_irq_init(PowerPCCPU *cpu) {}
+#else
+void ppc40x_irq_init(PowerPCCPU *cpu);
+void ppce500_irq_init(PowerPCCPU *cpu);
+void ppc6xx_irq_init(PowerPCCPU *cpu);
+void ppc970_irq_init(PowerPCCPU *cpu);
+void ppcPOWER7_irq_init(PowerPCCPU *cpu);
+#endif
/* PPC machines for OpenBIOS */
enum {
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index bd0cffc..c1698da 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -31,29 +31,13 @@
#include "qemu/error-report.h"
#include "qapi/visitor.h"
#include "hw/qdev-properties.h"
+#include "hw/ppc/ppc.h"
//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
//#define PPC_DUMP_SPR_ACCESSES
/* #define USE_APPLE_GDB */
-/* For user-mode emulation, we don't emulate any IRQ controller */
-#if defined(CONFIG_USER_ONLY)
-#define PPC_IRQ_INIT_FN(name) \
-static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \
-{ \
-}
-#else
-#define PPC_IRQ_INIT_FN(name) \
-void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
-#endif
-
-PPC_IRQ_INIT_FN(40x);
-PPC_IRQ_INIT_FN(6xx);
-PPC_IRQ_INIT_FN(970);
-PPC_IRQ_INIT_FN(POWER7);
-PPC_IRQ_INIT_FN(e500);
-
/* Generic callbacks:
* do nothing but store/retrieve spr value
*/
@@ -3162,7 +3146,7 @@ static void init_proc_401 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3216,7 +3200,7 @@ static void init_proc_401x2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3268,7 +3252,7 @@ static void init_proc_401x3 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3327,7 +3311,7 @@ static void init_proc_IOP480 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3378,7 +3362,7 @@ static void init_proc_403 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3444,7 +3428,7 @@ static void init_proc_403GCX (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3510,7 +3494,7 @@ static void init_proc_405 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3608,7 +3592,7 @@ static void init_proc_440EP (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -3878,7 +3862,7 @@ static void init_proc_440x5 (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -4300,7 +4284,7 @@ static void init_proc_G2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2)(ObjectClass *oc, void *data)
@@ -4379,7 +4363,7 @@ static void init_proc_G2LE (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2LE)(ObjectClass *oc, void *data)
@@ -4632,7 +4616,7 @@ static void init_proc_e300 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
@@ -4887,7 +4871,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
init_excp_e200(env, ivpr_mask);
/* Allocate hardware IRQ controller */
- ppce500_irq_init(env);
+ ppce500_irq_init(ppc_env_get_cpu(env));
}
static void init_proc_e500v1(CPUPPCState *env)
@@ -5131,7 +5115,7 @@ static void init_proc_601 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 64;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
@@ -5235,7 +5219,7 @@ static void init_proc_602 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(602)(ObjectClass *oc, void *data)
@@ -5304,7 +5288,7 @@ static void init_proc_603 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603)(ObjectClass *oc, void *data)
@@ -5370,7 +5354,7 @@ static void init_proc_603E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
@@ -5430,7 +5414,7 @@ static void init_proc_604 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604)(ObjectClass *oc, void *data)
@@ -5513,7 +5497,7 @@ static void init_proc_604E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604E)(ObjectClass *oc, void *data)
@@ -5583,7 +5567,7 @@ static void init_proc_740 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(740)(ObjectClass *oc, void *data)
@@ -5661,7 +5645,7 @@ static void init_proc_750 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750)(ObjectClass *oc, void *data)
@@ -5824,7 +5808,7 @@ static void init_proc_750cl (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data)
@@ -5944,7 +5928,7 @@ static void init_proc_750cx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data)
@@ -6031,7 +6015,7 @@ static void init_proc_750fx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data)
@@ -6118,7 +6102,7 @@ static void init_proc_750gx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data)
@@ -6196,7 +6180,7 @@ static void init_proc_745 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(745)(ObjectClass *oc, void *data)
@@ -6282,7 +6266,7 @@ static void init_proc_755 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(755)(ObjectClass *oc, void *data)
@@ -6351,7 +6335,7 @@ static void init_proc_7400 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7400)(ObjectClass *oc, void *data)
@@ -6435,7 +6419,7 @@ static void init_proc_7410 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7410)(ObjectClass *oc, void *data)
@@ -6545,7 +6529,7 @@ static void init_proc_7440 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7440)(ObjectClass *oc, void *data)
@@ -6678,7 +6662,7 @@ static void init_proc_7450 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7450)(ObjectClass *oc, void *data)
@@ -6814,7 +6798,7 @@ static void init_proc_7445 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7445)(ObjectClass *oc, void *data)
@@ -6952,7 +6936,7 @@ static void init_proc_7455 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7455)(ObjectClass *oc, void *data)
@@ -7114,7 +7098,7 @@ static void init_proc_7457 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7457)(ObjectClass *oc, void *data)
@@ -7251,7 +7235,7 @@ static void init_proc_e600 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
@@ -7915,12 +7899,12 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
case BOOK3S_CPU_970:
case BOOK3S_CPU_POWER5PLUS:
init_excp_970(env);
- ppc970_irq_init(env);
+ ppc970_irq_init(ppc_env_get_cpu(env));
break;
case BOOK3S_CPU_POWER7:
case BOOK3S_CPU_POWER8:
init_excp_POWER7(env);
- ppcPOWER7_irq_init(env);
+ ppcPOWER7_irq_init(ppc_env_get_cpu(env));
break;
default:
g_assert_not_reached();
--
1.8.3.1
next prev parent reply other threads:[~2016-03-16 10:47 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-16 10:46 [Qemu-devel] [PATCH for-2.7 00/49] NEED_CPU_H and cpu.h cleanups Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 01/49] include: move CPU-related definitions out of qemu-common.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 02/49] log: do not use CONFIG_USER_ONLY Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 03/49] hw: explicitly include qemu-common.h and cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 04/49] cpu: make cpu-qom.h only include-able from cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 05/49] target-alpha: make cpu-qom.h not target specific Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 06/49] target-arm: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 07/49] target-cris: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 08/49] target-i386: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 09/49] target-lm32: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 10/49] target-m68k: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 11/49] target-microblaze: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 12/49] target-mips: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 13/49] target-ppc: do not use target_ulong in cpu-qom.h Paolo Bonzini
2016-03-16 13:02 ` Peter Maydell
2016-03-16 10:46 ` [Qemu-devel] [PATCH 14/49] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 15/49] target-s390x: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 16/49] target-sh4: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 17/49] target-sparc: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 18/49] target-tricore: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 19/49] target-unicore32: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 20/49] target-xtensa: " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 21/49] arm: include cpu-qom.h in files that require ARMCPU Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 22/49] m68k: include cpu-qom.h in files that require M68KCPU Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 23/49] sh4: include cpu-qom.h in files that require SuperHCPU Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 24/49] alpha: include cpu-qom.h in files that require AlphaCPU Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 25/49] mips: use MIPSCPU instead of CPUMIPSState Paolo Bonzini
2016-03-16 10:46 ` Paolo Bonzini [this message]
2016-03-16 10:46 ` [Qemu-devel] [PATCH 27/49] arm: remove useless cpu.h inclusion Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 28/49] explicitly include qom/cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 29/49] explicitly include hw/qdev-core.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 30/49] explicitly include linux/kvm.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 31/49] apic: move target-dependent definitions to cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 32/49] include: poison symbols in osdep.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 33/49] hw: do not use VMSTATE_*TL Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 34/49] hw: move CPU state serialization to migration/cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 35/49] hw: cannot include hw/hw.h from user emulation Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 36/49] cpu: move endian-dependent load/store functions to cpu-all.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 37/49] qemu-common: stop including qemu/bswap.h from qemu-common.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 38/49] qemu-common: stop including qemu/host-utils.h " Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 39/49] gdbstub: remove includes from gdbstub-xml.c Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 40/49] dma: do not depend on kvm_enabled() Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 41/49] s390x: move stuff out of cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 42/49] qemu-common: push cpu.h inclusion out of qemu-common.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 43/49] arm: move arm_log_exception into .c file Paolo Bonzini
2016-03-16 11:18 ` Peter Maydell
2016-03-16 10:46 ` [Qemu-devel] [PATCH 44/49] mips: move CP0 functions out of cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 45/49] hw: explicitly include qemu/log.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 46/49] exec: extract exec/tb-context.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 47/49] cpu: move exec-all.h inclusion out of cpu.h Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 48/49] hw: remove pio_addr_t Paolo Bonzini
2016-03-16 11:16 ` Peter Maydell
2016-03-16 11:21 ` Paolo Bonzini
2016-03-16 10:46 ` [Qemu-devel] [PATCH 49/49] hw: clean up hw/hw.h includes Paolo Bonzini
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