From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agxmH-0006To-92 for qemu-devel@nongnu.org; Fri, 18 Mar 2016 13:01:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1agxmG-00083C-B4 for qemu-devel@nongnu.org; Fri, 18 Mar 2016 13:01:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42942) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agxmG-00082v-1X for qemu-devel@nongnu.org; Fri, 18 Mar 2016 13:01:32 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 9BD4D804F1 for ; Fri, 18 Mar 2016 17:01:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-34.ams2.redhat.com [10.36.116.34]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u2IH1TOw031593 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO) for ; Fri, 18 Mar 2016 13:01:31 -0400 From: Markus Armbruster Date: Fri, 18 Mar 2016 18:00:53 +0100 Message-Id: <1458320487-19603-7-git-send-email-armbru@redhat.com> In-Reply-To: <1458320487-19603-1-git-send-email-armbru@redhat.com> References: <1458320487-19603-1-git-send-email-armbru@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 06/40] tests/libqos/pci-pc: Fix qpci_pc_iomap() to map BARs aligned List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org qpci_pc_iomap() maps BARs one after the other, without padding. This is wrong. PCI Local Bus Specification Revision 3.0, 6.2.5.1. Address Maps: "all address spaces used are a power of two in size and are naturally aligned". That's because the size of a BAR is given by the number of address bits the device decodes, and the BAR needs to be mapped at a multiple of that size to ensure the address decoding works. Fix qpci_pc_iomap() accordingly. This takes care of a FIXME in ivshmem-test. Signed-off-by: Markus Armbruster Reviewed-by: Marc-Andr=C3=A9 Lureau Message-Id: <1458066895-20632-7-git-send-email-armbru@redhat.com> --- tests/ivshmem-test.c | 17 ++++++++--------- tests/libqos/pci-pc.c | 8 ++++++-- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/tests/ivshmem-test.c b/tests/ivshmem-test.c index 4efa433..da6ca0d 100644 --- a/tests/ivshmem-test.c +++ b/tests/ivshmem-test.c @@ -110,19 +110,18 @@ static void setup_vm_cmd(IVState *s, const char *cm= d, bool msix) s->pcibus =3D qpci_init_pc(); s->dev =3D get_device(s->pcibus); =20 - /* FIXME: other bar order fails, mappings changes */ - s->mem_base =3D qpci_iomap(s->dev, 2, &barsize); - g_assert_nonnull(s->mem_base); - g_assert_cmpuint(barsize, =3D=3D, TMPSHMSIZE); - - if (msix) { - qpci_msix_enable(s->dev); - } - s->reg_base =3D qpci_iomap(s->dev, 0, &barsize); g_assert_nonnull(s->reg_base); g_assert_cmpuint(barsize, =3D=3D, 256); =20 + if (msix) { + qpci_msix_enable(s->dev); + } + + s->mem_base =3D qpci_iomap(s->dev, 2, &barsize); + g_assert_nonnull(s->mem_base); + g_assert_cmpuint(barsize, =3D=3D, TMPSHMSIZE); + qpci_device_enable(s->dev); } =20 diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c index 08167c0..77f15e5 100644 --- a/tests/libqos/pci-pc.c +++ b/tests/libqos/pci-pc.c @@ -184,7 +184,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *= dev, int barno, uint64_t *s if (io_type =3D=3D PCI_BASE_ADDRESS_SPACE_IO) { uint16_t loc; =20 - g_assert((s->pci_iohole_alloc + size) <=3D s->pci_iohole_size); + g_assert(QEMU_ALIGN_UP(s->pci_iohole_alloc, size) + size + <=3D s->pci_iohole_size); + s->pci_iohole_alloc =3D QEMU_ALIGN_UP(s->pci_iohole_alloc, size)= ; loc =3D s->pci_iohole_start + s->pci_iohole_alloc; s->pci_iohole_alloc +=3D size; =20 @@ -194,7 +196,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *= dev, int barno, uint64_t *s } else { uint64_t loc; =20 - g_assert((s->pci_hole_alloc + size) <=3D s->pci_hole_size); + g_assert(QEMU_ALIGN_UP(s->pci_hole_alloc, size) + size + <=3D s->pci_hole_size); + s->pci_hole_alloc =3D QEMU_ALIGN_UP(s->pci_hole_alloc, size); loc =3D s->pci_hole_start + s->pci_hole_alloc; s->pci_hole_alloc +=3D size; =20 --=20 2.4.3