From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36347) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahi5b-0006ac-U7 for qemu-devel@nongnu.org; Sun, 20 Mar 2016 14:28:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ahi5Z-0004Xs-Rv for qemu-devel@nongnu.org; Sun, 20 Mar 2016 14:28:35 -0400 Received: from demumfd001.nsn-inter.net ([93.183.12.32]:36303) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahi5Z-0004Xh-H0 for qemu-devel@nongnu.org; Sun, 20 Mar 2016 14:28:33 -0400 From: marcin.krzeminski@nokia.com Date: Sun, 20 Mar 2016 19:28:11 +0100 Message-Id: <1458498493-13906-10-git-send-email-marcin.krzeminski@nokia.com> In-Reply-To: <1458498493-13906-1-git-send-email-marcin.krzeminski@nokia.com> References: <1458498493-13906-1-git-send-email-marcin.krzeminski@nokia.com> Subject: [Qemu-devel] [PATCH v5 09/11] block: m25p80: Implemented FSR register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: crosthwaitepeter@gmail.com, clg@fr.ibm.com, rfsw-patches@mlist.nsn-inter.net, pawel.lenkow@itlen.com, marcin.krzeminski@nokia.com From: Marcin Krzeminski Implements FSR register, it is used for busy waits. Signed-off-by: Marcin Krzeminski Reviewed-by: Peter Crosthwaite --- hw/block/m25p80.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index c0b7b8c..63c99f3 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -103,6 +103,10 @@ typedef struct FlashPartInfo { #define NVCFG_LOWER_SEGMENT_MASK (1 << 1) #define CFG_UPPER_128MB_SEG_ENABLED 0x3 +/* Numonyx (Micron) Flag Status Register macros */ +#define FSR_4BYTE_ADDR_MODE_ENABLED 0x1 +#define FSR_FLASH_READY (1 << 7) + static const FlashPartInfo known_devices[] = { /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { INFO("at25fs010", 0x1f6601, 0, 32 << 10, 4, ER_4K) }, @@ -242,6 +246,7 @@ typedef enum { WREN = 0x6, JEDEC_READ = 0x9f, BULK_ERASE = 0xc7, + READ_FSR = 0x70, READ = 0x03, READ4 = 0x13, @@ -690,6 +695,16 @@ static void decode_new_cmd(Flash *s, uint32_t value) s->state = STATE_READING_DATA; break; + case READ_FSR: + s->data[0] = FSR_FLASH_READY; + if (s->four_bytes_address_mode) { + s->data[0] |= FSR_4BYTE_ADDR_MODE_ENABLED; + } + s->pos = 0; + s->len = 1; + s->state = STATE_READING_DATA; + break; + case JEDEC_READ: DB_PRINT_L(0, "populated jedec code\n"); s->data[0] = (s->pi->jedec >> 16) & 0xff; -- 2.5.0