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From: marcin.krzeminski@nokia.com
To: qemu-devel@nongnu.org
Cc: crosthwaitepeter@gmail.com, clg@fr.ibm.com,
	rfsw-patches@mlist.nsn-inter.net, pawel.lenkow@itlen.com,
	marcin.krzeminski@nokia.com
Subject: [Qemu-devel] [PATCH v5 11/11] block: m25p80: at25128a/at25256a models
Date: Sun, 20 Mar 2016 19:28:13 +0100	[thread overview]
Message-ID: <1458498493-13906-12-git-send-email-marcin.krzeminski@nokia.com> (raw)
In-Reply-To: <1458498493-13906-1-git-send-email-marcin.krzeminski@nokia.com>

From: Marcin Krzeminski <marcin.krzeminski@nokia.com>

Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
---
 hw/block/m25p80.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 2bbf492..1b75c87 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -47,7 +47,7 @@
 /* set to allow the page program command to write 0s back to 1. Useful for
  * modelling EEPROM with SPI flash command set
  */
-#define WR_1 0x100
+#define EEPROM 0x100
 
 /* 16 MiB max in 3 byte address mode */
 #define MAX_3BYTES_SIZE 0x1000000
@@ -123,6 +123,12 @@ static const FlashPartInfo known_devices[] = {
 
     { INFO("at45db081d",  0x1f2500,      0,  64 << 10,  16, ER_4K) },
 
+    /* Atmel EEPROMS - it is assumed, that don't care bit in command
+     * is set to 0. Block protection is not supported.
+     */
+    { INFO("at25128a-nonjedec", 0x0,     0,         1, 131072, EEPROM) },
+    { INFO("at25256a-nonjedec", 0x0,     0,         1, 262144, EEPROM) },
+
     /* EON -- en25xxx */
     { INFO("en25f32",     0x1c3116,      0,  64 << 10,  64, ER_4K) },
     { INFO("en25p32",     0x1c2016,      0,  64 << 10,  64, 0) },
@@ -450,7 +456,7 @@ void flash_write8(Flash *s, uint64_t addr, uint8_t data)
                    " -> %" PRIx8 "\n", addr, prev, data);
     }
 
-    if (s->pi->flags & WR_1) {
+    if (s->pi->flags & EEPROM) {
         s->storage[s->cur_addr] = data;
     } else {
         s->storage[s->cur_addr] &= data;
@@ -462,6 +468,11 @@ void flash_write8(Flash *s, uint64_t addr, uint8_t data)
 
 static inline int get_addr_length(Flash *s)
 {
+   /* check if eeprom is in use */
+    if (s->pi->flags == EEPROM) {
+        return 2;
+    }
+
    switch (s->cmd_in_progress) {
    case PP4:
    case READ4:
-- 
2.5.0

  parent reply	other threads:[~2016-03-20 18:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-20 18:28 [Qemu-devel] [PATCH v5 00/11] Support for N25Q256/512 and AT25128/256 marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 01/11] block: m25p80: Removed unused variable marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 02/11] block: m25p80: RESET_ENABLE and RESET_MEMORY commands marcin.krzeminski
2016-03-21 17:02   ` Cédric Le Goater
2016-03-21 17:38     ` [Qemu-devel] ODP: " Krzeminski, Marcin (Nokia - PL/Wroclaw)
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 03/11] block: m25p80: Widen flags variable marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 04/11] block: m25p80: Extend address mode marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 05/11] block: m25p80: 4byte " marcin.krzeminski
2016-03-21 17:47   ` Cédric Le Goater
2016-03-21 18:00     ` [Qemu-devel] ODP: " Krzeminski, Marcin (Nokia - PL/Wroclaw)
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 06/11] block: m25p80: Add configuration registers marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 07/11] block: m25p80: Dummy cycles for N25Q256/512 marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 08/11] block: m25p80: Fast read and 4bytes commands marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 09/11] block: m25p80: Implemented FSR register marcin.krzeminski
2016-03-20 18:28 ` [Qemu-devel] [PATCH v5 10/11] block: m25p80: n25q256a/n25q512a models marcin.krzeminski
2016-03-20 18:28 ` marcin.krzeminski [this message]
2016-03-23 15:30 ` [Qemu-devel] [PATCH v5 00/11] Support for N25Q256/512 and AT25128/256 Peter Maydell

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