From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45562) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahzKj-0004F4-6I for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ahzKf-00079S-Uk for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:21 -0400 Received: from e06smtp17.uk.ibm.com ([195.75.94.113]:60065) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahzKf-00079C-Kz for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:17 -0400 Received: from localhost by e06smtp17.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 21 Mar 2016 12:53:16 -0000 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 21 Mar 2016 13:52:40 +0100 Message-Id: <1458564760-31993-11-git-send-email-clg@fr.ibm.com> In-Reply-To: <1458564760-31993-1-git-send-email-clg@fr.ibm.com> References: <1458564760-31993-1-git-send-email-clg@fr.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 10/10] ppc: A couple more dummy POWER8 Book4 regs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: Thomas Huth , Cedric Le Goater , qemu-ppc@nongnu.org, qemu-devel@nongnu.org From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt [clg: squashed in patch 'ppc: Add dummy ACOP SPR' ] Signed-off-by: Cédric Le Goater Reviewed-by: Thomas Huth Reviewed-by: David Gibson --- target-ppc/cpu.h | 3 +++ target-ppc/translate_init.c | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 29c48600d950..676081e69dc0 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1355,7 +1355,9 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_SRR1 (0x01B) #define SPR_CFAR (0x01C) #define SPR_AMR (0x01D) +#define SPR_ACOP (0x01F) #define SPR_BOOKE_PID (0x030) +#define SPR_BOOKS_PID (0x030) #define SPR_BOOKE_DECAR (0x036) #define SPR_BOOKE_CSRR0 (0x03A) #define SPR_BOOKE_CSRR1 (0x03B) @@ -1706,6 +1708,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_POWER_SPMC1 (0x37C) #define SPR_POWER_SPMC2 (0x37D) #define SPR_POWER_MMCRS (0x37E) +#define SPR_WORT (0x37F) #define SPR_PPR (0x380) #define SPR_750_GQR0 (0x390) #define SPR_440_DNV0 (0x390) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5f53098faef7..51e8058c468e 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8018,6 +8018,18 @@ static void gen_spr_power8_ic(CPUPPCState *env) &spr_read_generic, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0); + spr_register_kvm(env, SPR_ACOP, "ACOP", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_ACOP, 0); + spr_register_kvm(env, SPR_BOOKS_PID, "PID", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_PID, 0); + spr_register_kvm(env, SPR_WORT, "WORT", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_WORT, 0); #endif } -- 2.1.4