From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45447) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahzKc-00041P-GQ for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ahzKZ-000766-4d for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:14 -0400 Received: from e06smtp09.uk.ibm.com ([195.75.94.105]:46674) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahzKY-00075d-Pt for qemu-devel@nongnu.org; Mon, 21 Mar 2016 08:53:11 -0400 Received: from localhost by e06smtp09.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 21 Mar 2016 12:53:09 -0000 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 21 Mar 2016 13:52:34 +0100 Message-Id: <1458564760-31993-5-git-send-email-clg@fr.ibm.com> In-Reply-To: <1458564760-31993-1-git-send-email-clg@fr.ibm.com> References: <1458564760-31993-1-git-send-email-clg@fr.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=a Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 04/10] ppc: Create cpu_ppc_set_papr() helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: Thomas Huth , Cedric Le Goater , qemu-ppc@nongnu.org, qemu-devel@nongnu.org From: Benjamin Herrenschmidt And move the code adjusting the MSR mask and calling kvmppc_set_papr() to it. This allows us to add a few more things such as disabling setting of MSR:HV and appropriate LPCR bits which will be used when fixing the exception model. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson [clg: removed LPCR setting ] Signed-off-by: Cédric Le Goater --- Changes since v2: - removed LPCR setting hw/ppc/spapr.c | 11 ++--------- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 23 ++++++++++++++++++++++- 3 files changed, 25 insertions(+), 10 deletions(-) Index: qemu-dgibson-for-2.6.git/hw/ppc/spapr.c =================================================================== --- qemu-dgibson-for-2.6.git.orig/hw/ppc/spapr.c +++ qemu-dgibson-for-2.6.git/hw/ppc/spapr.c @@ -1612,15 +1612,8 @@ static void spapr_cpu_init(sPAPRMachineS /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, TIMEBASE_FREQ); - /* PAPR always has exception vectors in RAM not ROM. To ensure this, - * MSR[IP] should never be set. - */ - env->msr_mask &= ~(1 << 6); - - /* Tell KVM that we're in PAPR mode */ - if (kvm_enabled()) { - kvmppc_set_papr(cpu); - } + /* Enable PAPR mode in TCG or KVM */ + cpu_ppc_set_papr(cpu); if (cpu->max_compat) { Error *local_err = NULL; Index: qemu-dgibson-for-2.6.git/target-ppc/cpu.h =================================================================== --- qemu-dgibson-for-2.6.git.orig/target-ppc/cpu.h +++ qemu-dgibson-for-2.6.git/target-ppc/cpu.h @@ -1268,6 +1268,7 @@ void store_booke_tcr (CPUPPCState *env, void store_booke_tsr (CPUPPCState *env, target_ulong val); void ppc_tlb_invalidate_all (CPUPPCState *env); void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr); +void cpu_ppc_set_papr(PowerPCCPU *cpu); #endif #endif Index: qemu-dgibson-for-2.6.git/target-ppc/translate_init.c =================================================================== --- qemu-dgibson-for-2.6.git.orig/target-ppc/translate_init.c +++ qemu-dgibson-for-2.6.git/target-ppc/translate_init.c @@ -8380,8 +8380,29 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, pcc->l1_icache_size = 0x8000; pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr; } -#endif /* defined (TARGET_PPC64) */ +#if !defined(CONFIG_USER_ONLY) + +void cpu_ppc_set_papr(PowerPCCPU *cpu) +{ + CPUPPCState *env = &cpu->env; + + /* PAPR always has exception vectors in RAM not ROM. To ensure this, + * MSR[IP] should never be set. + * + * We also disallow setting of MSR_HV + */ + env->msr_mask &= ~((1ull << MSR_EP) | MSR_HVB); + + /* Tell KVM that we're in PAPR mode */ + if (kvm_enabled()) { + kvmppc_set_papr(cpu); + } +} + +#endif /* !defined(CONFIG_USER_ONLY) */ + +#endif /* defined (TARGET_PPC64) */ /*****************************************************************************/ /* Generic CPU instantiation routine */