From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52032) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiMeR-0007nR-T6 for qemu-devel@nongnu.org; Tue, 22 Mar 2016 09:47:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiMeM-0005L3-6V for qemu-devel@nongnu.org; Tue, 22 Mar 2016 09:47:15 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:51774) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiMeM-0005JQ-0Z for qemu-devel@nongnu.org; Tue, 22 Mar 2016 09:47:10 -0400 From: Bastian Koppelmann Date: Tue, 22 Mar 2016 14:46:18 +0100 Message-Id: <1458654386-1001-3-git-send-email-kbastian@mail.uni-paderborn.de> In-Reply-To: <1458654386-1001-1-git-send-email-kbastian@mail.uni-paderborn.de> References: <1458654386-1001-1-git-send-email-kbastian@mail.uni-paderborn.de> Subject: [Qemu-devel] [PULL 02/10] target-tricore: Fix helper_msub64_q_ssov not reseting OVF bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org When this instruction does not produce an overflow the corresponding bit has to be reset. Signed-off-by: Bastian Koppelmann Message-Id: <1458547383-23102-3-git-send-email-kbastian@mail.uni-paderborn.de> --- target-tricore/op_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c index 55f6724..40656c3 100644 --- a/target-tricore/op_helper.c +++ b/target-tricore/op_helper.c @@ -1045,6 +1045,8 @@ uint64_t helper_msub64_q_ssov(CPUTriCoreState *env, uint64_t r1, uint32_t r2, } else { result = INT64_MIN; } + } else { + env->PSW_USB_V = 0; } } else { if (ovf < 0) { -- 2.7.4