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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: thuth@redhat.com, agraf@suse.de, qemu-devel@nongnu.org,
	clg@fr.ibm.com, qemu-ppc@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 16/16] ppc: move POWER8 Book4 regs in their own routine
Date: Thu, 24 Mar 2016 15:30:58 +1100	[thread overview]
Message-ID: <1458793858-4010-17-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au>

From: Cédric Le Goater <clg@fr.ibm.com>

commit fce55481360d "ppc: A couple more dummy POWER8 Book4 regs"
squashed in to rapidly a set of POWER8 Book4 regs in the wrong
routine. This patch introduces the missing gen_spr_power8_book4()
routine to fix their location.

Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target-ppc/translate_init.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5cec1df..0a33597 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8018,6 +8018,13 @@ static void gen_spr_power8_ic(CPUPPCState *env)
                     &spr_read_generic, SPR_NOACCESS,
                     &spr_read_generic, &spr_write_generic,
                     0);
+#endif
+}
+
+static void gen_spr_power8_book4(CPUPPCState *env)
+{
+    /* Add a number of P8 book4 registers */
+#if !defined(CONFIG_USER_ONLY)
     spr_register_kvm(env, SPR_ACOP, "ACOP",
                      SPR_NOACCESS, SPR_NOACCESS,
                      &spr_read_generic, &spr_write_generic,
@@ -8086,6 +8093,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
         gen_spr_power8_pspb(env);
         gen_spr_vtb(env);
         gen_spr_power8_ic(env);
+        gen_spr_power8_book4(env);
     }
     if (version < BOOK3S_CPU_POWER8) {
         gen_spr_book3s_dbg(env);
-- 
2.5.5

  parent reply	other threads:[~2016-03-24  4:30 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-24  4:30 [Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160324 David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 01/16] ppc64: set MSR_SF bit David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 02/16] spapr/target-ppc/kvm: Only add hcall-instructions if KVM supports it David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 03/16] ppc: Update SPR definitions David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 04/16] ppc: Add macros to register hypervisor mode SPRs David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 05/16] ppc: Add a bunch of hypervisor SPRs to Book3s David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 06/16] ppc: Create cpu_ppc_set_papr() helper David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 07/16] ppc: Add dummy SPR_IC for POWER8 David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 08/16] ppc: Initialize AMOR in PAPR mode David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 09/16] ppc: Fix writing to AMR/UAMOR David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 10/16] ppc: Add POWER8 IAMR register David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 11/16] ppc: Add dummy CIABR SPR David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 12/16] ppc: A couple more dummy POWER8 Book4 regs David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 13/16] hw/net/spapr_llan: Extract rx buffer code into separate functions David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 14/16] hw/net/spapr_llan: Fix receive buffer handling for better performance David Gibson
2016-03-24  4:30 ` [Qemu-devel] [PULL 15/16] hw/net/spapr_llan: Enable the RX buffer pools by default for new machines David Gibson
2016-03-24  4:30 ` David Gibson [this message]
2016-03-24 15:59 ` [Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160324 Peter Maydell

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