From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37410) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiwuM-0002II-Cr for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiwuC-000716-Rk for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:06 -0400 From: David Gibson Date: Thu, 24 Mar 2016 15:30:46 +1100 Message-Id: <1458793858-4010-5-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> References: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 04/16] ppc: Add macros to register hypervisor mode SPRs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: thuth@redhat.com, agraf@suse.de, qemu-devel@nongnu.org, clg@fr.ibm.com, qemu-ppc@nongnu.org, David Gibson From: Benjamin Herrenschmidt The current set of spr_register_* macros only take the user and supervisor function pointers. To make the transition easy, we don't change that but we add "_hv" variants that can be used to register all 3 sets. To simplify the transition, users of the "old" macro will set the hypervisor callback to be the same as the supervisor one. The new registration function only needs to be used for registers that are either hypervisor only or behave differently in HV mode. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson [clg: fixed else if condition in gen_op_mfspr() ] Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Thomas Huth Signed-off-by: David Gibson --- target-ppc/translate.c | 26 ++++++++++++++++---------- target-ppc/translate_init.c | 35 +++++++++++++++++++++++++++++++---- 2 files changed, 47 insertions(+), 14 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e402ff9..6f0e7b4 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -4282,14 +4282,17 @@ static inline void gen_op_mfspr(DisasContext *ctx= ) void (*read_cb)(DisasContext *ctx, int gprn, int sprn); uint32_t sprn =3D SPR(ctx->opcode); =20 -#if !defined(CONFIG_USER_ONLY) - if (ctx->hv) +#if defined(CONFIG_USER_ONLY) + read_cb =3D ctx->spr_cb[sprn].uea_read; +#else + if (ctx->pr) { + read_cb =3D ctx->spr_cb[sprn].uea_read; + } else if (ctx->hv) { read_cb =3D ctx->spr_cb[sprn].hea_read; - else if (!ctx->pr) + } else { read_cb =3D ctx->spr_cb[sprn].oea_read; - else + } #endif - read_cb =3D ctx->spr_cb[sprn].uea_read; if (likely(read_cb !=3D NULL)) { if (likely(read_cb !=3D SPR_NOACCESS)) { (*read_cb)(ctx, rD(ctx->opcode), sprn); @@ -4437,14 +4440,17 @@ static void gen_mtspr(DisasContext *ctx) void (*write_cb)(DisasContext *ctx, int sprn, int gprn); uint32_t sprn =3D SPR(ctx->opcode); =20 -#if !defined(CONFIG_USER_ONLY) - if (ctx->hv) +#if defined(CONFIG_USER_ONLY) + write_cb =3D ctx->spr_cb[sprn].uea_write; +#else + if (ctx->pr) { + write_cb =3D ctx->spr_cb[sprn].uea_write; + } else if (ctx->hv) { write_cb =3D ctx->spr_cb[sprn].hea_write; - else if (!ctx->pr) + } else { write_cb =3D ctx->spr_cb[sprn].oea_write; - else + } #endif - write_cb =3D ctx->spr_cb[sprn].uea_write; if (likely(write_cb !=3D NULL)) { if (likely(write_cb !=3D SPR_NOACCESS)) { (*write_cb)(ctx, sprn, rS(ctx->opcode)); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 11d5fd3..ebfce5d 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -579,17 +579,33 @@ static inline void vscr_init (CPUPPCState *env, uin= t32_t val) #define spr_register_kvm(env, num, name, uea_read, uea_write, = \ oea_read, oea_write, one_reg_id, initial_value)= \ _spr_register(env, num, name, uea_read, uea_write, initial_value) +#define spr_register_kvm_hv(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, hea_read, hea_write, = \ + one_reg_id, initial_value) = \ + _spr_register(env, num, name, uea_read, uea_write, initial_value) #else #if !defined(CONFIG_KVM) #define spr_register_kvm(env, num, name, uea_read, uea_write, = \ - oea_read, oea_write, one_reg_id, initial_value)= \ + oea_read, oea_write, one_reg_id, initial_value)= \ + _spr_register(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, oea_read, oea_write, initial_valu= e) +#define spr_register_kvm_hv(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, hea_read, hea_write, = \ + one_reg_id, initial_value) = \ _spr_register(env, num, name, uea_read, uea_write, = \ - oea_read, oea_write, initial_value) + oea_read, oea_write, hea_read, hea_write, initial_valu= e) #else #define spr_register_kvm(env, num, name, uea_read, uea_write, = \ - oea_read, oea_write, one_reg_id, initial_value)= \ + oea_read, oea_write, one_reg_id, initial_value)= \ + _spr_register(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, oea_read, oea_write, = \ + one_reg_id, initial_value) +#define spr_register_kvm_hv(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, hea_read, hea_write, = \ + one_reg_id, initial_value) = \ _spr_register(env, num, name, uea_read, uea_write, = \ - oea_read, oea_write, one_reg_id, initial_value) + oea_read, oea_write, hea_read, hea_write, = \ + one_reg_id, initial_value) #endif #endif =20 @@ -598,6 +614,13 @@ static inline void vscr_init (CPUPPCState *env, uint= 32_t val) spr_register_kvm(env, num, name, uea_read, uea_write, = \ oea_read, oea_write, 0, initial_value) =20 +#define spr_register_hv(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, hea_read, hea_write, = \ + initial_value) = \ + spr_register_kvm_hv(env, num, name, uea_read, uea_write, = \ + oea_read, oea_write, hea_read, hea_write, = \ + 0, initial_value) + static inline void _spr_register(CPUPPCState *env, int num, const char *name, void (*uea_read)(DisasContext *ctx, int= gprn, int sprn), @@ -606,6 +629,8 @@ static inline void _spr_register(CPUPPCState *env, in= t num, =20 void (*oea_read)(DisasContext *ctx, int= gprn, int sprn), void (*oea_write)(DisasContext *ctx, in= t sprn, int gprn), + void (*hea_read)(DisasContext *opaque, = int gprn, int sprn), + void (*hea_write)(DisasContext *opaque,= int sprn, int gprn), #endif #if defined(CONFIG_KVM) uint64_t one_reg_id, @@ -633,6 +658,8 @@ static inline void _spr_register(CPUPPCState *env, in= t num, #if !defined(CONFIG_USER_ONLY) spr->oea_read =3D oea_read; spr->oea_write =3D oea_write; + spr->hea_read =3D hea_read; + spr->hea_write =3D hea_write; #endif #if defined(CONFIG_KVM) spr->one_reg_id =3D one_reg_id, --=20 2.5.5