From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37421) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiwuM-0002IL-KK for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiwuD-00071t-OJ for qemu-devel@nongnu.org; Thu, 24 Mar 2016 00:30:06 -0400 From: David Gibson Date: Thu, 24 Mar 2016 15:30:49 +1100 Message-Id: <1458793858-4010-8-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> References: <1458793858-4010-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 07/16] ppc: Add dummy SPR_IC for POWER8 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: thuth@redhat.com, agraf@suse.de, qemu-devel@nongnu.org, clg@fr.ibm.com, qemu-ppc@nongnu.org, David Gibson From: Benjamin Herrenschmidt It's supposed to be an instruction counter. For now make us not crash when accessing it. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: Thomas Huth Reviewed-by: David Gibson Signed-off-by: David Gibson --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index a7da0d3..167c73f 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1685,6 +1685,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) #define SPR_TAR (0x32F) +#define SPR_IC (0x350) #define SPR_VTB (0x351) #define SPR_MMCRC (0x353) #define SPR_440_INV0 (0x370) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 4d82e1c..3a13ad7 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7924,6 +7924,17 @@ static void gen_spr_power8_pspb(CPUPPCState *env) KVM_REG_PPC_PSPB, 0); } +static void gen_spr_power8_ic(CPUPPCState *env) +{ +#if !defined(CONFIG_USER_ONLY) + spr_register_hv(env, SPR_IC, "IC", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0); +#endif +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -7976,6 +7987,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_tm(env); gen_spr_power8_pspb(env); gen_spr_vtb(env); + gen_spr_power8_ic(env); } if (version < BOOK3S_CPU_POWER8) { gen_spr_book3s_dbg(env); -- 2.5.5