From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59138) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aldzJ-0002KM-PU for qemu-devel@nongnu.org; Thu, 31 Mar 2016 10:54:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aldzF-00061b-Sg for qemu-devel@nongnu.org; Thu, 31 Mar 2016 10:54:21 -0400 From: Peter Maydell Date: Thu, 31 Mar 2016 15:49:37 +0100 Message-Id: <1459435778-5526-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1459435778-5526-1-git-send-email-peter.maydell@linaro.org> References: <1459435778-5526-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 3/4] target-arm: Make the 64-bit version of VTCR do the migration List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Sergey Fedorov Move the ALIAS tag from VTCR_EL2 to VTCR so that we migrate the 64-bit version, as is usual. (This has no particular effect now unless the guest wrote to the high RES0 bits of VTCR_EL2.) Add a comment about why it's OK that we don't have the various accessor functions that the EL1 TCR regdefs do. Signed-off-by: Peter Maydell --- target-arm/helper.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 0e54d90..09638b2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3564,11 +3564,15 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, { .name = "VTCR", .state = ARM_CP_STATE_AA32, .cp = 15, .opc1 = 4, .crn = 2, .crm = 1, .opc2 = 2, + .type = ARM_CP_ALIAS, .access = PL2_RW, .accessfn = access_el3_aa32ns, .fieldoffset = offsetof(CPUARMState, cp15.vtcr_el2) }, { .name = "VTCR_EL2", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 1, .opc2 = 2, - .access = PL2_RW, .type = ARM_CP_ALIAS, + .access = PL2_RW, + /* no .writefn needed as this can't cause an ASID change; + * no .raw_writefn or .resetfn needed as we never use mask/base_mask + */ .fieldoffset = offsetof(CPUARMState, cp15.vtcr_el2) }, { .name = "VTTBR", .state = ARM_CP_STATE_AA32, .cp = 15, .opc1 = 6, .crm = 2, -- 1.9.1