From: David Kiarie <davidkiarie4@gmail.com>
To: qemu-devel@nongnu.org
Cc: marcel@redhat.com, valentine.sinitsyn@gmail.com,
David Kiarie <davidkiarie4@gmail.com>,
jan.kizska@web.de, mst@redhat.com
Subject: [Qemu-devel] [V8 4/4] hw/pci-host: Emulate AMD IOMMU
Date: Fri, 1 Apr 2016 21:39:54 +0300 [thread overview]
Message-ID: <1459535994-18523-5-git-send-email-davidkiarie4@gmail.com> (raw)
In-Reply-To: <1459535994-18523-1-git-send-email-davidkiarie4@gmail.com>
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
---
hw/pci-host/q35.c | 21 +++++++++++++++++++--
include/hw/i386/intel_iommu.h | 1 +
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 70f897e..37f8a84 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -32,6 +32,7 @@
#include "hw/pci-host/q35.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
+#include "hw/i386/amd_iommu.h"
/****************************************************************************
* Q35 host
@@ -448,6 +449,19 @@ static void mch_init_dmar(MCHPCIState *mch)
pci_setup_iommu(pci_bus, q35_host_dma_iommu, mch->iommu);
}
+static void mch_init_amdvi(MCHPCIState *mch)
+{
+ AMDIOMMUState *iommu_state;
+ PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
+ PCIDevice *iommu;
+
+ iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
+
+ iommu_state = AMD_IOMMU_DEVICE(iommu);
+
+ pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state);
+}
+
static void mch_realize(PCIDevice *d, Error **errp)
{
int i;
@@ -506,8 +520,11 @@ static void mch_realize(PCIDevice *d, Error **errp)
mch->pci_address_space, &mch->pam_regions[i+1],
PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
}
- /* Intel IOMMU (VT-d) */
- if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
+
+ if (object_property_get_bool(qdev_get_machine(), "iommu", NULL) &&
+ MACHINE(qdev_get_machine())->x_iommu_type) {
+ mch_init_amdvi(mch);
+ } else if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
mch_init_dmar(mch);
}
}
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 7e511e1..5a520f3 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -28,6 +28,7 @@
#define TYPE_INTEL_IOMMU_DEVICE "intel-iommu"
#define INTEL_IOMMU_DEVICE(obj) \
OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE)
+#define INTEL_IOMMU_STR "intel"
/* DMAR Hardware Unit Definition address (IOMMU unit) */
#define Q35_HOST_BRIDGE_IOMMU_ADDR 0xfed90000ULL
--
2.1.4
next prev parent reply other threads:[~2016-04-01 18:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-01 18:39 [Qemu-devel] [V8 0/4] AMD IOMMU David Kiarie
2016-04-01 18:39 ` [Qemu-devel] [V8 1/4] hw/i386: Introduce " David Kiarie
2016-04-01 18:39 ` [Qemu-devel] [V8 2/4] hw/i386: ACPI table for " David Kiarie
2016-04-04 15:34 ` Marcel Apfelbaum
2016-04-06 16:25 ` Igor Mammedov
2016-04-01 18:39 ` [Qemu-devel] [V8 3/4] hw/core: Add AMD IOMMU to machine properties David Kiarie
2016-04-04 11:17 ` Marcel Apfelbaum
2016-04-01 18:39 ` David Kiarie [this message]
2016-04-04 11:26 ` [Qemu-devel] [V8 4/4] hw/pci-host: Emulate AMD IOMMU Marcel Apfelbaum
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