From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60704) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anX13-0000mF-Dm for qemu-devel@nongnu.org; Tue, 05 Apr 2016 15:51:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1anX11-00068Z-73 for qemu-devel@nongnu.org; Tue, 05 Apr 2016 15:51:57 -0400 Received: from mail-qg0-x230.google.com ([2607:f8b0:400d:c04::230]:35714) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anX11-00068U-34 for qemu-devel@nongnu.org; Tue, 05 Apr 2016 15:51:55 -0400 Received: by mail-qg0-x230.google.com with SMTP id y89so19411144qge.2 for ; Tue, 05 Apr 2016 12:51:54 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 5 Apr 2016 12:51:20 -0700 Message-Id: <1459885880-11792-2-git-send-email-rth@twiddle.net> In-Reply-To: <1459885880-11792-1-git-send-email-rth@twiddle.net> References: <1459885880-11792-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL for-2.6] tcg/mips: Fix type of tcg_target_reg_alloc_order[] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, James Hogan From: James Hogan The MIPS TCG backend is the only one to have tcg_target_reg_alloc_order[] elements of type TCGReg rather than int. This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") breaking the build on MIPS since the type differed from indirect_reg_alloc_order[]: tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression [-Werror] order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; ^ Make it an array of ints to fix the build and match other architectures. Fixes: 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different order") Signed-off-by: James Hogan Acked-by: Aurelien Jarno Message-Id: <1459522179-6584-1-git-send-email-james.hogan@imgtec.com> Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.inc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 297bd00..682e198 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -76,7 +76,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define TCG_TMP1 TCG_REG_T9 /* check if we really need so many registers :P */ -static const TCGReg tcg_target_reg_alloc_order[] = { +static const int tcg_target_reg_alloc_order[] = { /* Call saved registers. */ TCG_REG_S0, TCG_REG_S1, -- 2.5.5