From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
alex.williamson@redhat.com, wexu@redhat.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v3 01/13] intel_iommu: allow queued invalidation for IR
Date: Fri, 15 Apr 2016 11:31:27 +0800 [thread overview]
Message-ID: <1460691099-3024-2-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1460691099-3024-1-git-send-email-peterx@redhat.com>
Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
hw/i386/intel_iommu.c | 9 +++++++++
hw/i386/intel_iommu_internal.h | 2 ++
2 files changed, 11 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 347718f..4b0558e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1400,6 +1400,15 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
}
break;
+ case VTD_INV_DESC_IEC:
+ VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation "
+ "not implemented yet");
+ /*
+ * Since currently we do not cache interrupt entries, we can
+ * just mark this descriptor as "good" and move on.
+ */
+ break;
+
default:
VTD_DPRINTF(GENERAL, "error: unkonw Invalidation Descriptor type "
"hi 0x%"PRIx64 " lo 0x%"PRIx64 " type %"PRIu8,
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index e5f514c..b648e69 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -286,6 +286,8 @@ typedef struct VTDInvDesc VTDInvDesc;
#define VTD_INV_DESC_TYPE 0xf
#define VTD_INV_DESC_CC 0x1 /* Context-cache Invalidate Desc */
#define VTD_INV_DESC_IOTLB 0x2
+#define VTD_INV_DESC_IEC 0x4 /* Interrupt Entry Cache
+ Invalidate Descriptor */
#define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descriptor */
#define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descriptor */
--
2.4.3
next prev parent reply other threads:[~2016-04-15 3:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-15 3:31 [Qemu-devel] [PATCH v3 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-04-15 3:31 ` Peter Xu [this message]
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 02/13] intel_iommu: set IR bit for ECAP register Peter Xu
2016-04-17 2:30 ` Jan Kiszka
2016-04-18 3:11 ` Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 03/13] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 04/13] intel_iommu: define interrupt remap table addr register Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 05/13] intel_iommu: handle interrupt remap enable Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 06/13] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 07/13] intel_iommu: provide helper function vtd_get_iommu Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 08/13] intel_iommu: add IR translation faults defines Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 09/13] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 10/13] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 11/13] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 12/13] q35: ioapic: add support for split irqchip and irqfd Peter Xu
2016-04-15 15:31 ` Radim Krčmář
2016-04-18 3:30 ` Peter Xu
2016-04-17 2:44 ` Jan Kiszka
2016-04-17 9:45 ` Michael S. Tsirkin
2016-04-18 8:55 ` Peter Xu
2016-04-25 5:00 ` Jan Kiszka
2016-04-15 3:31 ` [Qemu-devel] [PATCH v3 13/13] q35: add "int-remap" flag to enable intr Peter Xu
2016-04-17 2:26 ` [Qemu-devel] [PATCH v3 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Jan Kiszka
2016-04-18 3:14 ` Peter Xu
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