From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49337) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ar4f5-0000LU-Rp for qemu-devel@nongnu.org; Fri, 15 Apr 2016 10:23:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ar4f4-0007cK-FU for qemu-devel@nongnu.org; Fri, 15 Apr 2016 10:23:55 -0400 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]:37161) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ar4f4-0007bi-87 for qemu-devel@nongnu.org; Fri, 15 Apr 2016 10:23:54 -0400 Received: by mail-wm0-x231.google.com with SMTP id n3so35017204wmn.0 for ; Fri, 15 Apr 2016 07:23:54 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Fri, 15 Apr 2016 15:23:41 +0100 Message-Id: <1460730231-1184-4-git-send-email-alex.bennee@linaro.org> In-Reply-To: <1460730231-1184-1-git-send-email-alex.bennee@linaro.org> References: <1460730231-1184-1-git-send-email-alex.bennee@linaro.org> Subject: [Qemu-devel] [RFC v1 02/12] tcg/i386: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: mttcg@listserver.greensocs.com, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, serge.fdrv@gmail.com, cota@braap.org Cc: qemu-devel@nongnu.org, mark.burton@greensocs.com, pbonzini@redhat.com, jan.kiszka@siemens.com, rth@twiddle.net, peter.maydell@linaro.org, claudio.fontana@huawei.com, Sergey Fedorov , Peter Crosthwaite From: Sergey Fedorov Ensure direct jump patching in i386 is atomic by: * naturally aligning a location of direct jump address; * using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov Signed-off-by: Sergey Fedorov --- include/exec/exec-all.h | 2 +- tcg/i386/tcg-target.inc.c | 17 +++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index cde4b7a..9144ee0 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -324,7 +324,7 @@ void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr); static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr) { /* patch the branch destination */ - stl_le_p((void*)jmp_addr, addr - (jmp_addr + 4)); + atomic_set((int32_t *)jmp_addr, addr - (jmp_addr + 4)); /* no need to flush icache explicitly */ } #elif defined(__s390x__) diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 2f98cae..8fd37f4 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1123,6 +1123,19 @@ static void tcg_out_jmp(TCGContext *s, tcg_insn_unit *dest) tcg_out_branch(s, 0, dest); } +static void tcg_out_nopn(TCGContext *s, int n) +{ + static const uint8_t nop1[] = { 0x90 }; + static const uint8_t nop2[] = { 0x66, 0x90 }; + static const uint8_t nop3[] = { 0x8d, 0x76, 0x00 }; + static const uint8_t *const nopn[] = { nop1, nop2, nop3 }; + int i; + assert(n <= ARRAY_SIZE(nopn)); + for (i = 0; i < n; ++i) { + tcg_out8(s, nopn[n - 1][i]); + } +} + #if defined(CONFIG_SOFTMMU) /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr, * int mmu_idx, uintptr_t ra) @@ -1777,6 +1790,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_goto_tb: if (s->tb_jmp_insn_offset) { /* direct jump method */ + /* align jump displacement for atomic pathing */ + if (((uintptr_t)s->code_ptr & 3) != 3) { + tcg_out_nopn(s, 3 - ((uintptr_t)s->code_ptr & 3)); + } tcg_out8(s, OPC_JMP_long); /* jmp im */ s->tb_jmp_insn_offset[args[0]] = tcg_current_code_size(s); tcg_out32(s, 0); -- 2.7.4