From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38532) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asRCD-0007NV-UC for qemu-devel@nongnu.org; Tue, 19 Apr 2016 04:39:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1asRCD-0006Mh-4G for qemu-devel@nongnu.org; Tue, 19 Apr 2016 04:39:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36409) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asRCC-0006Md-V1 for qemu-devel@nongnu.org; Tue, 19 Apr 2016 04:39:45 -0400 From: Peter Xu Date: Tue, 19 Apr 2016 16:38:40 +0800 Message-Id: <1461055122-32378-15-git-send-email-peterx@redhat.com> In-Reply-To: <1461055122-32378-1-git-send-email-peterx@redhat.com> References: <1461055122-32378-1-git-send-email-peterx@redhat.com> Subject: [Qemu-devel] [PATCH v4 14/16] q35: add "int-remap" flag to enable intr List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com, alex.williamson@redhat.com, wexu@redhat.com, peterx@redhat.com One flag is added to specify whether to enable INTR for emulated IOMMU. By default, interrupt remapping is not supportted. To enable it, we should specify something like: $ qemu-system-x86_64 -M q35,iommu=on,intr=on To be more clear, the following command: $ qemu-system-x86_64 -M q35,iommu=on Will enable IOMMU only, without interrupt remapping support. Currently, Intel IOMMU IR only support kernel-irqchip={off|split}. We need to specify either of it in -M as well. Signed-off-by: Peter Xu --- hw/core/machine.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index 276ad61..b00f39f 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -300,6 +300,20 @@ static void machine_set_iommu(Object *obj, bool value, Error **errp) ms->iommu = value; } +static bool machine_get_intr(Object *obj, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + return ms->iommu_intr; +} + +static void machine_set_intr(Object *obj, bool value, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + ms->iommu_intr = value; +} + static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) { MachineState *ms = MACHINE(obj); @@ -480,6 +494,12 @@ static void machine_initfn(Object *obj) object_property_set_description(obj, "iommu", "Set on/off to enable/disable Intel IOMMU (VT-d)", NULL); + object_property_add_bool(obj, "intr", machine_get_intr, + machine_set_intr, NULL); + object_property_set_description(obj, "intr", + "Set on/off to enable/disable IOMMU" + " interrupt remapping", + NULL); object_property_add_bool(obj, "suppress-vmdesc", machine_get_suppress_vmdesc, machine_set_suppress_vmdesc, NULL); -- 2.4.3