From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47121) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atddx-0008AR-UV for qemu-devel@nongnu.org; Fri, 22 Apr 2016 12:09:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1atddw-0008H7-3j for qemu-devel@nongnu.org; Fri, 22 Apr 2016 12:09:21 -0400 Received: from mail-lf0-x234.google.com ([2a00:1450:4010:c07::234]:36312) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atddv-0008Gs-P0 for qemu-devel@nongnu.org; Fri, 22 Apr 2016 12:09:20 -0400 Received: by mail-lf0-x234.google.com with SMTP id g184so82091593lfb.3 for ; Fri, 22 Apr 2016 09:09:19 -0700 (PDT) From: Sergey Fedorov Date: Fri, 22 Apr 2016 19:08:50 +0300 Message-Id: <1461341333-19646-9-git-send-email-sergey.fedorov@linaro.org> In-Reply-To: <1461341333-19646-1-git-send-email-sergey.fedorov@linaro.org> References: <1461341333-19646-1-git-send-email-sergey.fedorov@linaro.org> Subject: [Qemu-devel] [PATCH v2 08/11] tcg/aarch64: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Sergey Fedorov , Paolo Bonzini , Peter Crosthwaite , Richard Henderson , Sergey Fedorov , Claudio Fontana , qemu-arm@nongnu.org From: Sergey Fedorov Ensure direct jump patching in AArch64 is atomic by using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov Signed-off-by: Sergey Fedorov --- Changes in v2: * Use tcg_debug_assert() instead of assert() tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 0ed10a974121..29839765b828 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = deposit32(*code_ptr, 0, 26, offset); } +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, + tcg_insn_unit *target) +{ + ptrdiff_t offset = target - code_ptr; + tcg_insn_unit insn; + tcg_debug_assert(offset == sextract64(offset, 0, 26)); + /* read instruction, mask away previous PC_REL26 parameter contents, + set the proper offset, then write back the instruction. */ + insn = atomic_read(code_ptr); + atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); +} + static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; @@ -835,7 +847,7 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr; tcg_insn_unit *target = (tcg_insn_unit *)addr; - reloc_pc26(code_ptr, target); + reloc_pc26_atomic(code_ptr, target); flush_icache_range(jmp_addr, jmp_addr + 4); } -- 2.8.1