From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35908) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1axcow-0005yK-HN for qemu-devel@nongnu.org; Tue, 03 May 2016 12:05:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1axcoh-0007eT-RO for qemu-devel@nongnu.org; Tue, 03 May 2016 12:05:05 -0400 Received: from e06smtp14.uk.ibm.com ([195.75.94.110]:41046) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1axcoh-0007Xh-IO for qemu-devel@nongnu.org; Tue, 03 May 2016 12:04:55 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 3 May 2016 17:04:43 +0100 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Tue, 3 May 2016 18:03:33 +0200 Message-Id: <1462291414-8343-12-git-send-email-clg@kaod.org> In-Reply-To: <1462291414-8343-1-git-send-email-clg@kaod.org> References: <1462291414-8343-1-git-send-email-clg@kaod.org> Subject: [Qemu-devel] [PATCH 11/12] ppc: Get out of emulation on SMT "OR" ops List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Benjamin Herrenschmidt , Cedric Le Goater From: Benjamin Herrenschmidt Otherwise tight loops at smt_low for example, which OPAL does, eat so much CPU that we can't boot a kernel anymore. With that, I can boot 8 CPUs just fine with powernv. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson --- target-ppc/translate.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3fe08e0920d8..875862db33ee 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1398,6 +1398,19 @@ GEN_LOGICAL2(nand, tcg_gen_nand_tl, 0x0E, PPC_INTEGER); /* nor & nor. */ GEN_LOGICAL2(nor, tcg_gen_nor_tl, 0x03, PPC_INTEGER); +#if defined(TARGET_PPC64) +static void gen_pause(DisasContext *ctx) +{ + TCGv_i32 t0 = tcg_const_i32(0); + tcg_gen_st_i32(t0, cpu_env, + -offsetof(PowerPCCPU, env) + offsetof(CPUState, halted)); + tcg_temp_free_i32(t0); + + /* Stop translation, this gives other CPUs a chance to run */ + gen_exception_err(ctx, EXCP_HLT, 1); +} +#endif /* defined(TARGET_PPC64) */ + /* or & or. */ static void gen_or(DisasContext *ctx) { @@ -1453,7 +1466,7 @@ static void gen_or(DisasContext *ctx) } break; case 7: - if (ctx->hv) { + if (ctx->hv && !ctx->pr) { /* Set process priority to very high */ prio = 7; } @@ -1470,6 +1483,10 @@ static void gen_or(DisasContext *ctx) tcg_gen_ori_tl(t0, t0, ((uint64_t)prio) << 50); gen_store_spr(SPR_PPR, t0); tcg_temp_free(t0); + /* Pause us out of TCG otherwise spin loops with smt_low + * eat too much CPU and the kernel hangs + */ + gen_pause(ctx); } #endif } @@ -1495,8 +1512,6 @@ static void gen_ori(DisasContext *ctx) target_ulong uimm = UIMM(ctx->opcode); if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { - /* NOP */ - /* XXX: should handle special NOPs for POWER series */ return; } tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); -- 2.1.4