From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de,
rth@twiddle.net, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 13/52] target-m68k: update CPU flags management
Date: Wed, 4 May 2016 22:11:53 +0200 [thread overview]
Message-ID: <1462392752-17703-14-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1462392752-17703-1-git-send-email-laurent@vivier.eu>
Copied from target-i386
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
cpu-exec.c | 6 ------
target-m68k/cpu-qom.h | 4 ----
target-m68k/cpu.c | 2 --
target-m68k/cpu.h | 1 +
target-m68k/helper.c | 20 --------------------
target-m68k/translate.c | 6 +++++-
6 files changed, 6 insertions(+), 33 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index bbfcbfb..1193cc3 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -147,12 +147,6 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
#if defined(TARGET_I386)
log_cpu_state(cpu, CPU_DUMP_CCOP);
-#elif defined(TARGET_M68K)
- /* ??? Should not modify env state for dumping. */
- cpu_m68k_flush_flags(env, env->cc_op);
- env->cc_op = CC_OP_FLAGS;
- env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
- log_cpu_state(cpu, 0);
#else
log_cpu_state(cpu, 0);
#endif
diff --git a/target-m68k/cpu-qom.h b/target-m68k/cpu-qom.h
index c28e55d..1fadf1d 100644
--- a/target-m68k/cpu-qom.h
+++ b/target-m68k/cpu-qom.h
@@ -77,8 +77,4 @@ void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-
-void m68k_cpu_exec_enter(CPUState *cs);
-void m68k_cpu_exec_exit(CPUState *cs);
-
#endif
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index baca4f8..81f1579 100644
--- a/target-m68k/cpu.c
+++ b/target-m68k/cpu.c
@@ -272,8 +272,6 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
#else
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
#endif
- cc->cpu_exec_enter = m68k_cpu_exec_enter;
- cc->cpu_exec_exit = m68k_cpu_exec_exit;
cc->disas_set_info = m68k_cpu_disas_set_info;
cc->gdb_num_core_regs = 18;
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index c769711..0e4ff08 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -60,6 +60,7 @@
#define EXCP_HALT_INSN 0x101
#define NB_MMU_MODES 2
+#define TARGET_INSN_START_EXTRA_WORDS 1
typedef struct CPUM68KState {
uint32_t dregs[8];
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index d0a346f..ec37c9d 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -921,23 +921,3 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
res |= (uint64_t)(val & 0xffff0000) << 16;
env->macc[acc + 1] = res;
}
-
-void m68k_cpu_exec_enter(CPUState *cs)
-{
- M68kCPU *cpu = M68K_CPU(cs);
- CPUM68KState *env = &cpu->env;
-
- env->cc_op = CC_OP_FLAGS;
- env->cc_dest = env->sr & 0xf;
- env->cc_x = (env->sr >> 4) & 1;
-}
-
-void m68k_cpu_exec_exit(CPUState *cs)
-{
- M68kCPU *cpu = M68K_CPU(cs);
- CPUM68KState *env = &cpu->env;
-
- cpu_m68k_flush_flags(env, env->cc_op);
- env->cc_op = CC_OP_FLAGS;
- env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
-}
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 67d72cc..c7331dc 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3022,7 +3022,7 @@ void gen_intermediate_code(CPUM68KState *env, TranslationBlock *tb)
do {
pc_offset = dc->pc - pc_start;
gen_throws_exception = NULL;
- tcg_gen_insn_start(dc->pc);
+ tcg_gen_insn_start(dc->pc, dc->cc_op);
num_insns++;
if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
@@ -3115,5 +3115,9 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
target_ulong *data)
{
+ int cc_op = data[1];
env->pc = data[0];
+ if (cc_op != CC_OP_DYNAMIC) {
+ env->cc_op = cc_op;
+ }
}
--
2.5.5
next prev parent reply other threads:[~2016-05-04 20:14 UTC|newest]
Thread overview: 131+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-04 20:11 [Qemu-devel] [PATCH 00/52] 680x0 instructions emulation Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 01/52] target-m68k: fix DEBUG_DISPATCH Laurent Vivier
2016-05-06 16:34 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 02/52] target-m68k: Build the opcode table only once to avoid multithreading issues Laurent Vivier
2016-05-06 16:35 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 03/52] target-m68k: define m680x0 CPUs and features Laurent Vivier
2016-05-06 16:35 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 04/52] target-m68k: manage scaled index Laurent Vivier
2016-05-06 16:36 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 05/52] target-m68k: introduce read_imXX() functions Laurent Vivier
2016-05-06 16:36 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 06/52] target-m68k: set disassembler mode to 680x0 or coldfire Laurent Vivier
2016-05-06 16:37 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 07/52] target-m68k: add bkpt instruction Laurent Vivier
2016-05-06 16:42 ` Richard Henderson
2016-05-07 7:08 ` Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 08/52] target-m68k: define operand sizes Laurent Vivier
2016-05-06 16:43 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 09/52] target-m68k: set PAGE_BITS to 12 for m68k Laurent Vivier
2016-05-06 16:44 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 10/52] target-m68k: REG() macro cleanup Laurent Vivier
2016-05-06 16:44 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 11/52] target-m68k: allow to update flags with operation on words and bytes Laurent Vivier
2016-05-06 16:45 ` Richard Henderson
2016-05-07 7:19 ` Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 12/52] target-m68k: Replace helper_xflag_lt with setcond Laurent Vivier
2016-05-04 20:11 ` Laurent Vivier [this message]
2016-05-06 16:46 ` [Qemu-devel] [PATCH 13/52] target-m68k: update CPU flags management Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 14/52] target-m68k: update move to/from ccr/sr Laurent Vivier
2016-05-06 16:47 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 15/52] target-m68k: don't update cc_dest in helpers Laurent Vivier
2016-05-06 16:47 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 16/52] target-m68k: update CPU flags management Laurent Vivier
2016-05-06 16:47 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 17/52] target-m68k: Print flags properly Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 18/52] target-m68k: Some fixes to SR and flags management Laurent Vivier
2016-05-06 16:49 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 19/52] target-m68k: terminate cpu dump with newline Laurent Vivier
2016-05-06 16:49 ` Richard Henderson
2016-05-06 17:41 ` Andreas Schwab
2016-05-04 20:12 ` [Qemu-devel] [PATCH 20/52] target-m68k: Remove incorrect clearing of cc_x Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 21/52] target-m68k: Reorg flags handling Laurent Vivier
2016-05-06 16:51 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 22/52] target-m68k: Introduce DisasCompare Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 23/52] target-m68k: Use setcond for scc Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 24/52] target-m68k: Optimize some comparisons Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 25/52] target-m68k: Optimize gen_flush_flags Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 26/52] target-m68k: Inline shifts Laurent Vivier
2016-05-06 16:53 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 27/52] target-m68k: Inline addx, subx, negx Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 28/52] target-m68k: add addx/subx/negx ops Laurent Vivier
2016-05-06 17:11 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 29/52] target-m68k: factorize flags computing Laurent Vivier
2016-05-06 17:11 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc Laurent Vivier
2016-05-06 17:18 ` Richard Henderson
2016-05-06 17:44 ` Andreas Schwab
2016-05-04 20:12 ` [Qemu-devel] [PATCH 31/52] target-m68k: some bit ops cleanup Laurent Vivier
2016-05-06 17:20 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 32/52] target-m68k: bitfield ops Laurent Vivier
2016-05-06 19:11 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs Laurent Vivier
2016-05-04 21:08 ` [Qemu-devel] [PATCH 34/52] target-m68k: add 64bit mull Laurent Vivier
2016-05-06 19:48 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 35/52] target-m68k: inline rotate ops Laurent Vivier
2016-05-06 20:28 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 36/52] target-m68k: inline shift ops Laurent Vivier
2016-05-06 20:53 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 37/52] target-m68k: add cas/cas2 ops Laurent Vivier
2016-05-06 21:29 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 38/52] target-m68k: add linkl Laurent Vivier
2016-05-06 21:30 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 39/52] target-m68k: movem Laurent Vivier
2016-05-06 21:45 ` Richard Henderson
2016-05-06 19:44 ` [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs Richard Henderson
2016-05-04 21:20 ` [Qemu-devel] [PATCH 40/52] target-m68k: add exg ops Laurent Vivier
2016-05-04 21:20 ` [Qemu-devel] [PATCH 41/52] target-m68k: add addressing modes to not Laurent Vivier
2016-05-06 21:47 ` Richard Henderson
2016-05-04 21:20 ` [Qemu-devel] [PATCH 42/52] target-m68k: eor can manage word and byte operands Laurent Vivier
2016-05-06 21:48 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 43/52] target-m68k: or " Laurent Vivier
2016-05-06 21:49 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 44/52] target-m68k: and " Laurent Vivier
2016-05-06 21:49 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 45/52] target-m68k: suba/adda can manage word operand Laurent Vivier
2016-05-06 21:50 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 46/52] target-m68k: introduce byte and word cc_ops Laurent Vivier
2016-05-06 21:53 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 47/52] target-m68k: add addressing modes to neg Laurent Vivier
2016-05-06 21:54 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 48/52] target-m68k: add/sub manage word and byte operands Laurent Vivier
2016-05-06 21:57 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 49/52] target-m68k: cmp manages word and bytes operands Laurent Vivier
2016-05-06 21:57 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 50/52] target-m68k: immediate ops manage word and byte operands Laurent Vivier
2016-05-06 21:59 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 51/52] target-m68k: add cmpm Laurent Vivier
2016-05-06 22:00 ` Richard Henderson
2016-05-07 19:01 ` Laurent Vivier
2016-05-07 21:50 ` Peter Maydell
2016-05-08 9:07 ` Laurent Vivier
2016-05-08 10:44 ` Peter Maydell
2016-05-04 21:21 ` [Qemu-devel] [PATCH 52/52] target-m68k: sr/ccr cleanup Laurent Vivier
2016-05-06 22:02 ` Richard Henderson
2016-05-06 21:47 ` [Qemu-devel] [PATCH 40/52] target-m68k: add exg ops Richard Henderson
2016-05-06 9:35 ` [Qemu-devel] [PATCH 00/52] 680x0 instructions emulation Andreas Schwab
2016-05-06 9:54 ` Laurent Vivier
2016-05-06 10:15 ` Andreas Schwab
2016-05-06 11:40 ` John Paul Adrian Glaubitz
2016-05-06 12:44 ` Andreas Schwab
2016-05-06 13:02 ` John Paul Adrian Glaubitz
2016-05-06 13:24 ` Andreas Schwab
2016-05-06 13:45 ` John Paul Adrian Glaubitz
2016-05-06 13:48 ` Andreas Schwab
2016-05-06 13:53 ` John Paul Adrian Glaubitz
2016-05-06 13:53 ` Laurent Vivier
2016-05-06 13:58 ` Andreas Schwab
2016-05-06 14:25 ` Andreas Schwab
2016-05-06 14:47 ` Andreas Schwab
2016-05-06 11:40 ` John Paul Adrian Glaubitz
2016-05-06 11:45 ` Alexander Graf
2016-05-06 11:57 ` Laurent Vivier
2016-05-06 12:03 ` Peter Maydell
2016-05-12 21:17 ` John Paul Adrian Glaubitz
2016-05-12 21:20 ` Laurent Vivier
[not found] ` <D2F89431-FF87-456A-A628-7F8ADCDDAFC7@suse.de>
2016-05-12 21:25 ` John Paul Adrian Glaubitz
[not found] ` <C662446E-C86D-4838-83C5-14E8E6C52D2A@suse.de>
2016-05-12 21:32 ` John Paul Adrian Glaubitz
2016-05-12 21:30 ` Laurent Vivier
2016-05-06 10:06 ` Alexander Graf
2016-05-06 10:30 ` [Qemu-devel] [PATCH] MAINTAINERS: update M68K entry Laurent Vivier
2016-05-12 7:55 ` Thomas Huth
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1462392752-17703-14-git-send-email-laurent@vivier.eu \
--to=laurent@vivier.eu \
--cc=agraf@suse.de \
--cc=gerg@uclinux.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=schwab@linux-m68k.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).