From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de,
rth@twiddle.net, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 15/52] target-m68k: don't update cc_dest in helpers
Date: Wed, 4 May 2016 22:11:55 +0200 [thread overview]
Message-ID: <1462392752-17703-16-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1462392752-17703-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/cpu.h | 1 -
target-m68k/helper.c | 28 ++++++++++++++--------------
target-m68k/helper.h | 2 +-
target-m68k/translate.c | 4 ++--
4 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 0e4ff08..d3acd33 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -129,7 +129,6 @@ int cpu_m68k_exec(CPUState *cpu);
is returned if the signal was handled by the virtual CPU. */
int cpu_m68k_signal_handler(int host_signum, void *pinfo,
void *puc);
-void cpu_m68k_flush_flags(CPUM68KState *, int);
enum {
CC_OP_DYNAMIC, /* Use env->cc_op */
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index ec37c9d..c3e4380 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -131,9 +131,8 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)
/* TODO: Add [E]MAC registers. */
}
-void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
+static uint32_t cpu_m68k_flush_flags(CPUM68KState *env, int op)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
int flags;
uint32_t src;
uint32_t dest;
@@ -201,7 +200,7 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
flags = 0;
src = env->cc_src;
dest = env->cc_dest;
- switch (cc_op) {
+ switch (op) {
case CC_OP_FLAGS:
flags = dest;
break;
@@ -267,10 +266,9 @@ set_x:
SET_FLAGS_SHIFT(int32_t);
break;
default:
- cpu_abort(CPU(cpu), "Bad CC_OP %d", cc_op);
+ g_assert_not_reached();
}
- env->cc_op = CC_OP_FLAGS;
- env->cc_dest = flags;
+ return flags;
}
void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
@@ -421,20 +419,21 @@ uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint32_t res;
uint32_t old_flags;
+ int op;
old_flags = env->cc_dest;
if (env->cc_x) {
env->cc_x = (op1 <= op2);
- env->cc_op = CC_OP_SUBX;
+ op = CC_OP_SUBX;
res = op1 - (op2 + 1);
} else {
env->cc_x = (op1 < op2);
- env->cc_op = CC_OP_SUB;
+ op = CC_OP_SUB;
res = op1 - op2;
}
env->cc_dest = res;
env->cc_src = op2;
- cpu_m68k_flush_flags(env, env->cc_op);
+ env->cc_dest = cpu_m68k_flush_flags(env, op);
/* !Z is sticky. */
env->cc_dest &= (old_flags | ~CCF_Z);
return res;
@@ -444,20 +443,21 @@ uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint32_t res;
uint32_t old_flags;
+ int op;
old_flags = env->cc_dest;
if (env->cc_x) {
res = op1 + op2 + 1;
env->cc_x = (res <= op2);
- env->cc_op = CC_OP_ADDX;
+ op = CC_OP_ADDX;
} else {
res = op1 + op2;
env->cc_x = (res < op2);
- env->cc_op = CC_OP_ADD;
+ op = CC_OP_ADD;
}
env->cc_dest = res;
env->cc_src = op2;
- cpu_m68k_flush_flags(env, env->cc_op);
+ env->cc_dest = cpu_m68k_flush_flags(env, op);
/* !Z is sticky. */
env->cc_dest &= (old_flags | ~CCF_Z);
return res;
@@ -789,9 +789,9 @@ void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
}
}
-void HELPER(flush_flags)(CPUM68KState *env, uint32_t cc_op)
+uint32_t HELPER(flush_flags)(CPUM68KState *env, uint32_t op)
{
- cpu_m68k_flush_flags(env, cc_op);
+ return cpu_m68k_flush_flags(env, op);
}
uint32_t HELPER(get_macf)(CPUM68KState *env, uint64_t val)
diff --git a/target-m68k/helper.h b/target-m68k/helper.h
index c24ace5..0f5a7cf 100644
--- a/target-m68k/helper.h
+++ b/target-m68k/helper.h
@@ -45,5 +45,5 @@ DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
-DEF_HELPER_2(flush_flags, void, env, i32)
+DEF_HELPER_2(flush_flags, i32, env, i32)
DEF_HELPER_2(raise_exception, void, env, i32)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index cddc2b5..16f09ca 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -422,7 +422,7 @@ static inline void gen_flush_flags(DisasContext *s)
if (s->cc_op == CC_OP_FLAGS)
return;
gen_flush_cc_op(s);
- gen_helper_flush_flags(cpu_env, QREG_CC_OP);
+ gen_helper_flush_flags(QREG_CC_DEST, cpu_env, QREG_CC_OP);
s->cc_op = CC_OP_FLAGS;
}
@@ -716,6 +716,7 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
/* TODO: Optimize compare/branch pairs rather than always flushing
flag state to CC_OP_FLAGS. */
gen_flush_flags(s);
+ gen_flush_cc_op(s);
switch (cond) {
case 0: /* T */
tcg_gen_br(l1);
@@ -1669,7 +1670,6 @@ DISAS_INSN(branch)
/* bsr */
gen_push(s, tcg_const_i32(s->pc));
}
- gen_flush_cc_op(s);
if (op > 1) {
/* Bcc */
l1 = gen_new_label();
--
2.5.5
next prev parent reply other threads:[~2016-05-04 20:14 UTC|newest]
Thread overview: 131+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-04 20:11 [Qemu-devel] [PATCH 00/52] 680x0 instructions emulation Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 01/52] target-m68k: fix DEBUG_DISPATCH Laurent Vivier
2016-05-06 16:34 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 02/52] target-m68k: Build the opcode table only once to avoid multithreading issues Laurent Vivier
2016-05-06 16:35 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 03/52] target-m68k: define m680x0 CPUs and features Laurent Vivier
2016-05-06 16:35 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 04/52] target-m68k: manage scaled index Laurent Vivier
2016-05-06 16:36 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 05/52] target-m68k: introduce read_imXX() functions Laurent Vivier
2016-05-06 16:36 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 06/52] target-m68k: set disassembler mode to 680x0 or coldfire Laurent Vivier
2016-05-06 16:37 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 07/52] target-m68k: add bkpt instruction Laurent Vivier
2016-05-06 16:42 ` Richard Henderson
2016-05-07 7:08 ` Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 08/52] target-m68k: define operand sizes Laurent Vivier
2016-05-06 16:43 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 09/52] target-m68k: set PAGE_BITS to 12 for m68k Laurent Vivier
2016-05-06 16:44 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 10/52] target-m68k: REG() macro cleanup Laurent Vivier
2016-05-06 16:44 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 11/52] target-m68k: allow to update flags with operation on words and bytes Laurent Vivier
2016-05-06 16:45 ` Richard Henderson
2016-05-07 7:19 ` Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 12/52] target-m68k: Replace helper_xflag_lt with setcond Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 13/52] target-m68k: update CPU flags management Laurent Vivier
2016-05-06 16:46 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 14/52] target-m68k: update move to/from ccr/sr Laurent Vivier
2016-05-06 16:47 ` Richard Henderson
2016-05-04 20:11 ` Laurent Vivier [this message]
2016-05-06 16:47 ` [Qemu-devel] [PATCH 15/52] target-m68k: don't update cc_dest in helpers Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 16/52] target-m68k: update CPU flags management Laurent Vivier
2016-05-06 16:47 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 17/52] target-m68k: Print flags properly Laurent Vivier
2016-05-04 20:11 ` [Qemu-devel] [PATCH 18/52] target-m68k: Some fixes to SR and flags management Laurent Vivier
2016-05-06 16:49 ` Richard Henderson
2016-05-04 20:11 ` [Qemu-devel] [PATCH 19/52] target-m68k: terminate cpu dump with newline Laurent Vivier
2016-05-06 16:49 ` Richard Henderson
2016-05-06 17:41 ` Andreas Schwab
2016-05-04 20:12 ` [Qemu-devel] [PATCH 20/52] target-m68k: Remove incorrect clearing of cc_x Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 21/52] target-m68k: Reorg flags handling Laurent Vivier
2016-05-06 16:51 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 22/52] target-m68k: Introduce DisasCompare Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 23/52] target-m68k: Use setcond for scc Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 24/52] target-m68k: Optimize some comparisons Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 25/52] target-m68k: Optimize gen_flush_flags Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 26/52] target-m68k: Inline shifts Laurent Vivier
2016-05-06 16:53 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 27/52] target-m68k: Inline addx, subx, negx Laurent Vivier
2016-05-04 20:12 ` [Qemu-devel] [PATCH 28/52] target-m68k: add addx/subx/negx ops Laurent Vivier
2016-05-06 17:11 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 29/52] target-m68k: factorize flags computing Laurent Vivier
2016-05-06 17:11 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc Laurent Vivier
2016-05-06 17:18 ` Richard Henderson
2016-05-06 17:44 ` Andreas Schwab
2016-05-04 20:12 ` [Qemu-devel] [PATCH 31/52] target-m68k: some bit ops cleanup Laurent Vivier
2016-05-06 17:20 ` Richard Henderson
2016-05-04 20:12 ` [Qemu-devel] [PATCH 32/52] target-m68k: bitfield ops Laurent Vivier
2016-05-06 19:11 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs Laurent Vivier
2016-05-04 21:08 ` [Qemu-devel] [PATCH 34/52] target-m68k: add 64bit mull Laurent Vivier
2016-05-06 19:48 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 35/52] target-m68k: inline rotate ops Laurent Vivier
2016-05-06 20:28 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 36/52] target-m68k: inline shift ops Laurent Vivier
2016-05-06 20:53 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 37/52] target-m68k: add cas/cas2 ops Laurent Vivier
2016-05-06 21:29 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 38/52] target-m68k: add linkl Laurent Vivier
2016-05-06 21:30 ` Richard Henderson
2016-05-04 21:08 ` [Qemu-devel] [PATCH 39/52] target-m68k: movem Laurent Vivier
2016-05-06 21:45 ` Richard Henderson
2016-05-06 19:44 ` [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs Richard Henderson
2016-05-04 21:20 ` [Qemu-devel] [PATCH 40/52] target-m68k: add exg ops Laurent Vivier
2016-05-04 21:20 ` [Qemu-devel] [PATCH 41/52] target-m68k: add addressing modes to not Laurent Vivier
2016-05-06 21:47 ` Richard Henderson
2016-05-04 21:20 ` [Qemu-devel] [PATCH 42/52] target-m68k: eor can manage word and byte operands Laurent Vivier
2016-05-06 21:48 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 43/52] target-m68k: or " Laurent Vivier
2016-05-06 21:49 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 44/52] target-m68k: and " Laurent Vivier
2016-05-06 21:49 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 45/52] target-m68k: suba/adda can manage word operand Laurent Vivier
2016-05-06 21:50 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 46/52] target-m68k: introduce byte and word cc_ops Laurent Vivier
2016-05-06 21:53 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 47/52] target-m68k: add addressing modes to neg Laurent Vivier
2016-05-06 21:54 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 48/52] target-m68k: add/sub manage word and byte operands Laurent Vivier
2016-05-06 21:57 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 49/52] target-m68k: cmp manages word and bytes operands Laurent Vivier
2016-05-06 21:57 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 50/52] target-m68k: immediate ops manage word and byte operands Laurent Vivier
2016-05-06 21:59 ` Richard Henderson
2016-05-04 21:21 ` [Qemu-devel] [PATCH 51/52] target-m68k: add cmpm Laurent Vivier
2016-05-06 22:00 ` Richard Henderson
2016-05-07 19:01 ` Laurent Vivier
2016-05-07 21:50 ` Peter Maydell
2016-05-08 9:07 ` Laurent Vivier
2016-05-08 10:44 ` Peter Maydell
2016-05-04 21:21 ` [Qemu-devel] [PATCH 52/52] target-m68k: sr/ccr cleanup Laurent Vivier
2016-05-06 22:02 ` Richard Henderson
2016-05-06 21:47 ` [Qemu-devel] [PATCH 40/52] target-m68k: add exg ops Richard Henderson
2016-05-06 9:35 ` [Qemu-devel] [PATCH 00/52] 680x0 instructions emulation Andreas Schwab
2016-05-06 9:54 ` Laurent Vivier
2016-05-06 10:15 ` Andreas Schwab
2016-05-06 11:40 ` John Paul Adrian Glaubitz
2016-05-06 12:44 ` Andreas Schwab
2016-05-06 13:02 ` John Paul Adrian Glaubitz
2016-05-06 13:24 ` Andreas Schwab
2016-05-06 13:45 ` John Paul Adrian Glaubitz
2016-05-06 13:48 ` Andreas Schwab
2016-05-06 13:53 ` John Paul Adrian Glaubitz
2016-05-06 13:53 ` Laurent Vivier
2016-05-06 13:58 ` Andreas Schwab
2016-05-06 14:25 ` Andreas Schwab
2016-05-06 14:47 ` Andreas Schwab
2016-05-06 11:40 ` John Paul Adrian Glaubitz
2016-05-06 11:45 ` Alexander Graf
2016-05-06 11:57 ` Laurent Vivier
2016-05-06 12:03 ` Peter Maydell
2016-05-12 21:17 ` John Paul Adrian Glaubitz
2016-05-12 21:20 ` Laurent Vivier
[not found] ` <D2F89431-FF87-456A-A628-7F8ADCDDAFC7@suse.de>
2016-05-12 21:25 ` John Paul Adrian Glaubitz
[not found] ` <C662446E-C86D-4838-83C5-14E8E6C52D2A@suse.de>
2016-05-12 21:32 ` John Paul Adrian Glaubitz
2016-05-12 21:30 ` Laurent Vivier
2016-05-06 10:06 ` Alexander Graf
2016-05-06 10:30 ` [Qemu-devel] [PATCH] MAINTAINERS: update M68K entry Laurent Vivier
2016-05-12 7:55 ` Thomas Huth
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1462392752-17703-16-git-send-email-laurent@vivier.eu \
--to=laurent@vivier.eu \
--cc=agraf@suse.de \
--cc=gerg@uclinux.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=schwab@linux-m68k.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).