From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60531) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0a5M-0000Gp-Vz for qemu-devel@nongnu.org; Wed, 11 May 2016 15:46:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b0a5F-00083e-SV for qemu-devel@nongnu.org; Wed, 11 May 2016 15:46:19 -0400 Received: from mail-pa0-x243.google.com ([2607:f8b0:400e:c03::243]:35777) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0a5F-00083L-KV for qemu-devel@nongnu.org; Wed, 11 May 2016 15:46:13 -0400 Received: by mail-pa0-x243.google.com with SMTP id zy2so5042435pac.2 for ; Wed, 11 May 2016 12:46:13 -0700 (PDT) Sender: Corey Minyard From: minyard@acm.org Date: Wed, 11 May 2016 14:46:01 -0500 Message-Id: <1462995966-1184-3-git-send-email-minyard@acm.org> In-Reply-To: <1462995966-1184-1-git-send-email-minyard@acm.org> References: <1462995966-1184-1-git-send-email-minyard@acm.org> Subject: [Qemu-devel] [PATCH 2/7] pm_smbus: Add the ability to force block transfer enable List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov , "Michael S . Tsirkin" , Paolo Bonzini , qemu-devel@nongnu.org, minyard@acm.org Cc: Corey Minyard From: Corey Minyard The PIIX4 hardware has block transfer buffer always enabled in the hardware, but the i801 does not. Add a parameter to pm_smbus_init to force on the block transfer so the PIIX4 handler can enable this by default, as it was disabled by default before. Signed-off-by: Corey Minyard --- hw/acpi/piix4.c | 2 +- hw/i2c/pm_smbus.c | 4 +++- hw/i2c/smbus_ich9.c | 2 +- include/hw/i2c/pm_smbus.h | 2 +- 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 16abdf1..ab3af21 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -466,7 +466,7 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) pci_conf[0x90] = s->smb_io_base | 1; pci_conf[0x91] = s->smb_io_base >> 8; pci_conf[0xd2] = 0x09; - pm_smbus_init(DEVICE(dev), &s->smb); + pm_smbus_init(DEVICE(dev), &s->smb, true); memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); memory_region_add_subregion(pci_address_space_io(dev), s->smb_io_base, &s->smb.io); diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c index d8d1032..4b4c165 100644 --- a/hw/i2c/pm_smbus.c +++ b/hw/i2c/pm_smbus.c @@ -366,11 +366,13 @@ const VMStateDescription pmsmb_vmstate = { } }; -void pm_smbus_init(DeviceState *parent, PMSMBus *smb) +void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk) { smb->op_done = true; smb->reset = pm_smbus_reset; smb->smbus = i2c_init_bus(parent, "i2c"); + if (force_aux_blk) + smb->smb_auxctl |= AUX_BLK; memory_region_init_io(&smb->io, OBJECT(parent), &pm_smbus_ops, smb, "pm-smbus", 64); } diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index 8289cd1..4581cf6 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -90,7 +90,7 @@ static void ich9_smbus_realize(PCIDevice *d, Error **errp) pci_set_byte(d->config + ICH9_SMB_HOSTC, 0); /* TODO bar0, bar1: 64bit BAR support*/ - pm_smbus_init(&d->qdev, &s->smb); + pm_smbus_init(&d->qdev, &s->smb, false); pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO, &s->smb.io); } diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h index bfe740a..e64a206 100644 --- a/include/hw/i2c/pm_smbus.h +++ b/include/hw/i2c/pm_smbus.h @@ -32,7 +32,7 @@ typedef struct PMSMBus { bool op_done; } PMSMBus; -void pm_smbus_init(DeviceState *parent, PMSMBus *smb); +void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk); extern const VMStateDescription pmsmb_vmstate; -- 2.7.4