From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42835) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0byP-0003Lm-TQ for qemu-devel@nongnu.org; Wed, 11 May 2016 17:47:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b0byL-0003dX-J8 for qemu-devel@nongnu.org; Wed, 11 May 2016 17:47:16 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:60372) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b0byK-0003au-Rw for qemu-devel@nongnu.org; Wed, 11 May 2016 17:47:13 -0400 From: =?utf-8?b?TGx1w61z?= Vilanova Date: Wed, 11 May 2016 21:55:45 +0200 Message-Id: <146299654534.5203.12284720012038201214.stgit@localhost> In-Reply-To: <146299653361.5203.4475655460859700214.stgit@localhost> References: <146299653361.5203.4475655460859700214.stgit@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 2/2] trace: [all] Add "guest_mem_before" event List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Stefan Hajnoczi , Paolo Bonzini , Peter Crosthwaite , Richard Henderson Signed-off-by: Llu=C3=ADs Vilanova --- include/exec/cpu_ldst_template.h | 25 ++++++++++++++++ include/exec/cpu_ldst_useronly_template.h | 22 ++++++++++++++ tcg/tcg-op.c | 32 ++++++++++++++++++-- trace-events | 22 ++++++++++++++ trace/mem-internal.h | 46 +++++++++++++++++++++++= ++++++ trace/mem.h | 34 +++++++++++++++++++++ 6 files changed, 177 insertions(+), 4 deletions(-) create mode 100644 trace/mem-internal.h create mode 100644 trace/mem.h diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_tem= plate.h index 3091c00..914636d 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -23,6 +23,13 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +#if !defined(SOFTMMU_CODE_ACCESS) +#include "trace.h" +#endif + +#include "trace/mem.h" + #if DATA_SIZE =3D=3D 8 #define SUFFIX q #define USUFFIX q @@ -80,6 +87,12 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUA= rchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, false, MO_TE, false)); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; @@ -112,6 +125,12 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CP= UArchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, true, MO_TE, false)); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; @@ -148,6 +167,12 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPU= ArchState *env, int mmu_idx; TCGMemOpIdx oi; =20 +#if !defined(SOFTMMU_CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, false, MO_TE, true)); +#endif + addr =3D ptr; page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D CPU_MMU_INDEX; diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu= _ldst_useronly_template.h index 040b147..b1378bf 100644 --- a/include/exec/cpu_ldst_useronly_template.h +++ b/include/exec/cpu_ldst_useronly_template.h @@ -22,6 +22,13 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ + +#if !defined(CODE_ACCESS) +#include "trace.h" +#endif + +#include "trace/mem.h" + #if DATA_SIZE =3D=3D 8 #define SUFFIX q #define USUFFIX q @@ -53,6 +60,11 @@ static inline RES_TYPE glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong p= tr) { +#if !defined(CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, false, MO_TE, false)); +#endif return glue(glue(ld, USUFFIX), _p)(g2h(ptr)); } =20 @@ -68,6 +80,11 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUA= rchState *env, static inline int glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong p= tr) { +#if !defined(CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, true, MO_TE, false)); +#endif return glue(glue(lds, SUFFIX), _p)(g2h(ptr)); } =20 @@ -85,6 +102,11 @@ static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong pt= r, RES_TYPE v) { +#if !defined(CODE_ACCESS) + trace_guest_mem_before_exec( + ENV_GET_CPU(env), ptr, + trace_mem_build_info(DATA_SIZE, false, MO_TE, true)); +#endif glue(glue(st, SUFFIX), _p)(g2h(ptr), v); } =20 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index f554b86..3b7e3ff 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -25,6 +25,8 @@ #include "qemu/osdep.h" #include "tcg.h" #include "tcg-op.h" +#include "trace-tcg.h" +#include "trace/mem.h" =20 /* Reduce the number of ifdefs below. This assumes that all uses of TCGV_HIGH and TCGV_LOW are properly protected by a conditional that @@ -1904,22 +1906,41 @@ static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 = val, TCGv addr, #endif } =20 -void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +static inline void do_tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGAr= g idx, + TCGMemOp memop) { memop =3D tcg_canonicalize_memop(memop, 0, 0); gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx); } =20 -void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +{ + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, trace_mem_get_info(memop, 0)); + do_tcg_gen_qemu_ld_i32(val, addr, idx, memop); +} + +static inline void do_tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGAr= g idx, + TCGMemOp memop) { memop =3D tcg_canonicalize_memop(memop, 0, 1); gen_ldst_i32(INDEX_op_qemu_st_i32, val, addr, memop, idx); } =20 +void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) +{ + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, trace_mem_get_info(memop, 1)); + do_tcg_gen_qemu_st_i32(val, addr, idx, memop); +} + void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) { + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, trace_mem_get_info(memop, 0)); + if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { - tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); + do_tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); if (memop & MO_SIGN) { tcg_gen_sari_i32(TCGV_HIGH(val), TCGV_LOW(val), 31); } else { @@ -1934,8 +1955,11 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, = TCGArg idx, TCGMemOp memop) =20 void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp m= emop) { + trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, + addr, trace_mem_get_info(memop, 0)); + if (TCG_TARGET_REG_BITS =3D=3D 32 && (memop & MO_SIZE) < MO_64) { - tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); + do_tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); return; } =20 diff --git a/trace-events b/trace-events index 8350743..5d99d54 100644 --- a/trace-events +++ b/trace-events @@ -1909,3 +1909,25 @@ aspeed_vic_update_fiq(int flags) "Raising FIQ: %d" aspeed_vic_update_irq(int flags) "Raising IRQ: %d" aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x= %" PRIx64 " of size %u: 0x%" PRIx32 aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%"= PRIx64 " of size %u: 0x%" PRIx32 + + +### Guest events, keep at bottom + +# @vaddr: Access' virtual address. +# @info : Access' information (see below). +# +# Start virtual memory access (before any potential access violation). +# +# Does not include memory accesses performed by devices. +# +# Access information can be parsed as: +# +# struct mem_info { +# uint8_t size : 2; /* bytes */ +# bool sign_extend: 1; /* sign-extended */ +# uint8_t endianness : 1; /* 0: little, 1: big */ +# bool store : 1; /* wheter it's a store operation */ +# }; +# +# Targets: TCG(all) +disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=3D%d",= "vaddr=3D0x%016"PRIx64" info=3D%d" diff --git a/trace/mem-internal.h b/trace/mem-internal.h new file mode 100644 index 0000000..970d525 --- /dev/null +++ b/trace/mem-internal.h @@ -0,0 +1,46 @@ +/* + * Helper functions for guest memory tracing + * + * Copyright (C) 2016 Llu=C3=ADs Vilanova + * + * This work is licensed under the terms of the GNU GPL, version 2 or la= ter. + * See the COPYING file in the top-level directory. + */ + +#ifndef TRACE__MEM_INTERNAL_H +#define TRACE__MEM_INTERNAL_H + +static inline uint8_t trace_mem_get_info(TCGMemOp op, bool store) +{ + uint8_t res =3D op; + bool be =3D (op & MO_BSWAP) =3D=3D MO_BE; + + /* remove untraced fields */ + res &=3D (~((1ULL << 4) - 1)); + /* make endianness absolute */ + res &=3D ~MO_BSWAP; + if (be) { + res |=3D 1ULL << 3; + } + /* add fields */ + if (store) { + res |=3D 1ULL << 4; + } + + return res; +} + +static inline inline uint8_t trace_mem_build_info( + uint8_t size, bool sign_extend, uint8_t endianness, bool store) +{ + uint8_t res =3D 0; + res |=3D size; + res |=3D (sign_extend << 2); + if (endianness =3D=3D MO_BE) { + res |=3D (1ULL << 3); + } + res |=3D (store << 4); + return res; +} + +#endif /* TRACE__MEM_INTERNAL_H */ diff --git a/trace/mem.h b/trace/mem.h new file mode 100644 index 0000000..a0244bc --- /dev/null +++ b/trace/mem.h @@ -0,0 +1,34 @@ +/* + * Helper functions for guest memory tracing + * + * Copyright (C) 2016 Llu=C3=ADs Vilanova + * + * This work is licensed under the terms of the GNU GPL, version 2 or la= ter. + * See the COPYING file in the top-level directory. + */ + +#ifndef TRACE__MEM_H +#define TRACE__MEM_H + +#include "tcg/tcg.h" + + +/** + * trace_mem_get_info: + * + * Return a value for the 'info' argument in guest memory access traces. + */ +static uint8_t trace_mem_get_info(TCGMemOp op, bool store); + +/** + * trace_mem_build_info: + * + * Return a value for the 'info' argument in guest memory access traces. + */ +static uint8_t trace_mem_build_info(uint8_t size, bool sign_extend, + uint8_t endianness, bool store); + + +#include "trace/mem-internal.h" + +#endif /* TRACE__MEM_H */