From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 25/43] ACPI: Virt: Generate SRAT table
Date: Thu, 12 May 2016 14:32:47 +0100 [thread overview]
Message-ID: <1463059985-2272-26-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1463059985-2272-1-git-send-email-peter.maydell@linaro.org>
From: Shannon Zhao <shannon.zhao@linaro.org>
To support NUMA, it needs to generate SRAT ACPI table.
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 1461667229-9216-6-git-send-email-zhaoshenglong@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/virt-acpi-build.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index f51fe39..26a7bac 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -43,6 +43,7 @@
#include "hw/acpi/aml-build.h"
#include "hw/pci/pcie_host.h"
#include "hw/pci/pci.h"
+#include "sysemu/numa.h"
#define ARM_SPI_BASE 32
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -414,6 +415,52 @@ build_spcr(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
}
static void
+build_srat(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
+{
+ AcpiSystemResourceAffinityTable *srat;
+ AcpiSratProcessorGiccAffinity *core;
+ AcpiSratMemoryAffinity *numamem;
+ int i, j, srat_start;
+ uint64_t mem_base;
+ uint32_t *cpu_node = g_malloc0(guest_info->smp_cpus * sizeof(uint32_t));
+
+ for (i = 0; i < guest_info->smp_cpus; i++) {
+ for (j = 0; j < nb_numa_nodes; j++) {
+ if (test_bit(i, numa_info[j].node_cpu)) {
+ cpu_node[i] = j;
+ break;
+ }
+ }
+ }
+
+ srat_start = table_data->len;
+ srat = acpi_data_push(table_data, sizeof(*srat));
+ srat->reserved1 = cpu_to_le32(1);
+
+ for (i = 0; i < guest_info->smp_cpus; ++i) {
+ core = acpi_data_push(table_data, sizeof(*core));
+ core->type = ACPI_SRAT_PROCESSOR_GICC;
+ core->length = sizeof(*core);
+ core->proximity = cpu_to_le32(cpu_node[i]);
+ core->acpi_processor_uid = cpu_to_le32(i);
+ core->flags = cpu_to_le32(1);
+ }
+ g_free(cpu_node);
+
+ mem_base = guest_info->memmap[VIRT_MEM].base;
+ for (i = 0; i < nb_numa_nodes; ++i) {
+ numamem = acpi_data_push(table_data, sizeof(*numamem));
+ build_srat_memory(numamem, mem_base, numa_info[i].node_mem, i,
+ MEM_AFFINITY_ENABLED);
+ mem_base += numa_info[i].node_mem;
+ }
+
+ build_header(linker, table_data,
+ (void *)(table_data->data + srat_start), "SRAT",
+ table_data->len - srat_start, 3, NULL, NULL);
+}
+
+static void
build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
{
AcpiTableMcfg *mcfg;
@@ -638,6 +685,11 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
build_spcr(tables_blob, tables->linker, guest_info);
+ if (nb_numa_nodes > 0) {
+ acpi_add_table(table_offsets, tables_blob);
+ build_srat(tables_blob, tables->linker, guest_info);
+ }
+
/* RSDT is pointed to by RSDP */
rsdt = tables_blob->len;
build_rsdt(tables_blob, tables->linker, table_offsets, NULL, NULL);
--
1.9.1
next prev parent reply other threads:[~2016-05-12 13:33 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-12 13:32 [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 01/43] blizzard: Remove support for DEPTH != 32 Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 02/43] omap_lcdc: " Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 03/43] hw/intc: QOM'ify etraxfs_pic.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 04/43] hw/intc: QOM'ify exynos4210_combiner.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 05/43] hw/intc: QOM'ify exynos4210_gic.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 06/43] hw/intc: QOM'ify imx_avic.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 07/43] hw/intc: QOM'ify pl190.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 08/43] hw/intc: QOM'ify slavio_intctl.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 09/43] hw/intc: QOM'ify grlib_irqmp.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 10/43] hw/intc: QOM'ify omap_intc.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 11/43] bcm2835_property: use cached values when querying framebuffer Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 12/43] hw/arm/nseries: Allocating Large sized arrays to heap Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 13/43] target-arm: Stage 2 permission fault was fixed in AArch32 state Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 14/43] target-arm: Fix descriptor address masking in ARM address translation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 15/43] tcg: Add tcg_set_insn_param Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 16/43] gen-icount: Use tcg_set_insn_param Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 17/43] target-arm: Split data abort syndrome generator Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 18/43] target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9 Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 19/43] target-arm/translate-a64.c: Unify some of the ldst_reg decoding Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 20/43] hw/display: QOM'ify exynos4210_fimd.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 21/43] ARM: Virt: Set numa-node-id for cpu and memory nodes Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 22/43] ACPI: Add GICC Affinity Structure Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 23/43] ACPI: Fix the definition of proximity in AcpiSratMemoryAffinity Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 24/43] ACPI: move acpi_build_srat_memory to common place Peter Maydell
2016-05-12 13:32 ` Peter Maydell [this message]
2016-05-12 13:32 ` [Qemu-devel] [PULL 26/43] ARM: Factor out ARM on/off PSCI control functions Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 27/43] i.MX: Add i.MX6 System Reset Controller device Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 28/43] FIFO: Add a FIFO32 implementation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 29/43] i.MX: Add the Freescale SPI Controller Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 30/43] i.MX: Add i.MX6 SOC implementation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 31/43] i.MX: Add sabrelite i.MX6 emulation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 32/43] hw/display/blizzard: Expand out macros Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 33/43] hw/display/blizzard: Remove blizzard_template.h Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 34/43] target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 35/43] hw/arm: QOM'ify armv7m.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 36/43] hw/arm: QOM'ify highbank.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 37/43] hw/arm: QOM'ify integratorcp.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 38/43] hw/arm: QOM'ify pxa2xx.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 39/43] hw/arm: QOM'ify pxa2xx_pic.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 40/43] hw/arm: QOM'ify spitz.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 41/43] hw/arm: QOM'ify stellaris.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 42/43] hw/arm: QOM'ify strongarm.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 43/43] hw/arm: QOM'ify versatilepb.c Peter Maydell
2016-05-12 15:33 ` [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1463059985-2272-26-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).