From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 05/43] hw/intc: QOM'ify exynos4210_gic.c
Date: Thu, 12 May 2016 14:32:27 +0100 [thread overview]
Message-ID: <1463059985-2272-6-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1463059985-2272-1-git-send-email-peter.maydell@linaro.org>
From: "xiaoqiang.zhao" <zxq_yx_007@163.com>
* Drop the old SysBus init function and use instance_init
* Split the exynos4210_irq_gate_init into an instance_init
and a DeviceClass::realize function
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/exynos4210_gic.c | 39 ++++++++++++++++++++-------------------
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index 4f7e89f..fd7a8f3 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -281,10 +281,11 @@ static void exynos4210_gic_set_irq(void *opaque, int irq, int level)
qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
}
-static int exynos4210_gic_init(SysBusDevice *sbd)
+static void exynos4210_gic_init(Object *obj)
{
- DeviceState *dev = DEVICE(sbd);
- Exynos4210GicState *s = EXYNOS4210_GIC(dev);
+ DeviceState *dev = DEVICE(obj);
+ Exynos4210GicState *s = EXYNOS4210_GIC(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
uint32_t i;
const char cpu_prefix[] = "exynos4210-gic-alias_cpu";
const char dist_prefix[] = "exynos4210-gic-alias_dist";
@@ -305,15 +306,15 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
qdev_init_gpio_in(dev, exynos4210_gic_set_irq,
EXYNOS4210_GIC_NIRQ - 32);
- memory_region_init(&s->cpu_container, OBJECT(s), "exynos4210-cpu-container",
+ memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container",
EXYNOS4210_EXT_GIC_CPU_REGION_SIZE);
- memory_region_init(&s->dist_container, OBJECT(s), "exynos4210-dist-container",
+ memory_region_init(&s->dist_container, obj, "exynos4210-dist-container",
EXYNOS4210_EXT_GIC_DIST_REGION_SIZE);
for (i = 0; i < s->num_cpu; i++) {
/* Map CPU interface per SMP Core */
sprintf(cpu_alias_name, "%s%x", cpu_prefix, i);
- memory_region_init_alias(&s->cpu_alias[i], OBJECT(s),
+ memory_region_init_alias(&s->cpu_alias[i], obj,
cpu_alias_name,
sysbus_mmio_get_region(busdev, 1),
0,
@@ -323,7 +324,7 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
/* Map Distributor per SMP Core */
sprintf(dist_alias_name, "%s%x", dist_prefix, i);
- memory_region_init_alias(&s->dist_alias[i], OBJECT(s),
+ memory_region_init_alias(&s->dist_alias[i], obj,
dist_alias_name,
sysbus_mmio_get_region(busdev, 0),
0,
@@ -334,8 +335,6 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
sysbus_init_mmio(sbd, &s->cpu_container);
sysbus_init_mmio(sbd, &s->dist_container);
-
- return 0;
}
static Property exynos4210_gic_properties[] = {
@@ -346,9 +345,7 @@ static Property exynos4210_gic_properties[] = {
static void exynos4210_gic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = exynos4210_gic_init;
dc->props = exynos4210_gic_properties;
}
@@ -356,6 +353,7 @@ static const TypeInfo exynos4210_gic_info = {
.name = TYPE_EXYNOS4210_GIC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210GicState),
+ .instance_init = exynos4210_gic_init,
.class_init = exynos4210_gic_class_init,
};
@@ -430,9 +428,16 @@ static void exynos4210_irq_gate_reset(DeviceState *d)
/*
* IRQ Gate initialization.
*/
-static int exynos4210_irq_gate_init(SysBusDevice *sbd)
+static void exynos4210_irq_gate_init(Object *obj)
+{
+ Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ sysbus_init_irq(sbd, &s->out);
+}
+
+static void exynos4210_irq_gate_realize(DeviceState *dev, Error **errp)
{
- DeviceState *dev = DEVICE(sbd);
Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(dev);
/* Allocate general purpose input signals and connect a handler to each of
@@ -440,27 +445,23 @@ static int exynos4210_irq_gate_init(SysBusDevice *sbd)
qdev_init_gpio_in(dev, exynos4210_irq_gate_handler, s->n_in);
s->level = g_malloc0(s->n_in * sizeof(*s->level));
-
- sysbus_init_irq(sbd, &s->out);
-
- return 0;
}
static void exynos4210_irq_gate_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = exynos4210_irq_gate_init;
dc->reset = exynos4210_irq_gate_reset;
dc->vmsd = &vmstate_exynos4210_irq_gate;
dc->props = exynos4210_irq_gate_properties;
+ dc->realize = exynos4210_irq_gate_realize;
}
static const TypeInfo exynos4210_irq_gate_info = {
.name = TYPE_EXYNOS4210_IRQ_GATE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210IRQGateState),
+ .instance_init = exynos4210_irq_gate_init,
.class_init = exynos4210_irq_gate_class_init,
};
--
1.9.1
next prev parent reply other threads:[~2016-05-12 13:33 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-12 13:32 [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 01/43] blizzard: Remove support for DEPTH != 32 Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 02/43] omap_lcdc: " Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 03/43] hw/intc: QOM'ify etraxfs_pic.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 04/43] hw/intc: QOM'ify exynos4210_combiner.c Peter Maydell
2016-05-12 13:32 ` Peter Maydell [this message]
2016-05-12 13:32 ` [Qemu-devel] [PULL 06/43] hw/intc: QOM'ify imx_avic.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 07/43] hw/intc: QOM'ify pl190.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 08/43] hw/intc: QOM'ify slavio_intctl.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 09/43] hw/intc: QOM'ify grlib_irqmp.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 10/43] hw/intc: QOM'ify omap_intc.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 11/43] bcm2835_property: use cached values when querying framebuffer Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 12/43] hw/arm/nseries: Allocating Large sized arrays to heap Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 13/43] target-arm: Stage 2 permission fault was fixed in AArch32 state Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 14/43] target-arm: Fix descriptor address masking in ARM address translation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 15/43] tcg: Add tcg_set_insn_param Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 16/43] gen-icount: Use tcg_set_insn_param Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 17/43] target-arm: Split data abort syndrome generator Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 18/43] target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9 Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 19/43] target-arm/translate-a64.c: Unify some of the ldst_reg decoding Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 20/43] hw/display: QOM'ify exynos4210_fimd.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 21/43] ARM: Virt: Set numa-node-id for cpu and memory nodes Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 22/43] ACPI: Add GICC Affinity Structure Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 23/43] ACPI: Fix the definition of proximity in AcpiSratMemoryAffinity Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 24/43] ACPI: move acpi_build_srat_memory to common place Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 25/43] ACPI: Virt: Generate SRAT table Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 26/43] ARM: Factor out ARM on/off PSCI control functions Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 27/43] i.MX: Add i.MX6 System Reset Controller device Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 28/43] FIFO: Add a FIFO32 implementation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 29/43] i.MX: Add the Freescale SPI Controller Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 30/43] i.MX: Add i.MX6 SOC implementation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 31/43] i.MX: Add sabrelite i.MX6 emulation Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 32/43] hw/display/blizzard: Expand out macros Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 33/43] hw/display/blizzard: Remove blizzard_template.h Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 34/43] target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 35/43] hw/arm: QOM'ify armv7m.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 36/43] hw/arm: QOM'ify highbank.c Peter Maydell
2016-05-12 13:32 ` [Qemu-devel] [PULL 37/43] hw/arm: QOM'ify integratorcp.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 38/43] hw/arm: QOM'ify pxa2xx.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 39/43] hw/arm: QOM'ify pxa2xx_pic.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 40/43] hw/arm: QOM'ify spitz.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 41/43] hw/arm: QOM'ify stellaris.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 42/43] hw/arm: QOM'ify strongarm.c Peter Maydell
2016-05-12 13:33 ` [Qemu-devel] [PULL 43/43] hw/arm: QOM'ify versatilepb.c Peter Maydell
2016-05-12 15:33 ` [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell
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