From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b10kg-0000Yq-Aj for qemu-devel@nongnu.org; Thu, 12 May 2016 20:14:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b10kb-0002jP-EF for qemu-devel@nongnu.org; Thu, 12 May 2016 20:14:46 -0400 Received: from mail-qg0-x242.google.com ([2607:f8b0:400d:c04::242]:33284) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b10kb-0002jD-Av for qemu-devel@nongnu.org; Thu, 12 May 2016 20:14:41 -0400 Received: by mail-qg0-x242.google.com with SMTP id 90so6865545qgz.0 for ; Thu, 12 May 2016 17:14:41 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 12 May 2016 14:13:10 -1000 Message-Id: <1463098420-29113-10-git-send-email-rth@twiddle.net> In-Reply-To: <1463098420-29113-1-git-send-email-rth@twiddle.net> References: <1463098420-29113-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 09/39] tcg/aarch64: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Sergey Fedorov , Sergey Fedorov From: Sergey Fedorov Ensure direct jump patching in AArch64 is atomic by using atomic_read()/atomic_set() for code patching. Signed-off-by: Sergey Fedorov Signed-off-by: Sergey Fedorov Message-Id: <1461341333-19646-9-git-send-email-sergey.fedorov@linaro.org> Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index a8fb442..88183c8 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) *code_ptr = deposit32(*code_ptr, 0, 26, offset); } +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, + tcg_insn_unit *target) +{ + ptrdiff_t offset = target - code_ptr; + tcg_insn_unit insn; + tcg_debug_assert(offset == sextract64(offset, 0, 26)); + /* read instruction, mask away previous PC_REL26 parameter contents, + set the proper offset, then write back the instruction. */ + insn = atomic_read(code_ptr); + atomic_set(code_ptr, deposit32(insn, 0, 26, offset)); +} + static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) { ptrdiff_t offset = target - code_ptr; @@ -835,7 +847,7 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) tcg_insn_unit *code_ptr = (tcg_insn_unit *)jmp_addr; tcg_insn_unit *target = (tcg_insn_unit *)addr; - reloc_pc26(code_ptr, target); + reloc_pc26_atomic(code_ptr, target); flush_icache_range(jmp_addr, jmp_addr + 4); } -- 2.5.5