From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
alex.williamson@redhat.com, wexu@redhat.com,
davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v7 10/25] x86-iommu: q35: generalize find_add_as()
Date: Tue, 17 May 2016 15:15:38 +0800 [thread overview]
Message-ID: <1463469353-25642-11-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1463469353-25642-1-git-send-email-peterx@redhat.com>
Remove VT-d calls in common q35 codes. Instead, we provide a general
find_add_as() for x86-iommu type.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
hw/i386/intel_iommu.c | 7 +++++--
hw/pci-host/q35.c | 10 ++++------
include/hw/i386/intel_iommu.h | 5 -----
include/hw/i386/x86-iommu.h | 3 +++
4 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 0c7b24d..38cecae 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1971,8 +1971,10 @@ static Property vtd_properties[] = {
};
-VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
+static AddressSpace *vtd_find_add_as(X86IOMMUState *x86_iommu, PCIBus *bus,
+ int devfn)
{
+ IntelIOMMUState *s = (IntelIOMMUState *)x86_iommu;
uintptr_t key = (uintptr_t)bus;
VTDBus *vtd_bus = g_hash_table_lookup(s->vtd_as_by_busptr, &key);
VTDAddressSpace *vtd_dev_as;
@@ -2000,7 +2002,7 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
address_space_init(&vtd_dev_as->as,
&vtd_dev_as->iommu, "intel_iommu");
}
- return vtd_dev_as;
+ return &vtd_dev_as->as;
}
/* Do the initialization. It will also be called when reset, so pay
@@ -2128,6 +2130,7 @@ static void vtd_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vtd_vmstate;
dc->props = vtd_properties;
x86_class->realize = vtd_realize;
+ x86_class->find_add_as = vtd_find_add_as;
}
static const TypeInfo vtd_info = {
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 27ee0c8..6835da1 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -426,13 +426,11 @@ static void mch_reset(DeviceState *qdev)
static AddressSpace *q35_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
{
- IntelIOMMUState *s = opaque;
- VTDAddressSpace *vtd_as;
+ X86IOMMUState *x86_iommu = opaque;
+ X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(x86_iommu);
assert(0 <= devfn && devfn <= X86_IOMMU_PCI_DEVFN_MAX);
-
- vtd_as = vtd_find_add_as(s, bus, devfn);
- return &vtd_as->as;
+ return x86_class->find_add_as(x86_iommu, bus, devfn);
}
static void mch_init_dmar(MCHPCIState *mch)
@@ -440,7 +438,7 @@ static void mch_init_dmar(MCHPCIState *mch)
PCIBus *pci_bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
mch->iommu = INTEL_IOMMU_DEVICE(qdev_create(NULL, TYPE_INTEL_IOMMU_DEVICE));
- object_property_add_child(OBJECT(mch), "intel-iommu",
+ object_property_add_child(OBJECT(mch), TYPE_X86_IOMMU_DEVICE,
OBJECT(mch->iommu), NULL);
qdev_init_nofail(DEVICE(mch->iommu));
sysbus_mmio_map(SYS_BUS_DEVICE(mch->iommu), 0, Q35_HOST_BRIDGE_IOMMU_ADDR);
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 04265ca..ee7620c 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -192,9 +192,4 @@ struct IntelIOMMUState {
uint32_t intr_size; /* Number of IR table entries */
};
-/* Find the VTD Address space associated with the given bus pointer,
- * create a new one if none exists
- */
-VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn);
-
#endif
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index d6991cb..2070cd1 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -21,6 +21,7 @@
#define IOMMU_COMMON_H
#include "hw/sysbus.h"
+#include "exec/memory.h"
#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
#define X86_IOMMU_DEVICE(obj) \
@@ -40,6 +41,8 @@ struct X86IOMMUClass {
SysBusDeviceClass parent;
/* Intel/AMD specific realize() hook */
DeviceRealize realize;
+ /* Find/Add IOMMU address space for specific PCI device */
+ AddressSpace *(*find_add_as)(X86IOMMUState *s, PCIBus *bus, int devfn);
};
struct X86IOMMUState {
--
2.4.11
next prev parent reply other threads:[~2016-05-17 7:16 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-17 7:15 [Qemu-devel] [PATCH v7 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 01/25] acpi: enable INTR for DMAR report structure Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 02/25] intel_iommu: allow queued invalidation for IR Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 03/25] intel_iommu: set IR bit for ECAP register Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 04/25] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 05/25] intel_iommu: define interrupt remap table addr register Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 06/25] intel_iommu: handle interrupt remap enable Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 07/25] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-05-29 8:20 ` David Kiarie
2016-05-29 8:21 ` David Kiarie
2016-05-30 5:45 ` Peter Xu
2016-05-30 5:56 ` Jan Kiszka
2016-05-30 8:14 ` Peter Xu
2016-05-30 8:54 ` David Kiarie
2016-05-30 9:16 ` Peter Xu
2016-05-30 9:25 ` David Kiarie
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 08/25] x86-iommu: introduce parent class Peter Xu
2016-05-23 17:06 ` David Kiarie
2016-05-23 21:48 ` Marcel Apfelbaum
2016-05-24 10:40 ` Jan Kiszka
2016-05-24 11:02 ` David Kiarie
2016-05-24 11:29 ` David Kiarie
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 09/25] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-05-17 7:15 ` Peter Xu [this message]
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 11/25] intel_iommu: add IR translation faults defines Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 12/25] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 13/25] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 14/25] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 15/25] intel_iommu: add support for split irqchip Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 16/25] q35: add "intremap" parameter to enable IR Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 17/25] x86-iommu: introduce IEC notifiers Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 18/25] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 19/25] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 20/25] intel_iommu: add SID validation for IR Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 21/25] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 22/25] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 23/25] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 24/25] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-05-17 7:15 ` [Qemu-devel] [PATCH v7 25/25] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-05-17 7:22 ` [Qemu-devel] [PATCH v7 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
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