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From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	jasowang@redhat.com, marcel@redhat.com, mst@redhat.com,
	pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com, peterx@redhat.com
Subject: [Qemu-devel] [PATCH v7 06/25] intel_iommu: handle interrupt remap enable
Date: Tue, 17 May 2016 15:15:34 +0800	[thread overview]
Message-ID: <1463469353-25642-7-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1463469353-25642-1-git-send-email-peterx@redhat.com>

Handle writting to IRE bit in global command register.

Signed-off-by: Peter Xu <peterx@redhat.com>
---
 hw/i386/intel_iommu.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 00b873c..4d14124 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1180,6 +1180,22 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool en)
     }
 }
 
+/* Handle Interrupt Remap Enable/Disable */
+static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en)
+{
+    VTD_DPRINTF(CSR, "Interrupt Remap Enable %s", (en ? "on" : "off"));
+
+    if (en) {
+        s->intr_enabled = true;
+        /* Ok - report back to driver */
+        vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES);
+    } else {
+        s->intr_enabled = false;
+        /* Ok - report back to driver */
+        vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0);
+    }
+}
+
 /* Handle write to Global Command Register */
 static void vtd_handle_gcmd_write(IntelIOMMUState *s)
 {
@@ -1204,6 +1220,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s)
         /* Set/update the interrupt remapping root-table pointer */
         vtd_handle_gcmd_sirtp(s);
     }
+    if (changed & VTD_GCMD_IRE) {
+        /* Interrupt remap enable/disable */
+        vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE);
+    }
 }
 
 /* Handle write to Context Command Register */
-- 
2.4.11

  parent reply	other threads:[~2016-05-17  7:16 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-17  7:15 [Qemu-devel] [PATCH v7 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 01/25] acpi: enable INTR for DMAR report structure Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 02/25] intel_iommu: allow queued invalidation for IR Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 03/25] intel_iommu: set IR bit for ECAP register Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 04/25] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 05/25] intel_iommu: define interrupt remap table addr register Peter Xu
2016-05-17  7:15 ` Peter Xu [this message]
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 07/25] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-05-29  8:20   ` David Kiarie
2016-05-29  8:21     ` David Kiarie
2016-05-30  5:45       ` Peter Xu
2016-05-30  5:56         ` Jan Kiszka
2016-05-30  8:14           ` Peter Xu
2016-05-30  8:54             ` David Kiarie
2016-05-30  9:16               ` Peter Xu
2016-05-30  9:25                 ` David Kiarie
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 08/25] x86-iommu: introduce parent class Peter Xu
2016-05-23 17:06   ` David Kiarie
2016-05-23 21:48     ` Marcel Apfelbaum
2016-05-24 10:40       ` Jan Kiszka
2016-05-24 11:02         ` David Kiarie
2016-05-24 11:29           ` David Kiarie
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 09/25] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 10/25] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 11/25] intel_iommu: add IR translation faults defines Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 12/25] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 13/25] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 14/25] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 15/25] intel_iommu: add support for split irqchip Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 16/25] q35: add "intremap" parameter to enable IR Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 17/25] x86-iommu: introduce IEC notifiers Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 18/25] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 19/25] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 20/25] intel_iommu: add SID validation for IR Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 21/25] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 22/25] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 23/25] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 24/25] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-05-17  7:15 ` [Qemu-devel] [PATCH v7 25/25] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-05-17  7:22 ` [Qemu-devel] [PATCH v7 00/25] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu

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