* [Qemu-devel] [PATCH 01/52] scripts: add script to build QEMU and analyze inclusions
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 02/52] s390x: move vregs_needed to machine.c Paolo Bonzini
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
scripts/analyze-inclusions | 102 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
create mode 100644 scripts/analyze-inclusions
diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions
new file mode 100644
index 0000000..c64c023
--- /dev/null
+++ b/scripts/analyze-inclusions
@@ -0,0 +1,102 @@
+#! /bin/sh
+#
+# Copyright (C) 2016 Red Hat, Inc.
+#
+# Author: Paolo Bonzini <pbonzini@redhat.com>
+#
+# Print statistics about header file inclusions.
+#
+# The script has two modes of execution:
+#
+# 1) if invoked with a path on the command line (possibly
+# preceded by a "--" argument), it will run the analysis on
+# an existing build directory
+#
+# 2) otherwise, it will configure and builds QEMU itself in a
+# "+build" subdirectory which is left around when the script
+# exits. In this case the command line is passed directly to
+# "make" (typically used for a "-j" argument suitable for your
+# system).
+#
+# Inspired by a post by Markus Armbruster.
+
+case "x$1" in
+x--)
+ shift
+ cd "$1" || exit $?
+ ;;
+x-* | x)
+ mkdir -p +build
+ cd +build
+ test -f Makefile && make distclean
+ ../configure
+ make "$@"
+ ;;
+*)
+ cd "$1" || exit $?
+esac
+
+QEMU_CFLAGS=$(sed -n s/^QEMU_CFLAGS=//p config-host.mak)
+QEMU_INCLUDES=$(sed -n s/^QEMU_INCLUDES=//p config-host.mak | \
+ sed 's/$(SRC_PATH)/../g' )
+CFLAGS=$(sed -n s/^CFLAGS=//p config-host.mak)
+
+grep_include() {
+ find . -name "*.d" -exec grep -l "$@" {} + | wc -l
+}
+
+echo Found $(find . -name "*.d" | wc -l) object files
+echo $(grep_include -F 'include/qemu-common.h') files include qemu-common.h
+echo $(grep_include -F 'hw/hw.h') files include hw/hw.h
+echo $(grep_include 'target-[a-z0-9]*/cpu\.h') files include cpu.h
+echo $(grep_include -F 'qapi-types.h') files include qapi-types.h
+echo $(grep_include -F 'trace/generated-tracers.h') files include generated-tracers.h
+echo $(grep_include -F 'qapi/error.h') files include qapi/error.h
+echo $(grep_include -F 'qom/object.h') files include qom/object.h
+echo $(grep_include -F 'block/aio.h') files include block/aio.h
+echo $(grep_include -F 'exec/memory.h') files include exec/memory.h
+echo $(grep_include -F 'fpu/softfloat.h') files include fpu/softfloat.h
+echo $(grep_include -F 'qemu/bswap.h') files include qemu/bswap.h
+echo
+
+awk1='
+ /^# / { file = $3;next }
+ NR>1 { bytes[file]+=length()+1; lines[file]++ }
+ END { for(i in lines) print i,lines[i],bytes[i] }'
+
+awk2='
+ {tot_l+=$2;tot_b+=$3;tot_f++}
+ /\/usr.*\/glib/ {glib_l+=$2;glib_b+=$3;glib_f++;next}
+ /\/usr/ {sys_l+=$2;sys_b+=$3;sys_f++;next}
+ {qemu_l+=$2;qemu_b+=$3;qemu_f++;next}
+ END {
+ printf "%s\t %s\t %s\t %s\n", "lines", "bytes", "files", "source"
+ printf "%s\t %s\t %s\t %s\n", qemu_l, qemu_b, qemu_f, "QEMU"
+ printf "%s\t %s\t %s\t %s\n", sys_l, sys_b, sys_f, "system"
+ printf "%s\t %s\t %s\t %s\n", glib_l, glib_b, glib_f, "glib"
+ printf "%s\t %s\t %s\t %s\n", tot_l, tot_b, tot_f, "total"
+ }'
+
+analyze() {
+ cc $QEMU_CFLAGS $QEMU_INCLUDES $CFLAGS -E -o - "$@" | \
+ awk "$awk1" | awk "$awk2"
+ echo
+}
+
+echo osdep.h:
+analyze ../include/qemu/osdep.h
+
+echo qemu-common.h:
+analyze -include ../include/qemu/osdep.h ../include/qemu-common.h
+
+echo hw/hw.h:
+analyze -include ../include/qemu/osdep.h ../include/hw/hw.h
+
+echo trace/generated-tracers.h:
+analyze -include ../include/qemu/osdep.h trace/generated-tracers.h
+
+echo target-i386/cpu.h:
+analyze -DNEED_CPU_H -I../target-i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target-i386/cpu.h
+
+echo hw/hw.h + NEED_CPU_H:
+analyze -DNEED_CPU_H -I../target-i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PATCH 02/52] s390x: move vregs_needed to machine.c
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 01/52] scripts: add script to build QEMU and analyze inclusions Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-18 16:52 ` Cornelia Huck
2016-05-18 16:36 ` [Qemu-devel] [PATCH 14/52] target-ppc: do not use target_ulong in cpu-qom.h Paolo Bonzini
` (6 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
It is only needed in one file, move it there.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-s390x/cpu.h | 15 ---------------
target-s390x/machine.c | 10 ++++++++++
2 files changed, 10 insertions(+), 15 deletions(-)
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 6d97c08..62c24d1 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -1264,21 +1264,6 @@ static inline void s390_crypto_reset(void)
}
}
-#ifdef CONFIG_KVM
-static inline bool vregs_needed(void *opaque)
-{
- if (kvm_enabled()) {
- return kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS);
- }
- return 0;
-}
-#else
-static inline bool vregs_needed(void *opaque)
-{
- return 0;
-}
-#endif
-
/* machine check interruption code */
/* subclasses */
diff --git a/target-s390x/machine.c b/target-s390x/machine.c
index 6b26090..d2b52b2 100644
--- a/target-s390x/machine.c
+++ b/target-s390x/machine.c
@@ -76,6 +76,16 @@ static const VMStateDescription vmstate_fpu = {
}
};
+static bool vregs_needed(void *opaque)
+{
+#ifdef CONFIG_KVM
+ if (kvm_enabled()) {
+ return kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS);
+ }
+#endif
+ return 0;
+}
+
static const VMStateDescription vmstate_vregs = {
.name = "cpu/vregs",
.version_id = 1,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PATCH 14/52] target-ppc: do not use target_ulong in cpu-qom.h
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 01/52] scripts: add script to build QEMU and analyze inclusions Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 02/52] s390x: move vregs_needed to machine.c Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 15/52] target-ppc: do not make PowerPCCPUClass depend on target-specific symbols Paolo Bonzini
` (5 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Bring the PowerPCCPUClass handle_mmu_fault method type into line with
the one in CPUClass.
Using vaddr also makes the cpu-qom.h file target independent.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-ppc/cpu-qom.h | 3 +--
target-ppc/mmu-hash32.c | 2 +-
target-ppc/mmu-hash32.h | 2 +-
target-ppc/mmu-hash64.c | 2 +-
target-ppc/mmu-hash64.h | 2 +-
5 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index eb822a3..bab501f 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -73,8 +73,7 @@ typedef struct PowerPCCPUClass {
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
#if defined(CONFIG_SOFTMMU)
- int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
- int mmu_idx);
+ int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
#endif
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index 39abb2f..06ce4d6 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -383,7 +383,7 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index afbb9dd..aaceacd 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 72c4ab5..5184626 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -589,7 +589,7 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
return 0;
}
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
int rwx, int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 9bf8b9b..6423b9f 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -9,7 +9,7 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu);
int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
target_ulong esid, target_ulong vsid);
hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(PowerPCCPU *cpu, target_ulong index,
target_ulong pte0, target_ulong pte1);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PATCH 15/52] target-ppc: do not make PowerPCCPUClass depend on target-specific symbols
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (2 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 14/52] target-ppc: do not use target_ulong in cpu-qom.h Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-19 3:49 ` Thomas Huth
2016-05-18 16:36 ` [Qemu-devel] [PATCH 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
` (4 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Just leave some members in even if they are unused on e.g.
32-bit PPC or user-mode emulation. This avoids complications
when using PowerPCCPUClass in code that is compiled just
once (because it applies to both 32-bit and 64-bit PPC
for example) but still needs to peek at PPC-specific members.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-ppc/cpu-qom.h | 4 ----
1 file changed, 4 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index bab501f..6f4e929 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -67,14 +67,10 @@ typedef struct PowerPCCPUClass {
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
-#if defined(TARGET_PPC64)
const struct ppc_segment_page_sizes *sps;
-#endif
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
-#if defined(CONFIG_SOFTMMU)
int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
-#endif
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Qemu-devel] [PATCH 15/52] target-ppc: do not make PowerPCCPUClass depend on target-specific symbols
2016-05-18 16:36 ` [Qemu-devel] [PATCH 15/52] target-ppc: do not make PowerPCCPUClass depend on target-specific symbols Paolo Bonzini
@ 2016-05-19 3:49 ` Thomas Huth
0 siblings, 0 replies; 14+ messages in thread
From: Thomas Huth @ 2016-05-19 3:49 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel
On 18.05.2016 18:36, Paolo Bonzini wrote:
> Just leave some members in even if they are unused on e.g.
> 32-bit PPC or user-mode emulation. This avoids complications
> when using PowerPCCPUClass in code that is compiled just
> once (because it applies to both 32-bit and 64-bit PPC
> for example) but still needs to peek at PPC-specific members.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> target-ppc/cpu-qom.h | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> index bab501f..6f4e929 100644
> --- a/target-ppc/cpu-qom.h
> +++ b/target-ppc/cpu-qom.h
> @@ -67,14 +67,10 @@ typedef struct PowerPCCPUClass {
> uint32_t flags;
> int bfd_mach;
> uint32_t l1_dcache_size, l1_icache_size;
> -#if defined(TARGET_PPC64)
> const struct ppc_segment_page_sizes *sps;
> -#endif
> void (*init_proc)(CPUPPCState *env);
> int (*check_pow)(CPUPPCState *env);
> -#if defined(CONFIG_SOFTMMU)
> int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
> -#endif
> bool (*interrupts_big_endian)(PowerPCCPU *cpu);
> } PowerPCCPUClass;
>
>
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Qemu-devel] [PATCH 16/52] target-ppc: make cpu-qom.h not target specific
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (3 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 15/52] target-ppc: do not make PowerPCCPUClass depend on target-specific symbols Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-19 3:53 ` Thomas Huth
2016-05-18 16:36 ` [Qemu-devel] [PATCH 22/52] target-xtensa: " Paolo Bonzini
` (3 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Make PowerPCCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. Conversely, move all definitions needed to define
a class to cpu-qom.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-ppc/cpu-qom.h | 161 ++++++++++++++++++++++++++++++++++----------------
target-ppc/cpu.h | 164 ++++++++++++++++-----------------------------------
2 files changed, 163 insertions(+), 162 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 6f4e929..9429bc9 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -38,6 +38,117 @@
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
typedef struct PowerPCCPU PowerPCCPU;
+typedef struct CPUPPCState CPUPPCState;
+typedef struct ppc_tb_t ppc_tb_t;
+typedef struct ppc_dcr_t ppc_dcr_t;
+
+/*****************************************************************************/
+/* MMU model */
+typedef enum powerpc_mmu_t powerpc_mmu_t;
+enum powerpc_mmu_t {
+ POWERPC_MMU_UNKNOWN = 0x00000000,
+ /* Standard 32 bits PowerPC MMU */
+ POWERPC_MMU_32B = 0x00000001,
+ /* PowerPC 6xx MMU with software TLB */
+ POWERPC_MMU_SOFT_6xx = 0x00000002,
+ /* PowerPC 74xx MMU with software TLB */
+ POWERPC_MMU_SOFT_74xx = 0x00000003,
+ /* PowerPC 4xx MMU with software TLB */
+ POWERPC_MMU_SOFT_4xx = 0x00000004,
+ /* PowerPC 4xx MMU with software TLB and zones protections */
+ POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
+ /* PowerPC MMU in real mode only */
+ POWERPC_MMU_REAL = 0x00000006,
+ /* Freescale MPC8xx MMU model */
+ POWERPC_MMU_MPC8xx = 0x00000007,
+ /* BookE MMU model */
+ POWERPC_MMU_BOOKE = 0x00000008,
+ /* BookE 2.06 MMU model */
+ POWERPC_MMU_BOOKE206 = 0x00000009,
+ /* PowerPC 601 MMU model (specific BATs format) */
+ POWERPC_MMU_601 = 0x0000000A,
+#if defined(TARGET_PPC64)
+#define POWERPC_MMU_64 0x00010000
+#define POWERPC_MMU_1TSEG 0x00020000
+#define POWERPC_MMU_AMR 0x00040000
+ /* 64 bits PowerPC MMU */
+ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
+ /* Architecture 2.03 and later (has LPCR) */
+ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
+ /* Architecture 2.06 variant */
+ POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000003,
+ /* Architecture 2.06 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000003,
+ /* Architecture 2.07 variant */
+ POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000004,
+ /* Architecture 2.07 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000004,
+#endif /* defined(TARGET_PPC64) */
+};
+
+/*****************************************************************************/
+/* Exception model */
+typedef enum powerpc_excp_t powerpc_excp_t;
+enum powerpc_excp_t {
+ POWERPC_EXCP_UNKNOWN = 0,
+ /* Standard PowerPC exception model */
+ POWERPC_EXCP_STD,
+ /* PowerPC 40x exception model */
+ POWERPC_EXCP_40x,
+ /* PowerPC 601 exception model */
+ POWERPC_EXCP_601,
+ /* PowerPC 602 exception model */
+ POWERPC_EXCP_602,
+ /* PowerPC 603 exception model */
+ POWERPC_EXCP_603,
+ /* PowerPC 603e exception model */
+ POWERPC_EXCP_603E,
+ /* PowerPC G2 exception model */
+ POWERPC_EXCP_G2,
+ /* PowerPC 604 exception model */
+ POWERPC_EXCP_604,
+ /* PowerPC 7x0 exception model */
+ POWERPC_EXCP_7x0,
+ /* PowerPC 7x5 exception model */
+ POWERPC_EXCP_7x5,
+ /* PowerPC 74xx exception model */
+ POWERPC_EXCP_74xx,
+ /* BookE exception model */
+ POWERPC_EXCP_BOOKE,
+ /* PowerPC 970 exception model */
+ POWERPC_EXCP_970,
+ /* POWER7 exception model */
+ POWERPC_EXCP_POWER7,
+ /* POWER8 exception model */
+ POWERPC_EXCP_POWER8,
+};
+
+/*****************************************************************************/
+/* Input pins model */
+typedef enum powerpc_input_t powerpc_input_t;
+enum powerpc_input_t {
+ PPC_FLAGS_INPUT_UNKNOWN = 0,
+ /* PowerPC 6xx bus */
+ PPC_FLAGS_INPUT_6xx,
+ /* BookE bus */
+ PPC_FLAGS_INPUT_BookE,
+ /* PowerPC 405 bus */
+ PPC_FLAGS_INPUT_405,
+ /* PowerPC 970 bus */
+ PPC_FLAGS_INPUT_970,
+ /* PowerPC POWER7 bus */
+ PPC_FLAGS_INPUT_POWER7,
+ /* PowerPC 401 bus */
+ PPC_FLAGS_INPUT_401,
+ /* Freescale RCPU bus */
+ PPC_FLAGS_INPUT_RCPU,
+};
+
+struct ppc_segment_page_sizes;
/**
* PowerPCCPUClass:
@@ -74,57 +185,7 @@ typedef struct PowerPCCPUClass {
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
-/**
- * PowerPCCPU:
- * @env: #CPUPPCState
- * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
- * @max_compat: Maximal supported logical PVR from the command line
- * @cpu_version: Current logical PVR, zero if in "raw" mode
- *
- * A PowerPC CPU.
- */
-struct PowerPCCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUPPCState env;
- int cpu_dt_id;
- uint32_t max_compat;
- uint32_t cpu_version;
-};
-
-static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
-{
- return container_of(env, PowerPCCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(PowerPCCPU, env)
-
-PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
-PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
-
-void ppc_cpu_do_interrupt(CPUState *cpu);
-bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
- uint64_t *pval);
-hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
-void ppc_cpu_do_system_reset(CPUState *cs);
-extern const struct VMStateDescription vmstate_ppc_cpu;
-
typedef struct PPCTimebase {
uint64_t guest_timebase;
int64_t time_of_the_day_ns;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5282533..15540b2 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -76,7 +76,7 @@
#define CPUArchState struct CPUPPCState
#include "exec/cpu-defs.h"
-
+#include "cpu-qom.h"
#include "fpu/softfloat.h"
#if defined (TARGET_PPC64)
@@ -86,93 +86,6 @@
#endif
/*****************************************************************************/
-/* MMU model */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
-enum powerpc_mmu_t {
- POWERPC_MMU_UNKNOWN = 0x00000000,
- /* Standard 32 bits PowerPC MMU */
- POWERPC_MMU_32B = 0x00000001,
- /* PowerPC 6xx MMU with software TLB */
- POWERPC_MMU_SOFT_6xx = 0x00000002,
- /* PowerPC 74xx MMU with software TLB */
- POWERPC_MMU_SOFT_74xx = 0x00000003,
- /* PowerPC 4xx MMU with software TLB */
- POWERPC_MMU_SOFT_4xx = 0x00000004,
- /* PowerPC 4xx MMU with software TLB and zones protections */
- POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
- /* PowerPC MMU in real mode only */
- POWERPC_MMU_REAL = 0x00000006,
- /* Freescale MPC8xx MMU model */
- POWERPC_MMU_MPC8xx = 0x00000007,
- /* BookE MMU model */
- POWERPC_MMU_BOOKE = 0x00000008,
- /* BookE 2.06 MMU model */
- POWERPC_MMU_BOOKE206 = 0x00000009,
- /* PowerPC 601 MMU model (specific BATs format) */
- POWERPC_MMU_601 = 0x0000000A,
-#if defined(TARGET_PPC64)
-#define POWERPC_MMU_64 0x00010000
-#define POWERPC_MMU_1TSEG 0x00020000
-#define POWERPC_MMU_AMR 0x00040000
- /* 64 bits PowerPC MMU */
- POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
- /* Architecture 2.03 and later (has LPCR) */
- POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
- /* Architecture 2.06 variant */
- POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000003,
- /* Architecture 2.06 "degraded" (no 1T segments) */
- POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000003,
- /* Architecture 2.07 variant */
- POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000004,
- /* Architecture 2.07 "degraded" (no 1T segments) */
- POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000004,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
-/* Exception model */
-typedef enum powerpc_excp_t powerpc_excp_t;
-enum powerpc_excp_t {
- POWERPC_EXCP_UNKNOWN = 0,
- /* Standard PowerPC exception model */
- POWERPC_EXCP_STD,
- /* PowerPC 40x exception model */
- POWERPC_EXCP_40x,
- /* PowerPC 601 exception model */
- POWERPC_EXCP_601,
- /* PowerPC 602 exception model */
- POWERPC_EXCP_602,
- /* PowerPC 603 exception model */
- POWERPC_EXCP_603,
- /* PowerPC 603e exception model */
- POWERPC_EXCP_603E,
- /* PowerPC G2 exception model */
- POWERPC_EXCP_G2,
- /* PowerPC 604 exception model */
- POWERPC_EXCP_604,
- /* PowerPC 7x0 exception model */
- POWERPC_EXCP_7x0,
- /* PowerPC 7x5 exception model */
- POWERPC_EXCP_7x5,
- /* PowerPC 74xx exception model */
- POWERPC_EXCP_74xx,
- /* BookE exception model */
- POWERPC_EXCP_BOOKE,
-#if defined(TARGET_PPC64)
- /* PowerPC 970 exception model */
- POWERPC_EXCP_970,
- /* POWER7 exception model */
- POWERPC_EXCP_POWER7,
- /* POWER8 exception model */
- POWERPC_EXCP_POWER8,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
/* Exception vectors definitions */
enum {
POWERPC_EXCP_NONE = -1,
@@ -297,27 +210,6 @@ enum {
POWERPC_EXCP_TRAP = 0x40,
};
-/*****************************************************************************/
-/* Input pins model */
-typedef enum powerpc_input_t powerpc_input_t;
-enum powerpc_input_t {
- PPC_FLAGS_INPUT_UNKNOWN = 0,
- /* PowerPC 6xx bus */
- PPC_FLAGS_INPUT_6xx,
- /* BookE bus */
- PPC_FLAGS_INPUT_BookE,
- /* PowerPC 405 bus */
- PPC_FLAGS_INPUT_405,
- /* PowerPC 970 bus */
- PPC_FLAGS_INPUT_970,
- /* PowerPC POWER7 bus */
- PPC_FLAGS_INPUT_POWER7,
- /* PowerPC 401 bus */
- PPC_FLAGS_INPUT_401,
- /* Freescale RCPU bus */
- PPC_FLAGS_INPUT_RCPU,
-};
-
#define PPC_INPUT(env) (env->bus_model)
/*****************************************************************************/
@@ -327,9 +219,7 @@ typedef struct opc_handler_t opc_handler_t;
/* Types used to describe some PowerPC registers */
typedef struct CPUPPCState CPUPPCState;
typedef struct DisasContext DisasContext;
-typedef struct ppc_tb_t ppc_tb_t;
typedef struct ppc_spr_t ppc_spr_t;
-typedef struct ppc_dcr_t ppc_dcr_t;
typedef union ppc_avr_t ppc_avr_t;
typedef union ppc_tlb_t ppc_tlb_t;
@@ -1215,7 +1105,57 @@ do { \
env->wdt_period[3] = (d_); \
} while (0)
-#include "cpu-qom.h"
+/**
+ * PowerPCCPU:
+ * @env: #CPUPPCState
+ * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
+ * @max_compat: Maximal supported logical PVR from the command line
+ * @cpu_version: Current logical PVR, zero if in "raw" mode
+ *
+ * A PowerPC CPU.
+ */
+struct PowerPCCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUPPCState env;
+ int cpu_dt_id;
+ uint32_t max_compat;
+ uint32_t cpu_version;
+};
+
+static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
+{
+ return container_of(env, PowerPCCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(PowerPCCPU, env)
+
+PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
+PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
+
+void ppc_cpu_do_interrupt(CPUState *cpu);
+bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
+ uint64_t *pval);
+hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+#ifndef CONFIG_USER_ONLY
+void ppc_cpu_do_system_reset(CPUState *cs);
+extern const struct VMStateDescription vmstate_ppc_cpu;
+#endif
/*****************************************************************************/
PowerPCCPU *cpu_ppc_init(const char *cpu_model);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Qemu-devel] [PATCH 16/52] target-ppc: make cpu-qom.h not target specific
2016-05-18 16:36 ` [Qemu-devel] [PATCH 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
@ 2016-05-19 3:53 ` Thomas Huth
0 siblings, 0 replies; 14+ messages in thread
From: Thomas Huth @ 2016-05-19 3:53 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel
On 18.05.2016 18:36, Paolo Bonzini wrote:
> Make PowerPCCPU an opaque type within cpu-qom.h, and move all definitions
> of private methods, as well as all type definitions that require knowledge
> of the layout to cpu.h. Conversely, move all definitions needed to define
> a class to cpu-qom.h. This helps making files independent of NEED_CPU_H
> if they only need to pass around CPU pointers.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> target-ppc/cpu-qom.h | 161 ++++++++++++++++++++++++++++++++++----------------
> target-ppc/cpu.h | 164 ++++++++++++++++-----------------------------------
> 2 files changed, 163 insertions(+), 162 deletions(-)
>
> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> index 6f4e929..9429bc9 100644
> --- a/target-ppc/cpu-qom.h
> +++ b/target-ppc/cpu-qom.h
> @@ -38,6 +38,117 @@
> OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
>
> typedef struct PowerPCCPU PowerPCCPU;
> +typedef struct CPUPPCState CPUPPCState;
> +typedef struct ppc_tb_t ppc_tb_t;
> +typedef struct ppc_dcr_t ppc_dcr_t;
> +
> +/*****************************************************************************/
> +/* MMU model */
> +typedef enum powerpc_mmu_t powerpc_mmu_t;
> +enum powerpc_mmu_t {
> + POWERPC_MMU_UNKNOWN = 0x00000000,
> + /* Standard 32 bits PowerPC MMU */
> + POWERPC_MMU_32B = 0x00000001,
> + /* PowerPC 6xx MMU with software TLB */
> + POWERPC_MMU_SOFT_6xx = 0x00000002,
> + /* PowerPC 74xx MMU with software TLB */
> + POWERPC_MMU_SOFT_74xx = 0x00000003,
> + /* PowerPC 4xx MMU with software TLB */
> + POWERPC_MMU_SOFT_4xx = 0x00000004,
> + /* PowerPC 4xx MMU with software TLB and zones protections */
> + POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
> + /* PowerPC MMU in real mode only */
> + POWERPC_MMU_REAL = 0x00000006,
> + /* Freescale MPC8xx MMU model */
> + POWERPC_MMU_MPC8xx = 0x00000007,
> + /* BookE MMU model */
> + POWERPC_MMU_BOOKE = 0x00000008,
> + /* BookE 2.06 MMU model */
> + POWERPC_MMU_BOOKE206 = 0x00000009,
> + /* PowerPC 601 MMU model (specific BATs format) */
> + POWERPC_MMU_601 = 0x0000000A,
> +#if defined(TARGET_PPC64)
> +#define POWERPC_MMU_64 0x00010000
> +#define POWERPC_MMU_1TSEG 0x00020000
> +#define POWERPC_MMU_AMR 0x00040000
> + /* 64 bits PowerPC MMU */
> + POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
> + /* Architecture 2.03 and later (has LPCR) */
> + POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
> + /* Architecture 2.06 variant */
> + POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
> + | POWERPC_MMU_AMR | 0x00000003,
> + /* Architecture 2.06 "degraded" (no 1T segments) */
> + POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
> + | 0x00000003,
> + /* Architecture 2.07 variant */
> + POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
> + | POWERPC_MMU_AMR | 0x00000004,
> + /* Architecture 2.07 "degraded" (no 1T segments) */
> + POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
> + | 0x00000004,
> +#endif /* defined(TARGET_PPC64) */
> +};
> +
> +/*****************************************************************************/
> +/* Exception model */
> +typedef enum powerpc_excp_t powerpc_excp_t;
> +enum powerpc_excp_t {
> + POWERPC_EXCP_UNKNOWN = 0,
> + /* Standard PowerPC exception model */
> + POWERPC_EXCP_STD,
> + /* PowerPC 40x exception model */
> + POWERPC_EXCP_40x,
> + /* PowerPC 601 exception model */
> + POWERPC_EXCP_601,
> + /* PowerPC 602 exception model */
> + POWERPC_EXCP_602,
> + /* PowerPC 603 exception model */
> + POWERPC_EXCP_603,
> + /* PowerPC 603e exception model */
> + POWERPC_EXCP_603E,
> + /* PowerPC G2 exception model */
> + POWERPC_EXCP_G2,
> + /* PowerPC 604 exception model */
> + POWERPC_EXCP_604,
> + /* PowerPC 7x0 exception model */
> + POWERPC_EXCP_7x0,
> + /* PowerPC 7x5 exception model */
> + POWERPC_EXCP_7x5,
> + /* PowerPC 74xx exception model */
> + POWERPC_EXCP_74xx,
> + /* BookE exception model */
> + POWERPC_EXCP_BOOKE,
> + /* PowerPC 970 exception model */
> + POWERPC_EXCP_970,
> + /* POWER7 exception model */
> + POWERPC_EXCP_POWER7,
> + /* POWER8 exception model */
> + POWERPC_EXCP_POWER8,
> +};
Hmm, now you've removed the "#if defined(TARGET_PPC64)" from the enum
powerpc_excp_t, but you kept it in the enum powerpc_mmu_t ... in case
you respin, maybe remove it from powerpc_mmu_t, too?
Thomas
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Qemu-devel] [PATCH 22/52] target-xtensa: make cpu-qom.h not target specific
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (4 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 32/52] explicitly include linux/kvm.h Paolo Bonzini
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel; +Cc: Max Filippov
Make XtensaCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. Conversely, move all definitions needed to
define a class to cpu-qom.h. This helps making files independent of
NEED_CPU_H if they only need to pass around CPU pointers.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-xtensa/cpu-qom.h | 38 +++-----------------------------------
target-xtensa/cpu.h | 37 ++++++++++++++++++++++++++++++++++++-
2 files changed, 39 insertions(+), 36 deletions(-)
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h
index f5d9b9f..403bd95 100644
--- a/target-xtensa/cpu-qom.h
+++ b/target-xtensa/cpu-qom.h
@@ -40,6 +40,8 @@
#define XTENSA_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU)
+typedef struct XtensaConfig XtensaConfig;
+
/**
* XtensaCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -59,40 +61,6 @@ typedef struct XtensaCPUClass {
const XtensaConfig *config;
} XtensaCPUClass;
-/**
- * XtensaCPU:
- * @env: #CPUXtensaState
- *
- * An Xtensa CPU.
- */
-typedef struct XtensaCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUXtensaState env;
-} XtensaCPU;
-
-static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
-{
- return container_of(env, XtensaCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(XtensaCPU, env)
-
-void xtensa_cpu_do_interrupt(CPUState *cpu);
-bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
-void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
- bool is_write, bool is_exec, int opaque,
- unsigned size);
-void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+typedef struct XtensaCPU XtensaCPU;
#endif
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index d0bd9da..f6bbe29 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -34,6 +34,7 @@
#define CPUArchState struct CPUXtensaState
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -379,7 +380,41 @@ typedef struct CPUXtensaState {
CPU_COMMON
} CPUXtensaState;
-#include "cpu-qom.h"
+/**
+ * XtensaCPU:
+ * @env: #CPUXtensaState
+ *
+ * An Xtensa CPU.
+ */
+struct XtensaCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUXtensaState env;
+};
+
+static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
+{
+ return container_of(env, XtensaCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(XtensaCPU, env)
+
+void xtensa_cpu_do_interrupt(CPUState *cpu);
+bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
+void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
+ bool is_write, bool is_exec, int opaque,
+ unsigned size);
+void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+ int is_write, int is_user, uintptr_t retaddr);
#define cpu_exec cpu_xtensa_exec
#define cpu_signal_handler cpu_xtensa_signal_handler
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PATCH 32/52] explicitly include linux/kvm.h
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (5 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 22/52] target-xtensa: " Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-18 16:36 ` [Qemu-devel] [PATCH 42/52] dma: do not depend on kvm_enabled() Paolo Bonzini
2016-05-19 4:04 ` [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Thomas Huth
8 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/kvm/i8254.c | 1 +
hw/i386/kvm/pci-assign.c | 1 +
hw/intc/xics_kvm.c | 1 +
hw/vfio/common.c | 3 +++
4 files changed, 6 insertions(+)
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index a4462e5..734992e 100644
--- a/hw/i386/kvm/i8254.c
+++ b/hw/i386/kvm/i8254.c
@@ -29,6 +29,7 @@
#include "hw/timer/i8254.h"
#include "hw/timer/i8254_internal.h"
#include "sysemu/kvm.h"
+#include "linux/kvm.h"
#define KVM_PIT_REINJECT_BIT 0
diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index bf425a2..db2cbd2 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -33,6 +33,7 @@
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
+#include "linux/kvm.h"
#include "kvm_i386.h"
#include "hw/pci/pci-assign.h"
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 9029d9e..b40292d 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -31,6 +31,7 @@
#include "cpu.h"
#include "hw/hw.h"
#include "trace.h"
+#include "linux/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
diff --git a/hw/vfio/common.c b/hw/vfio/common.c
index f27db36..88154a1 100644
--- a/hw/vfio/common.c
+++ b/hw/vfio/common.c
@@ -30,6 +30,9 @@
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
+#ifdef CONFIG_KVM
+#include "linux/kvm.h"
+#endif
#include "trace.h"
struct vfio_group_head vfio_group_list =
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [Qemu-devel] [PATCH 42/52] dma: do not depend on kvm_enabled()
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (6 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 32/52] explicitly include linux/kvm.h Paolo Bonzini
@ 2016-05-18 16:36 ` Paolo Bonzini
2016-05-19 4:04 ` [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Thomas Huth
8 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-18 16:36 UTC (permalink / raw)
To: qemu-devel
Memory barriers are needed also by Xen and, when the ioeventfd
bugs are fixed, by TCG as well.
sysemu/kvm.h is not anymore needed in sysemu/dma.h, move it to
the actual users.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/intc/arm_gicv2m.c | 1 +
hw/intc/xics_kvm.c | 2 +-
hw/misc/pci-testdev.c | 1 +
hw/ppc/e500plat.c | 1 +
hw/ppc/spapr_hcall.c | 1 +
hw/ppc/spapr_pci.c | 1 +
hw/ppc/spapr_rtas.c | 1 +
include/sysemu/dma.h | 5 +----
8 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c
index e8b5177..589d315 100644
--- a/hw/intc/arm_gicv2m.c
+++ b/hw/intc/arm_gicv2m.c
@@ -29,6 +29,7 @@
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
+#include "sysemu/kvm.h"
#define TYPE_ARM_GICV2M "arm-gicv2m"
#define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M)
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index b40292d..55fd801 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -31,7 +31,7 @@
#include "cpu.h"
#include "hw/hw.h"
#include "trace.h"
-#include "linux/kvm.h"
+#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/xics.h"
#include "kvm_ppc.h"
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index 2f2e989..7d59902 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -21,6 +21,7 @@
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "qemu/event_notifier.h"
+#include "sysemu/kvm.h"
typedef struct PCITestDevHdr {
uint8_t test;
diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
index b00565c..94b4545 100644
--- a/hw/ppc/e500plat.c
+++ b/hw/ppc/e500plat.c
@@ -14,6 +14,7 @@
#include "e500.h"
#include "hw/boards.h"
#include "sysemu/device_tree.h"
+#include "sysemu/kvm.h"
#include "hw/pci/pci.h"
#include "hw/ppc/openpic.h"
#include "kvm_ppc.h"
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 8f40602..4426a50 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -7,6 +7,7 @@
#include "mmu-hash64.h"
#include "cpu-models.h"
#include "trace.h"
+#include "sysemu/kvm.h"
#include "kvm_ppc.h"
struct SPRSyncState {
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 573e635..e55b505 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -44,6 +44,7 @@
#include "hw/pci/pci_bus.h"
#include "hw/ppc/spapr_drc.h"
#include "sysemu/device_tree.h"
+#include "sysemu/kvm.h"
#include "hw/vfio/vfio.h"
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index f073258..580829e 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -31,6 +31,7 @@
#include "hw/qdev.h"
#include "sysemu/device_tree.h"
#include "sysemu/cpus.h"
+#include "sysemu/kvm.h"
#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 0f7cd4d..d6e96a4 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -15,7 +15,6 @@
#include "hw/hw.h"
#include "block/block.h"
#include "block/accounting.h"
-#include "sysemu/kvm.h"
typedef struct ScatterGatherEntry ScatterGatherEntry;
@@ -67,9 +66,7 @@ static inline void dma_barrier(AddressSpace *as, DMADirection dir)
* use lighter barriers based on the direction of the
* transfer, the DMA context, etc...
*/
- if (kvm_enabled()) {
- smp_mb();
- }
+ smp_mb();
}
/* Checks that the given range of addresses is valid for DMA. This is
--
1.8.3.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups
2016-05-18 16:36 [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Paolo Bonzini
` (7 preceding siblings ...)
2016-05-18 16:36 ` [Qemu-devel] [PATCH 42/52] dma: do not depend on kvm_enabled() Paolo Bonzini
@ 2016-05-19 4:04 ` Thomas Huth
2016-05-19 10:55 ` Paolo Bonzini
8 siblings, 1 reply; 14+ messages in thread
From: Thomas Huth @ 2016-05-19 4:04 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel; +Cc: Cornelia Huck
On 18.05.2016 18:36, Paolo Bonzini wrote:
> This series removes usage of NEED_CPU_H from several central
> include files in QEMU, most notably hw/hw.h and qemu-common.h.
> Definitions conditional on NEED_CPU_H remain only in disas/disas.h,
> exec/gdbstub.h, exec/helper-head.h and exec/log.h.
>
> The interesting patches are interspersed with other miscellaenous
> cleanups that I won't really dwell on in the cover letter; the main
> changes are:
>
> - make sure that target-independent code can access QOM objects
> for the CPU through an opaque type.
There still seems to be some target-specific code in some of the
cpu-qom.h headers:
$ grep -r TARGET_ target-*/cpu-qom.h
target-i386/cpu-qom.h:#ifdef TARGET_X86_64
target-mips/cpu-qom.h:#ifdef TARGET_MIPS64
target-ppc/cpu-qom.h:#ifdef TARGET_PPC64
target-ppc/cpu-qom.h:#elif defined(TARGET_PPCEMB)
target-ppc/cpu-qom.h:#if defined(TARGET_PPC64)
target-ppc/cpu-qom.h:#endif /* defined(TARGET_PPC64) */
target-sparc/cpu-qom.h:#ifdef TARGET_SPARC64
This will mainly affect the *_CPU_CLASS macros ... should these macros
now also be moved to target-*/cpu.h instead?
[...]
> As before, I would appreciate people compile-testing it on PPC. It should
> fix all the problems reported previously. The changes are available in
> the git repository at git://github.com/bonzini/qemu.git, branch need-cpu-h
I've just re-checked that branch, and now it compiles fine for me on PPC.
Thomas
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups
2016-05-19 4:04 ` [Qemu-devel] [PATCH CFT v4 00/52] NEED_CPU_H / cpu.h / hw/hw.h cleanups Thomas Huth
@ 2016-05-19 10:55 ` Paolo Bonzini
0 siblings, 0 replies; 14+ messages in thread
From: Paolo Bonzini @ 2016-05-19 10:55 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: Cornelia Huck
On 19/05/2016 06:04, Thomas Huth wrote:
> On 18.05.2016 18:36, Paolo Bonzini wrote:
>> This series removes usage of NEED_CPU_H from several central
>> include files in QEMU, most notably hw/hw.h and qemu-common.h.
>> Definitions conditional on NEED_CPU_H remain only in disas/disas.h,
>> exec/gdbstub.h, exec/helper-head.h and exec/log.h.
>>
>> The interesting patches are interspersed with other miscellaenous
>> cleanups that I won't really dwell on in the cover letter; the main
>> changes are:
>>
>> - make sure that target-independent code can access QOM objects
>> for the CPU through an opaque type.
>
> There still seems to be some target-specific code in some of the
> cpu-qom.h headers:
>
> $ grep -r TARGET_ target-*/cpu-qom.h
> target-i386/cpu-qom.h:#ifdef TARGET_X86_64
> target-mips/cpu-qom.h:#ifdef TARGET_MIPS64
> target-ppc/cpu-qom.h:#ifdef TARGET_PPC64
> target-ppc/cpu-qom.h:#elif defined(TARGET_PPCEMB)
> target-ppc/cpu-qom.h:#if defined(TARGET_PPC64)
> target-ppc/cpu-qom.h:#endif /* defined(TARGET_PPC64) */
> target-sparc/cpu-qom.h:#ifdef TARGET_SPARC64
>
> This will mainly affect the *_CPU_CLASS macros ... should these macros
> now also be moved to target-*/cpu.h instead?
Probably, together with X86_CPU. A separate patch though.
Thanks,
Paolo
> [...]
>> As before, I would appreciate people compile-testing it on PPC. It should
>> fix all the problems reported previously. The changes are available in
>> the git repository at git://github.com/bonzini/qemu.git, branch need-cpu-h
>
> I've just re-checked that branch, and now it compiles fine for me on PPC.
>
> Thomas
>
^ permalink raw reply [flat|nested] 14+ messages in thread