* [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups
@ 2016-05-19 14:43 Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Paolo Bonzini @ 2016-05-19 14:43 UTC (permalink / raw)
To: qemu-devel
The following changes since commit 8ec4fe0a4bed4fa27e6f28a746bcf77b27cd05a3:
Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2016-05-18' into staging (2016-05-19 09:27:28 +0100)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to df43d49cb8708b9c88a20afe0d1a3089b550a5b8:
hw: clean up hw/hw.h includes (2016-05-19 16:42:30 +0200)
----------------------------------------------------------------
NEED_CPU_H cleanups, big enough to deserve their own pull request.
----------------------------------------------------------------
Paolo Bonzini (52):
scripts: add script to build QEMU and analyze inclusions
s390x: move .needed functions for subsections to machine.c
include: move CPU-related definitions out of qemu-common.h
log: do not use CONFIG_USER_ONLY
cpu: make cpu-qom.h only include-able from cpu.h
target-alpha: make cpu-qom.h not target specific
target-arm: make cpu-qom.h not target specific
target-cris: make cpu-qom.h not target specific
target-i386: make cpu-qom.h not target specific
target-lm32: make cpu-qom.h not target specific
target-m68k: make cpu-qom.h not target specific
target-microblaze: make cpu-qom.h not target specific
target-mips: make cpu-qom.h not target specific
target-ppc: do not use target_ulong in cpu-qom.h
target-ppc: do not make PowerPCCPUClass depend on target-specific symbols
target-ppc: make cpu-qom.h not target specific
target-s390x: make cpu-qom.h not target specific
target-sh4: make cpu-qom.h not target specific
target-sparc: make cpu-qom.h not target specific
target-tricore: make cpu-qom.h not target specific
target-unicore32: make cpu-qom.h not target specific
target-xtensa: make cpu-qom.h not target specific
arm: include cpu-qom.h in files that require ARMCPU
m68k: include cpu-qom.h in files that require M68KCPU
sh4: include cpu-qom.h in files that require SuperHCPU
alpha: include cpu-qom.h in files that require AlphaCPU
mips: use MIPSCPU instead of CPUMIPSState
ppc: use PowerPCCPU instead of CPUPPCState
arm: remove useless cpu.h inclusion
explicitly include qom/cpu.h
explicitly include hw/qdev-core.h
explicitly include linux/kvm.h
apic: move target-dependent definitions to cpu.h
include: poison symbols in osdep.h
hw: do not use VMSTATE_*TL
hw: move CPU state serialization to migration/cpu.h
hw: cannot include hw/hw.h from user emulation
cpu: move endian-dependent load/store functions to cpu-all.h
qemu-common: stop including qemu/bswap.h from qemu-common.h
qemu-common: stop including qemu/host-utils.h from qemu-common.h
gdbstub: remove unnecessary includes from gdbstub-xml.c
dma: do not depend on kvm_enabled()
s390x: reorganize CSS bits between cpu.h and other headers
acpi: do not use TARGET_PAGE_SIZE
qemu-common: push cpu.h inclusion out of qemu-common.h
arm: move arm_log_exception into .c file
mips: move CP0 functions out of cpu.h
hw: explicitly include qemu/log.h
exec: extract exec/tb-context.h
cpu: move exec-all.h inclusion out of cpu.h
hw: remove pio_addr_t
hw: clean up hw/hw.h includes
arch_init.c | 2 +
audio/mixeng.c | 1 +
audio/noaudio.c | 1 +
audio/spiceaudio.c | 1 +
audio/wavaudio.c | 2 +-
block/bochs.c | 1 +
block/cloop.c | 1 +
block/parallels.c | 1 +
block/qcow.c | 1 +
block/qcow2-cluster.c | 1 +
block/qcow2-refcount.c | 1 +
block/qcow2-snapshot.c | 1 +
block/qcow2.c | 1 +
block/qed-table.c | 1 +
block/qed.c | 1 +
block/vdi.c | 1 +
block/vhdx-endian.c | 1 +
block/vhdx-log.c | 1 +
block/vhdx.c | 1 +
block/vmdk.c | 1 +
block/vpc.c | 1 +
block/vvfat.c | 1 +
bootdevice.c | 1 +
bsd-user/main.c | 2 +
bsd-user/qemu.h | 1 +
contrib/ivshmem-server/ivshmem-server.c | 1 +
cpu-exec-common.c | 1 +
cpu-exec.c | 1 +
cpus.c | 4 +-
cputlb.c | 1 +
crypto/afsplit.c | 1 +
crypto/block-luks.c | 1 +
device_tree.c | 1 +
disas/tci.c | 1 +
exec.c | 25 ++--
gdbstub.c | 3 +-
hw/acpi/core.c | 6 +
hw/acpi/nvdimm.c | 22 ++--
hw/acpi/piix4.c | 1 +
hw/alpha/alpha_sys.h | 1 +
hw/alpha/pci.c | 1 -
hw/arm/ast2400.c | 1 +
hw/arm/collie.c | 1 +
hw/arm/nseries.c | 3 +
hw/arm/palmetto-bmc.c | 1 +
hw/arm/pxa2xx_gpio.c | 2 +
hw/arm/stellaris.c | 1 +
hw/arm/stm32f205_soc.c | 1 -
hw/arm/strongarm.c | 1 +
hw/arm/strongarm.h | 1 +
hw/arm/xlnx-ep108.c | 1 +
hw/audio/pl041.c | 1 +
hw/block/hd-geometry.c | 1 +
hw/block/m25p80.c | 1 +
hw/block/pflash_cfi01.c | 1 +
hw/bt/hci-csr.c | 1 +
hw/bt/l2cap.c | 1 +
hw/bt/sdp.c | 1 +
hw/char/bcm2835_aux.c | 1 +
hw/char/cadence_uart.c | 4 +
hw/char/digic-uart.c | 1 +
hw/char/imx_serial.c | 1 +
hw/char/pl011.c | 1 +
hw/char/stm32f2xx_usart.c | 1 +
hw/core/Makefile.objs | 2 +-
hw/core/nmi.c | 5 +
hw/core/sysbus.c | 4 +-
hw/cpu/a9mpcore.c | 1 +
hw/display/bcm2835_fb.c | 1 +
hw/display/cg3.c | 2 +
hw/display/pl110.c | 1 +
hw/display/tc6393xb.c | 1 +
hw/display/virtio-gpu.c | 1 +
hw/dma/bcm2835_dma.c | 1 +
hw/dma/pl080.c | 1 +
hw/dma/pl330.c | 1 +
hw/dma/rc4030.c | 1 +
hw/gpio/gpio_key.c | 1 +
hw/gpio/imx_gpio.c | 1 +
hw/gpio/pl061.c | 1 +
hw/i2c/imx_i2c.c | 1 +
hw/i2c/versatile_i2c.c | 1 +
hw/i386/kvm/apic.c | 2 +
hw/i386/kvm/clock.c | 1 +
hw/i386/kvm/i8254.c | 1 +
hw/i386/kvm/pci-assign.c | 1 +
hw/i386/kvmvapic.c | 3 +
hw/input/pl050.c | 1 +
hw/intc/allwinner-a10-pic.c | 1 +
hw/intc/apic.c | 2 +
hw/intc/apic_common.c | 2 +
hw/intc/arm_gic.c | 1 +
hw/intc/arm_gic_kvm.c | 2 +
hw/intc/arm_gicv2m.c | 2 +
hw/intc/armv7m_nvic.c | 2 +
hw/intc/bcm2835_ic.c | 1 +
hw/intc/bcm2836_control.c | 1 +
hw/intc/i8259.c | 1 +
hw/intc/imx_avic.c | 1 +
hw/intc/ioapic.c | 1 +
hw/intc/openpic.c | 1 +
hw/intc/openpic_kvm.c | 2 +
hw/intc/pl190.c | 1 +
hw/intc/s390_flic_kvm.c | 2 +
hw/intc/xics_kvm.c | 1 +
hw/isa/lpc_ich9.c | 1 +
hw/mips/cps.c | 7 +-
hw/mips/cputimer.c | 4 +-
hw/mips/mips_fulong2e.c | 4 +-
hw/mips/mips_int.c | 3 +-
hw/mips/mips_jazz.c | 4 +-
hw/mips/mips_malta.c | 5 +-
hw/mips/mips_mipssim.c | 4 +-
hw/mips/mips_r4k.c | 4 +-
hw/misc/arm11scu.c | 1 +
hw/misc/arm_integrator_debug.c | 1 +
hw/misc/arm_l2x0.c | 1 +
hw/misc/arm_sysctl.c | 1 +
hw/misc/bcm2835_mbox.c | 1 +
hw/misc/bcm2835_property.c | 1 +
hw/misc/imx25_ccm.c | 1 +
hw/misc/imx31_ccm.c | 1 +
hw/misc/imx6_ccm.c | 1 +
hw/misc/imx6_src.c | 1 +
hw/misc/imx_ccm.c | 1 +
hw/misc/macio/cuda.c | 1 +
hw/misc/macio/mac_dbdma.c | 1 +
hw/misc/mips_cmgcr.c | 1 +
hw/misc/mips_cpc.c | 2 +
hw/misc/mips_itu.c | 3 +
hw/misc/pci-testdev.c | 1 +
hw/misc/stm32f2xx_syscfg.c | 1 +
hw/misc/zynq-xadc.c | 1 +
hw/misc/zynq_slcr.c | 1 +
hw/net/allwinner_emac.c | 1 +
hw/net/fsl_etsec/etsec.c | 1 +
hw/net/fsl_etsec/rings.c | 2 +-
hw/net/imx_fec.c | 1 +
hw/net/lan9118.c | 1 +
hw/net/spapr_llan.c | 9 +-
hw/pci-host/apb.c | 1 +
hw/pci-host/versatile.c | 1 +
hw/ppc/e500plat.c | 1 +
hw/ppc/ppc.c | 20 +--
hw/ppc/ppc4xx_devs.c | 1 +
hw/ppc/prep.c | 1 +
hw/ppc/spapr.c | 1 +
hw/ppc/spapr_hcall.c | 3 +
hw/ppc/spapr_iommu.c | 1 +
hw/ppc/spapr_pci.c | 1 +
hw/ppc/spapr_rtas.c | 2 +
hw/ppc/spapr_vio.c | 3 +-
hw/ppc/virtex_ml507.c | 1 +
hw/s390x/css.c | 4 +-
hw/s390x/s390-skeys.c | 1 +
hw/s390x/s390-virtio-ccw.c | 4 +-
hw/s390x/virtio-ccw.c | 5 +-
hw/s390x/virtio-ccw.h | 3 +-
hw/sd/pl181.c | 1 +
hw/sd/sd.c | 1 +
hw/sd/sdhci.c | 1 +
hw/sh4/sh7750.c | 1 +
hw/ssi/imx_spi.c | 1 +
hw/ssi/pl022.c | 1 +
hw/timer/allwinner-a10-pit.c | 1 +
hw/timer/arm_timer.c | 1 +
hw/timer/digic-timer.c | 1 +
hw/timer/imx_epit.c | 1 +
hw/timer/imx_gpt.c | 1 +
hw/timer/pl031.c | 1 +
hw/timer/stm32f2xx_timer.c | 1 +
hw/vfio/common.c | 3 +
hw/watchdog/wdt_diag288.c | 1 +
hw/xtensa/pic_cpu.c | 1 +
include/disas/disas.h | 2 +
include/exec/cpu-all.h | 25 ++++
include/exec/cpu-common.h | 14 ---
include/exec/cpu-defs.h | 1 +
include/exec/exec-all.h | 54 +-------
include/exec/gdbstub.h | 2 +
include/exec/helper-head.h | 23 ++--
include/exec/hwaddr.h | 2 +
include/exec/ioport.h | 19 +--
include/exec/memory.h | 17 ---
include/exec/poison.h | 8 --
include/exec/tb-context.h | 44 +++++++
include/hw/acpi/acpi.h | 7 --
include/hw/arm/arm.h | 2 +-
include/hw/arm/digic.h | 1 -
include/hw/arm/exynos4210.h | 1 +
include/hw/arm/fsl-imx6.h | 1 +
include/hw/arm/omap.h | 1 +
include/hw/arm/pxa.h | 1 +
include/hw/arm/virt-acpi-build.h | 1 +
include/hw/arm/virt.h | 1 +
include/hw/hw.h | 60 +--------
include/hw/i386/apic.h | 5 -
include/hw/isa/isa.h | 2 +-
include/hw/m68k/mcf.h | 2 +
include/hw/mips/cpudevs.h | 7 +-
include/hw/ppc/openpic.h | 3 +-
include/hw/ppc/ppc.h | 24 ++--
include/hw/ppc/spapr_vio.h | 2 +-
{hw => include/hw}/s390x/css.h | 31 ++++-
{target-s390x => include/hw/s390x}/ioinst.h | 16 +--
include/hw/sd/sd.h | 2 +
include/hw/sh4/sh.h | 1 +
include/hw/sysbus.h | 4 +-
include/hw/xen/xen.h | 7 +-
include/migration/cpu.h | 48 +++++++
include/qemu-common.h | 32 -----
include/qemu/log.h | 17 +--
include/qemu/osdep.h | 2 +
include/qemu/timer.h | 1 +
include/qom/cpu.h | 19 +++
include/sysemu/cpus.h | 13 ++
include/sysemu/dma.h | 5 +-
include/sysemu/kvm.h | 1 +
io/channel-websock.c | 1 +
ioport.c | 14 ++-
kvm-stub.c | 1 -
linux-user/main.c | 2 +
linux-user/qemu.h | 1 +
memory.c | 2 +
migration/ram.c | 2 +
migration/savevm.c | 1 +
monitor.c | 4 +
nbd/nbd-internal.h | 1 +
page_cache.c | 1 +
qemu-nbd.c | 1 +
qtest.c | 2 +
scripts/analyze-inclusions | 102 +++++++++++++++
scripts/create_config | 2 +-
scripts/feature_to_c.sh | 2 -
scripts/tracetool/format/tcg_helper_c.py | 1 +
slirp/slirp.h | 1 +
stubs/cpu-get-icount.c | 1 +
stubs/slirp.c | 1 +
target-alpha/cpu-qom.h | 41 +-----
target-alpha/cpu.c | 1 +
target-alpha/cpu.h | 44 ++++++-
target-alpha/fpu_helper.c | 1 +
target-alpha/gdbstub.c | 1 +
target-alpha/helper.c | 1 +
target-alpha/int_helper.c | 1 +
target-alpha/machine.c | 3 +
target-alpha/mem_helper.c | 1 +
target-alpha/sys_helper.c | 1 +
target-alpha/translate.c | 1 +
target-alpha/vax_helper.c | 1 +
target-arm/arm-powerctl.c | 2 +
target-arm/arm_ldst.h | 1 +
target-arm/cpu-qom.h | 178 +-------------------------
target-arm/cpu.c | 1 +
target-arm/cpu.h | 181 +++++++++++++++++++++++++-
target-arm/gdbstub.c | 1 +
target-arm/gdbstub64.c | 1 +
target-arm/helper-a64.c | 1 +
target-arm/helper.c | 16 +++
target-arm/internals.h | 15 ---
target-arm/kvm-stub.c | 1 +
target-arm/kvm.c | 1 +
target-arm/kvm32.c | 3 +-
target-arm/kvm64.c | 2 +-
target-arm/machine.c | 3 +
target-arm/op_helper.c | 1 +
target-arm/psci.c | 2 +-
target-arm/translate-a64.c | 1 +
target-arm/translate.c | 1 +
target-cris/cpu-qom.h | 40 +-----
target-cris/cpu.c | 1 +
target-cris/cpu.h | 43 ++++++-
target-cris/gdbstub.c | 1 +
target-cris/helper.c | 1 +
target-cris/machine.c | 3 +
target-cris/mmu.c | 1 +
target-cris/op_helper.c | 1 +
target-cris/translate.c | 1 +
target-i386/bpt_helper.c | 1 +
target-i386/cpu-qom.h | 98 +--------------
target-i386/cpu.c | 3 +-
target-i386/cpu.h | 107 +++++++++++++++-
target-i386/excp_helper.c | 1 +
target-i386/fpu_helper.c | 1 +
target-i386/gdbstub.c | 1 +
target-i386/helper.c | 1 +
target-i386/int_helper.c | 1 +
target-i386/kvm-stub.c | 1 +
target-i386/kvm.c | 2 +-
target-i386/machine.c | 6 +
target-i386/mem_helper.c | 1 +
target-i386/misc_helper.c | 1 +
target-i386/mpx_helper.c | 1 +
target-i386/seg_helper.c | 1 +
target-i386/svm_helper.c | 1 +
target-i386/translate.c | 1 +
target-lm32/cpu-qom.h | 42 +------
target-lm32/cpu.c | 1 +
target-lm32/cpu.h | 46 ++++++-
target-lm32/gdbstub.c | 1 +
target-lm32/helper.c | 1 +
target-lm32/machine.c | 3 +
target-lm32/op_helper.c | 1 +
target-lm32/translate.c | 1 +
target-m68k/cpu-qom.h | 34 +----
target-m68k/cpu.c | 1 +
target-m68k/cpu.h | 38 +++++-
target-m68k/gdbstub.c | 1 +
target-m68k/helper.c | 1 +
target-m68k/m68k-semi.c | 1 +
target-m68k/op_helper.c | 1 +
target-m68k/translate.c | 1 +
target-microblaze/cpu-qom.h | 44 +------
target-microblaze/cpu.c | 1 +
target-microblaze/cpu.h | 47 ++++++-
target-microblaze/gdbstub.c | 1 +
target-microblaze/helper.c | 1 +
target-microblaze/mmu.c | 1 +
target-microblaze/op_helper.c | 1 +
target-microblaze/translate.c | 1 +
target-mips/cpu-qom.h | 37 +-----
target-mips/cpu.c | 1 +
target-mips/cpu.h | 171 +++++++------------------
target-mips/gdbstub.c | 1 +
target-mips/helper.c | 126 +++++++++++++++++++
target-mips/kvm.c | 2 +-
target-mips/machine.c | 4 +-
target-mips/mips-semi.c | 1 +
target-mips/msa_helper.c | 1 +
target-mips/op_helper.c | 1 +
target-mips/translate.c | 1 +
target-moxie/cpu.c | 1 +
target-moxie/cpu.h | 1 -
target-moxie/machine.c | 3 +
target-openrisc/cpu.c | 1 +
target-openrisc/cpu.h | 2 -
target-openrisc/exception.c | 1 +
target-openrisc/gdbstub.c | 1 +
target-openrisc/interrupt.c | 1 +
target-openrisc/interrupt_helper.c | 1 +
target-openrisc/machine.c | 3 +
target-openrisc/mmu.c | 1 +
target-openrisc/mmu_helper.c | 1 +
target-openrisc/sys_helper.c | 1 +
target-ppc/cpu-qom.h | 167 +++++++++++++++---------
target-ppc/cpu.h | 167 ++++++++----------------
target-ppc/excp_helper.c | 1 +
target-ppc/gdbstub.c | 1 +
target-ppc/int_helper.c | 1 +
target-ppc/kvm-stub.c | 1 +
target-ppc/kvm.c | 2 +-
target-ppc/machine.c | 5 +
target-ppc/mem_helper.c | 2 +
target-ppc/misc_helper.c | 1 +
target-ppc/mmu-hash32.c | 3 +-
target-ppc/mmu-hash32.h | 2 +-
target-ppc/mmu-hash64.c | 3 +-
target-ppc/mmu-hash64.h | 2 +-
target-ppc/mmu_helper.c | 1 +
target-ppc/timebase_helper.c | 1 +
target-ppc/translate.c | 1 +
target-ppc/translate_init.c | 92 ++++++--------
target-s390x/cc_helper.c | 1 +
target-s390x/cpu-qom.h | 46 +------
target-s390x/cpu.c | 4 +-
target-s390x/cpu.h | 188 ++++++++++------------------
target-s390x/fpu_helper.c | 1 +
target-s390x/gdbstub.c | 2 +
target-s390x/helper.c | 2 +
target-s390x/int_helper.c | 1 +
target-s390x/interrupt.c | 66 +++++++++-
target-s390x/ioinst.c | 2 +-
target-s390x/kvm.c | 2 +-
target-s390x/machine.c | 20 +++
target-s390x/mem_helper.c | 4 +
target-s390x/misc_helper.c | 3 +-
target-s390x/translate.c | 1 +
target-sh4/cpu-qom.h | 31 +----
target-sh4/cpu.c | 1 +
target-sh4/cpu.h | 34 ++++-
target-sh4/gdbstub.c | 1 +
target-sh4/helper.c | 1 +
target-sh4/op_helper.c | 1 +
target-sh4/translate.c | 1 +
target-sparc/cpu-qom.h | 38 +-----
target-sparc/cpu.c | 1 +
target-sparc/cpu.h | 40 +++++-
target-sparc/gdbstub.c | 1 +
target-sparc/helper.c | 1 +
target-sparc/ldst_helper.c | 1 +
target-sparc/machine.c | 6 +
target-sparc/mmu_helper.c | 1 +
target-sparc/translate.c | 1 +
target-tilegx/cpu.c | 1 +
target-tilegx/cpu.h | 2 -
target-tilegx/helper.c | 1 +
target-tilegx/translate.c | 1 +
target-tricore/cpu-qom.h | 28 +----
target-tricore/cpu.c | 1 +
target-tricore/cpu.h | 32 ++++-
target-tricore/helper.c | 1 +
target-tricore/op_helper.c | 1 +
target-tricore/translate.c | 1 +
target-unicore32/cpu-qom.h | 30 +----
target-unicore32/cpu.c | 1 +
target-unicore32/cpu.h | 32 ++++-
target-unicore32/helper.c | 1 +
target-unicore32/op_helper.c | 1 +
target-unicore32/softmmu.c | 1 +
target-unicore32/translate.c | 1 +
target-xtensa/cpu-qom.h | 39 +-----
target-xtensa/cpu.c | 1 +
target-xtensa/cpu.h | 42 ++++++-
target-xtensa/gdbstub.c | 2 +
target-xtensa/op_helper.c | 1 +
target-xtensa/translate.c | 1 +
tcg/optimize.c | 3 +-
tcg/tcg-common.c | 2 +
tcg/tcg-op.c | 3 +
tcg/tcg.c | 5 +
tcg/tcg.h | 23 ++++
tests/ide-test.c | 1 +
tests/libqos/malloc.c | 1 +
translate-all.c | 1 +
translate-common.c | 1 +
ui/vnc-ws.c | 1 +
user-exec.c | 1 +
util/buffer.c | 1 +
util/log.c | 12 +-
vl.c | 2 +
xen-hvm.c | 9 +-
431 files changed, 2099 insertions(+), 1618 deletions(-)
create mode 100644 include/exec/tb-context.h
rename {hw => include/hw}/s390x/css.h (76%)
rename {target-s390x => include/hw/s390x}/ioinst.h (87%)
create mode 100644 include/migration/cpu.h
create mode 100644 scripts/analyze-inclusions
--
2.5.5
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PULL v4 16/52] target-ppc: make cpu-qom.h not target specific
2016-05-19 14:43 [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Paolo Bonzini
@ 2016-05-19 14:43 ` Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 22/52] target-xtensa: " Paolo Bonzini
2016-05-19 15:53 ` [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Peter Maydell
2 siblings, 0 replies; 6+ messages in thread
From: Paolo Bonzini @ 2016-05-19 14:43 UTC (permalink / raw)
To: qemu-devel
Make PowerPCCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. Conversely, move all definitions needed to define
a class to cpu-qom.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-ppc/cpu-qom.h | 159 +++++++++++++++++++++++++++++++++----------------
target-ppc/cpu.h | 165 ++++++++++++++++-----------------------------------
2 files changed, 161 insertions(+), 163 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 6f4e929..07358aa 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -38,6 +38,115 @@
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
typedef struct PowerPCCPU PowerPCCPU;
+typedef struct CPUPPCState CPUPPCState;
+typedef struct ppc_tb_t ppc_tb_t;
+typedef struct ppc_dcr_t ppc_dcr_t;
+
+/*****************************************************************************/
+/* MMU model */
+typedef enum powerpc_mmu_t powerpc_mmu_t;
+enum powerpc_mmu_t {
+ POWERPC_MMU_UNKNOWN = 0x00000000,
+ /* Standard 32 bits PowerPC MMU */
+ POWERPC_MMU_32B = 0x00000001,
+ /* PowerPC 6xx MMU with software TLB */
+ POWERPC_MMU_SOFT_6xx = 0x00000002,
+ /* PowerPC 74xx MMU with software TLB */
+ POWERPC_MMU_SOFT_74xx = 0x00000003,
+ /* PowerPC 4xx MMU with software TLB */
+ POWERPC_MMU_SOFT_4xx = 0x00000004,
+ /* PowerPC 4xx MMU with software TLB and zones protections */
+ POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
+ /* PowerPC MMU in real mode only */
+ POWERPC_MMU_REAL = 0x00000006,
+ /* Freescale MPC8xx MMU model */
+ POWERPC_MMU_MPC8xx = 0x00000007,
+ /* BookE MMU model */
+ POWERPC_MMU_BOOKE = 0x00000008,
+ /* BookE 2.06 MMU model */
+ POWERPC_MMU_BOOKE206 = 0x00000009,
+ /* PowerPC 601 MMU model (specific BATs format) */
+ POWERPC_MMU_601 = 0x0000000A,
+#define POWERPC_MMU_64 0x00010000
+#define POWERPC_MMU_1TSEG 0x00020000
+#define POWERPC_MMU_AMR 0x00040000
+ /* 64 bits PowerPC MMU */
+ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
+ /* Architecture 2.03 and later (has LPCR) */
+ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
+ /* Architecture 2.06 variant */
+ POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000003,
+ /* Architecture 2.06 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000003,
+ /* Architecture 2.07 variant */
+ POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000004,
+ /* Architecture 2.07 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000004,
+};
+
+/*****************************************************************************/
+/* Exception model */
+typedef enum powerpc_excp_t powerpc_excp_t;
+enum powerpc_excp_t {
+ POWERPC_EXCP_UNKNOWN = 0,
+ /* Standard PowerPC exception model */
+ POWERPC_EXCP_STD,
+ /* PowerPC 40x exception model */
+ POWERPC_EXCP_40x,
+ /* PowerPC 601 exception model */
+ POWERPC_EXCP_601,
+ /* PowerPC 602 exception model */
+ POWERPC_EXCP_602,
+ /* PowerPC 603 exception model */
+ POWERPC_EXCP_603,
+ /* PowerPC 603e exception model */
+ POWERPC_EXCP_603E,
+ /* PowerPC G2 exception model */
+ POWERPC_EXCP_G2,
+ /* PowerPC 604 exception model */
+ POWERPC_EXCP_604,
+ /* PowerPC 7x0 exception model */
+ POWERPC_EXCP_7x0,
+ /* PowerPC 7x5 exception model */
+ POWERPC_EXCP_7x5,
+ /* PowerPC 74xx exception model */
+ POWERPC_EXCP_74xx,
+ /* BookE exception model */
+ POWERPC_EXCP_BOOKE,
+ /* PowerPC 970 exception model */
+ POWERPC_EXCP_970,
+ /* POWER7 exception model */
+ POWERPC_EXCP_POWER7,
+ /* POWER8 exception model */
+ POWERPC_EXCP_POWER8,
+};
+
+/*****************************************************************************/
+/* Input pins model */
+typedef enum powerpc_input_t powerpc_input_t;
+enum powerpc_input_t {
+ PPC_FLAGS_INPUT_UNKNOWN = 0,
+ /* PowerPC 6xx bus */
+ PPC_FLAGS_INPUT_6xx,
+ /* BookE bus */
+ PPC_FLAGS_INPUT_BookE,
+ /* PowerPC 405 bus */
+ PPC_FLAGS_INPUT_405,
+ /* PowerPC 970 bus */
+ PPC_FLAGS_INPUT_970,
+ /* PowerPC POWER7 bus */
+ PPC_FLAGS_INPUT_POWER7,
+ /* PowerPC 401 bus */
+ PPC_FLAGS_INPUT_401,
+ /* Freescale RCPU bus */
+ PPC_FLAGS_INPUT_RCPU,
+};
+
+struct ppc_segment_page_sizes;
/**
* PowerPCCPUClass:
@@ -74,57 +183,7 @@ typedef struct PowerPCCPUClass {
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
-/**
- * PowerPCCPU:
- * @env: #CPUPPCState
- * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
- * @max_compat: Maximal supported logical PVR from the command line
- * @cpu_version: Current logical PVR, zero if in "raw" mode
- *
- * A PowerPC CPU.
- */
-struct PowerPCCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUPPCState env;
- int cpu_dt_id;
- uint32_t max_compat;
- uint32_t cpu_version;
-};
-
-static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
-{
- return container_of(env, PowerPCCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(PowerPCCPU, env)
-
-PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
-PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
-
-void ppc_cpu_do_interrupt(CPUState *cpu);
-bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
- uint64_t *pval);
-hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
-void ppc_cpu_do_system_reset(CPUState *cs);
-extern const struct VMStateDescription vmstate_ppc_cpu;
-
typedef struct PPCTimebase {
uint64_t guest_timebase;
int64_t time_of_the_day_ns;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 508f03b..69b6f29 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -76,7 +76,7 @@
#define CPUArchState struct CPUPPCState
#include "exec/cpu-defs.h"
-
+#include "cpu-qom.h"
#include "fpu/softfloat.h"
#if defined (TARGET_PPC64)
@@ -86,93 +86,6 @@
#endif
/*****************************************************************************/
-/* MMU model */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
-enum powerpc_mmu_t {
- POWERPC_MMU_UNKNOWN = 0x00000000,
- /* Standard 32 bits PowerPC MMU */
- POWERPC_MMU_32B = 0x00000001,
- /* PowerPC 6xx MMU with software TLB */
- POWERPC_MMU_SOFT_6xx = 0x00000002,
- /* PowerPC 74xx MMU with software TLB */
- POWERPC_MMU_SOFT_74xx = 0x00000003,
- /* PowerPC 4xx MMU with software TLB */
- POWERPC_MMU_SOFT_4xx = 0x00000004,
- /* PowerPC 4xx MMU with software TLB and zones protections */
- POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
- /* PowerPC MMU in real mode only */
- POWERPC_MMU_REAL = 0x00000006,
- /* Freescale MPC8xx MMU model */
- POWERPC_MMU_MPC8xx = 0x00000007,
- /* BookE MMU model */
- POWERPC_MMU_BOOKE = 0x00000008,
- /* BookE 2.06 MMU model */
- POWERPC_MMU_BOOKE206 = 0x00000009,
- /* PowerPC 601 MMU model (specific BATs format) */
- POWERPC_MMU_601 = 0x0000000A,
-#if defined(TARGET_PPC64)
-#define POWERPC_MMU_64 0x00010000
-#define POWERPC_MMU_1TSEG 0x00020000
-#define POWERPC_MMU_AMR 0x00040000
- /* 64 bits PowerPC MMU */
- POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
- /* Architecture 2.03 and later (has LPCR) */
- POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
- /* Architecture 2.06 variant */
- POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000003,
- /* Architecture 2.06 "degraded" (no 1T segments) */
- POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000003,
- /* Architecture 2.07 variant */
- POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000004,
- /* Architecture 2.07 "degraded" (no 1T segments) */
- POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000004,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
-/* Exception model */
-typedef enum powerpc_excp_t powerpc_excp_t;
-enum powerpc_excp_t {
- POWERPC_EXCP_UNKNOWN = 0,
- /* Standard PowerPC exception model */
- POWERPC_EXCP_STD,
- /* PowerPC 40x exception model */
- POWERPC_EXCP_40x,
- /* PowerPC 601 exception model */
- POWERPC_EXCP_601,
- /* PowerPC 602 exception model */
- POWERPC_EXCP_602,
- /* PowerPC 603 exception model */
- POWERPC_EXCP_603,
- /* PowerPC 603e exception model */
- POWERPC_EXCP_603E,
- /* PowerPC G2 exception model */
- POWERPC_EXCP_G2,
- /* PowerPC 604 exception model */
- POWERPC_EXCP_604,
- /* PowerPC 7x0 exception model */
- POWERPC_EXCP_7x0,
- /* PowerPC 7x5 exception model */
- POWERPC_EXCP_7x5,
- /* PowerPC 74xx exception model */
- POWERPC_EXCP_74xx,
- /* BookE exception model */
- POWERPC_EXCP_BOOKE,
-#if defined(TARGET_PPC64)
- /* PowerPC 970 exception model */
- POWERPC_EXCP_970,
- /* POWER7 exception model */
- POWERPC_EXCP_POWER7,
- /* POWER8 exception model */
- POWERPC_EXCP_POWER8,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
/* Exception vectors definitions */
enum {
POWERPC_EXCP_NONE = -1,
@@ -297,27 +210,6 @@ enum {
POWERPC_EXCP_TRAP = 0x40,
};
-/*****************************************************************************/
-/* Input pins model */
-typedef enum powerpc_input_t powerpc_input_t;
-enum powerpc_input_t {
- PPC_FLAGS_INPUT_UNKNOWN = 0,
- /* PowerPC 6xx bus */
- PPC_FLAGS_INPUT_6xx,
- /* BookE bus */
- PPC_FLAGS_INPUT_BookE,
- /* PowerPC 405 bus */
- PPC_FLAGS_INPUT_405,
- /* PowerPC 970 bus */
- PPC_FLAGS_INPUT_970,
- /* PowerPC POWER7 bus */
- PPC_FLAGS_INPUT_POWER7,
- /* PowerPC 401 bus */
- PPC_FLAGS_INPUT_401,
- /* Freescale RCPU bus */
- PPC_FLAGS_INPUT_RCPU,
-};
-
#define PPC_INPUT(env) (env->bus_model)
/*****************************************************************************/
@@ -325,11 +217,8 @@ typedef struct opc_handler_t opc_handler_t;
/*****************************************************************************/
/* Types used to describe some PowerPC registers */
-typedef struct CPUPPCState CPUPPCState;
typedef struct DisasContext DisasContext;
-typedef struct ppc_tb_t ppc_tb_t;
typedef struct ppc_spr_t ppc_spr_t;
-typedef struct ppc_dcr_t ppc_dcr_t;
typedef union ppc_avr_t ppc_avr_t;
typedef union ppc_tlb_t ppc_tlb_t;
@@ -1215,7 +1104,57 @@ do { \
env->wdt_period[3] = (d_); \
} while (0)
-#include "cpu-qom.h"
+/**
+ * PowerPCCPU:
+ * @env: #CPUPPCState
+ * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
+ * @max_compat: Maximal supported logical PVR from the command line
+ * @cpu_version: Current logical PVR, zero if in "raw" mode
+ *
+ * A PowerPC CPU.
+ */
+struct PowerPCCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUPPCState env;
+ int cpu_dt_id;
+ uint32_t max_compat;
+ uint32_t cpu_version;
+};
+
+static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
+{
+ return container_of(env, PowerPCCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(PowerPCCPU, env)
+
+PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
+PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
+
+void ppc_cpu_do_interrupt(CPUState *cpu);
+bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
+ uint64_t *pval);
+hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+#ifndef CONFIG_USER_ONLY
+void ppc_cpu_do_system_reset(CPUState *cs);
+extern const struct VMStateDescription vmstate_ppc_cpu;
+#endif
/*****************************************************************************/
PowerPCCPU *cpu_ppc_init(const char *cpu_model);
--
2.5.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PULL v4 22/52] target-xtensa: make cpu-qom.h not target specific
2016-05-19 14:43 [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
@ 2016-05-19 14:43 ` Paolo Bonzini
2016-05-19 15:53 ` [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Peter Maydell
2 siblings, 0 replies; 6+ messages in thread
From: Paolo Bonzini @ 2016-05-19 14:43 UTC (permalink / raw)
To: qemu-devel; +Cc: Max Filippov
Make XtensaCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. Conversely, move all definitions needed to
define a class to cpu-qom.h. This helps making files independent of
NEED_CPU_H if they only need to pass around CPU pointers.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target-xtensa/cpu-qom.h | 38 +++-----------------------------------
target-xtensa/cpu.h | 41 ++++++++++++++++++++++++++++++++++++++---
2 files changed, 41 insertions(+), 38 deletions(-)
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h
index f5d9b9f..403bd95 100644
--- a/target-xtensa/cpu-qom.h
+++ b/target-xtensa/cpu-qom.h
@@ -40,6 +40,8 @@
#define XTENSA_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU)
+typedef struct XtensaConfig XtensaConfig;
+
/**
* XtensaCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -59,40 +61,6 @@ typedef struct XtensaCPUClass {
const XtensaConfig *config;
} XtensaCPUClass;
-/**
- * XtensaCPU:
- * @env: #CPUXtensaState
- *
- * An Xtensa CPU.
- */
-typedef struct XtensaCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUXtensaState env;
-} XtensaCPU;
-
-static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
-{
- return container_of(env, XtensaCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(XtensaCPU, env)
-
-void xtensa_cpu_do_interrupt(CPUState *cpu);
-bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
-void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
- bool is_write, bool is_exec, int opaque,
- unsigned size);
-void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
- int is_write, int is_user, uintptr_t retaddr);
+typedef struct XtensaCPU XtensaCPU;
#endif
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 7bfc9c8..e47cb6b 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -34,6 +34,7 @@
#define CPUArchState struct CPUXtensaState
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -296,7 +297,7 @@ typedef struct XtensaGdbRegmap {
XtensaGdbReg reg[1 + 16 + 64 + 256 + 256];
} XtensaGdbRegmap;
-typedef struct XtensaConfig {
+struct XtensaConfig {
const char *name;
uint64_t options;
XtensaGdbRegmap gdb_regmap;
@@ -329,7 +330,7 @@ typedef struct XtensaConfig {
xtensa_tlb itlb;
xtensa_tlb dtlb;
-} XtensaConfig;
+};
typedef struct XtensaConfigList {
const XtensaConfig *config;
@@ -379,7 +380,41 @@ typedef struct CPUXtensaState {
CPU_COMMON
} CPUXtensaState;
-#include "cpu-qom.h"
+/**
+ * XtensaCPU:
+ * @env: #CPUXtensaState
+ *
+ * An Xtensa CPU.
+ */
+struct XtensaCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUXtensaState env;
+};
+
+static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
+{
+ return container_of(env, XtensaCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(XtensaCPU, env)
+
+void xtensa_cpu_do_interrupt(CPUState *cpu);
+bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
+void xtensa_cpu_do_unassigned_access(CPUState *cpu, hwaddr addr,
+ bool is_write, bool is_exec, int opaque,
+ unsigned size);
+void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+ int is_write, int is_user, uintptr_t retaddr);
#define cpu_exec cpu_xtensa_exec
#define cpu_signal_handler cpu_xtensa_signal_handler
--
2.5.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups
2016-05-19 14:43 [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 22/52] target-xtensa: " Paolo Bonzini
@ 2016-05-19 15:53 ` Peter Maydell
2016-05-19 17:54 ` Peter Maydell
2 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2016-05-19 15:53 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On 19 May 2016 at 15:43, Paolo Bonzini <pbonzini@redhat.com> wrote:
> The following changes since commit 8ec4fe0a4bed4fa27e6f28a746bcf77b27cd05a3:
>
> Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2016-05-18' into staging (2016-05-19 09:27:28 +0100)
>
> are available in the git repository at:
>
> git://github.com/bonzini/qemu.git tags/for-upstream
>
> for you to fetch changes up to df43d49cb8708b9c88a20afe0d1a3089b550a5b8:
>
> hw: clean up hw/hw.h includes (2016-05-19 16:42:30 +0200)
>
> ----------------------------------------------------------------
> NEED_CPU_H cleanups, big enough to deserve their own pull request.
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups
2016-05-19 15:53 ` [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Peter Maydell
@ 2016-05-19 17:54 ` Peter Maydell
2016-05-19 18:35 ` Paolo Bonzini
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2016-05-19 17:54 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: QEMU Developers
On 19 May 2016 at 16:53, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 19 May 2016 at 15:43, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> The following changes since commit 8ec4fe0a4bed4fa27e6f28a746bcf77b27cd05a3:
>>
>> Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2016-05-18' into staging (2016-05-19 09:27:28 +0100)
>>
>> are available in the git repository at:
>>
>> git://github.com/bonzini/qemu.git tags/for-upstream
>>
>> for you to fetch changes up to df43d49cb8708b9c88a20afe0d1a3089b550a5b8:
>>
>> hw: clean up hw/hw.h includes (2016-05-19 16:42:30 +0200)
>>
>> ----------------------------------------------------------------
>> NEED_CPU_H cleanups, big enough to deserve their own pull request.
>>
>> ----------------------------------------------------------------
>
> Applied, thanks.
...there seem to be some travis build failures:
https://travis-ci.org/qemu/qemu/builds/131457562
TCI seems to be broken, as is hw/timer/aspeed_timer.c. The latter
is probably just a missing #include "qemu/log.h".
Would you mind having a look?
thanks
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups
2016-05-19 17:54 ` Peter Maydell
@ 2016-05-19 18:35 ` Paolo Bonzini
0 siblings, 0 replies; 6+ messages in thread
From: Paolo Bonzini @ 2016-05-19 18:35 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers
On 19/05/2016 19:54, Peter Maydell wrote:
> ...there seem to be some travis build failures:
> https://travis-ci.org/qemu/qemu/builds/131457562
>
> TCI seems to be broken
Missing cpu.h includes (though for disas/tci.c, hopefully one can stop
including exec/exec-all.h instead).
> as is hw/timer/aspeed_timer.c. The latter
> is probably just a missing #include "qemu/log.h".
Yes, and it only shows if trace.h doesn't include it. There are
probably others that are similarly broken.
I'll look at it tomorrow morning.
Paolo
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-05-19 18:35 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-05-19 14:43 [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 16/52] target-ppc: make cpu-qom.h not target specific Paolo Bonzini
2016-05-19 14:43 ` [Qemu-devel] [PULL v4 22/52] target-xtensa: " Paolo Bonzini
2016-05-19 15:53 ` [Qemu-devel] [PULL v4 00/52] NEED_CPU_H cleanups Peter Maydell
2016-05-19 17:54 ` Peter Maydell
2016-05-19 18:35 ` Paolo Bonzini
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