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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: alistair.francis@xilinx.com, crosthwaite.peter@gmail.com,
	peter.maydell@linaro.org, edgar.iglesias@xilinx.com,
	qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v1 3/5] xlnx-zynqmp: Make the RPU subsystem optional
Date: Fri, 20 May 2016 00:54:17 +0200	[thread overview]
Message-ID: <1463698459-31312-4-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1463698459-31312-1-git-send-email-edgar.iglesias@gmail.com>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

The way we currently model the RPU subsystem is of quite
limited use. In addition to that, it causes problems for
KVM and for GDB debugging.

Make the RPU optional by adding a has_rpu property and
default to having it disabled.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 hw/arm/xlnx-zynqmp.c         | 50 +++++++++++++++++++++++++++++++++++++-------
 include/hw/arm/xlnx-zynqmp.h |  2 ++
 2 files changed, 44 insertions(+), 8 deletions(-)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 250ecc4..c180206 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -83,6 +83,40 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
     return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
 }
 
+static bool xlnx_zynqmp_get_has_rpu(Object *obj, Error **errp)
+{
+    XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
+
+    return s->has_rpu;
+}
+
+static void xlnx_zynqmp_set_has_rpu(Object *obj, bool value, Error **errp)
+{
+    XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
+    int i;
+
+    if (s->has_rpu == value) {
+        /* Nothing to do.  */
+        return;
+    }
+
+    /* We don't support clearing the flag.  */
+    if (s->has_rpu) {
+        error_setg(errp, "has_rpu is already set to %u",
+                   s->has_rpu);
+        return;
+    }
+
+    /* Create the Cortex R5s.  */
+    for (i = 0; i < XLNX_ZYNQMP_NUM_RPU_CPUS; i++) {
+        object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]),
+                          "cortex-r5-" TYPE_ARM_CPU);
+        object_property_add_child(obj, "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]),
+                                  &error_abort);
+    }
+    s->has_rpu = value;
+}
+
 static void xlnx_zynqmp_setup_rpu(XlnxZynqMPState *s, const char *boot_cpu,
                                   Error **errp)
 {
@@ -118,6 +152,11 @@ static void xlnx_zynqmp_init(Object *obj)
     XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
     int i;
 
+    object_property_add_bool(obj, "has_rpu",
+                             xlnx_zynqmp_get_has_rpu,
+                             xlnx_zynqmp_set_has_rpu,
+                             &error_abort);
+
     for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
         object_initialize(&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
                           "cortex-a53-" TYPE_ARM_CPU);
@@ -125,13 +164,6 @@ static void xlnx_zynqmp_init(Object *obj)
                                   &error_abort);
     }
 
-    for (i = 0; i < XLNX_ZYNQMP_NUM_RPU_CPUS; i++) {
-        object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]),
-                          "cortex-r5-" TYPE_ARM_CPU);
-        object_property_add_child(obj, "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]),
-                                  &error_abort);
-    }
-
     object_property_add_link(obj, "ddr-ram", TYPE_MEMORY_REGION,
                              (Object **)&s->ddr_ram,
                              qdev_prop_allow_set_link_before_realize,
@@ -290,7 +322,9 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
         qdev_connect_gpio_out(DEVICE(&s->apu_cpu[i]), 1, irq);
     }
 
-    xlnx_zynqmp_setup_rpu(s, boot_cpu, errp);
+    if (s->has_rpu) {
+        xlnx_zynqmp_setup_rpu(s, boot_cpu, errp);
+    }
 
     if (!s->boot_cpu_ptr) {
         error_setg(errp, "ZynqMP Boot cpu %s not found", boot_cpu);
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 38d4c8c..68f6eb0 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -87,6 +87,8 @@ typedef struct XlnxZynqMPState {
 
     /* Has the ARM Security extensions?  */
     bool secure;
+    /* Has the RPU subsystem?  */
+    bool has_rpu;
 }  XlnxZynqMPState;
 
 #define XLNX_ZYNQMP_H
-- 
2.5.0

  parent reply	other threads:[~2016-05-19 22:54 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-19 22:54 [Qemu-devel] [PATCH v1 0/5] xlnx-zynqmp: Fix various issues with KVM runs Edgar E. Iglesias
2016-05-19 22:54 ` [Qemu-devel] [PATCH v1 1/5] xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions Edgar E. Iglesias
2016-05-24 16:30   ` Peter Maydell
2016-05-24 16:57     ` Edgar E. Iglesias
2016-05-24 17:29       ` Peter Maydell
2016-05-19 22:54 ` [Qemu-devel] [PATCH v1 2/5] xlnx-zynqmp: Break out RPU setup into a separate function Edgar E. Iglesias
2016-05-24 16:23   ` Peter Maydell
2016-05-19 22:54 ` Edgar E. Iglesias [this message]
2016-05-24 16:26   ` [Qemu-devel] [PATCH v1 3/5] xlnx-zynqmp: Make the RPU subsystem optional Peter Maydell
2016-05-24 16:32     ` Edgar E. Iglesias
2016-05-24 16:37       ` Peter Maydell
2016-05-24 16:52         ` Edgar E. Iglesias
2016-05-19 22:54 ` [Qemu-devel] [PATCH v1 4/5] xlnx-zynqmp: Delay realization of GIC until post CPU realization Edgar E. Iglesias
2016-05-24 16:28   ` Peter Maydell
2016-05-19 22:54 ` [Qemu-devel] [PATCH v1 5/5] xlnx-zynqmp: Use the in kernel GIC model for KVM runs Edgar E. Iglesias
2016-05-24 16:29   ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2016-05-19 22:48 [Qemu-devel] [PATCH v1 0/5] xlnx-zynqmp: Fix various issues with " Edgar E. Iglesias
2016-05-19 22:48 ` [Qemu-devel] [PATCH v1 3/5] xlnx-zynqmp: Make the RPU subsystem optional Edgar E. Iglesias

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